Comparison of diverse resistive switching characteristics and demonstration of transitions among them in Al-incorporated HfO₂-based resistive switching memory for neuromorphic applications

Abstract

Diverse resistive switching behaviors are observed in the Pt/HfAlO_x/TiN memory device depending on the compliance current, the sweep voltage amplitude, and the bias polarity. We extensively compare three types of resistive switching characteristics in a Pt/HfAlO_x/TiN device in terms of endurance, ON/OFF ratio, linear conductance update, and read margin in a cross-point array structure for synaptic device applications. The bipolar resistive switching under positive set and negative reset shows better linear synaptic weight updates due to gradual switching than the bipolar resistive switching at the opposite polarity. The complementary resistive switching shows a higher read margin due to the current suppression at a low voltage regime. In addition, the potentiation and the depression can be adjusted at the same voltage polarity for a hardware neuromorphic system. Finally, we demonstrate the transition between bipolar resistive switching and complementary resistive switching, which could provide flexibility for different applications.

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Introduction

Compared to traditional non-volatile memories¹ such as NAND Flash, resistive switching memory (RRAM) is considered to be more promising in terms of its low power consumption² and fast switching speed.³ It is also quite competitive in terms of scalability and multi-level cells (MLC).⁴ RRAM shows different types of resistive switching from various insulating mediums such as metal oxide,⁵ semiconductor materials, organic materials, and 2D materials.⁶ The switching behaviors are mainly classified into progressive switching and abrupt switching during set and reset. Progressive switching is particularly suitable for MLC implementation in non-volatile memory applications.⁷ Multi-conductance-states in an RRAM device are also extensively utilized as electronic synapses in neuromorphic systems,⁸ which have the potential to replace von Neumann computing in the near future. Neuromorphic engineering emulates a neuro-biological architecture to implement an energy-efficient computing system with parallel data processing. Non-volatile memory devices such as Flash memory⁹ and resistance-type new memories can act as biological synapses in a nervous system by storing and change the weight for a long time.¹⁰ Among them, RRAM-based artificial electronic synapses have shown many attractive benefits in neuromorphic computing,¹¹ i.e., a simple structure, low energy consumption,¹² multi-level storage,¹³ and good CMOS compatibility¹⁴ with high-density integration.¹⁴

The resistive switching is largely divided into three categories. Unipolar resistive switching (URS) occurs in the same polarity in which the reset process uses Joule heating with high current. Bipolar resistive switching (BRS) occurs in different polarities, which is dominantly driven by electric field. The reset is completed after set process in the same polarity for complementary resistive switching (CRS).¹³

Among the many resistive switching materials, HfO₂ is a well-proven material with excellent reproducibility and repeatability, and it has been studied for a long time for non-volatile storage memory applications as well as for high-k gate dielectrics in CMOS.^15,16 However, the defect controlled switching-based RRAM devices including metal oxides cannot avoid the variation of switching parameters because of the stochastic nature.¹⁷

Several approaches have been applied to further improve the non-volatile memory properties of HfO₂ RRAM. The dopant of another material such as Al into an HfO₂ layer or the bilayer Al₂O₃/HfO₂ structure can enhance the uniformity of set and reset switching by stabilizing the conductive filament.^18–21 The use of Al₂O₃,¹⁹ which has a larger band gap than HfO₂, can lead to improved resistive switching properties, such as low power consumption and nonlinear I–V.¹⁹ Furthermore, synaptic characteristics have been reported in several HfO₂-based RRAM devices.^7,21

In this work, we characterize the various resistive switching behaviors of an Al-doped HfO₂ (HfAlO_x)-based RRAM device for neuromorphic computing. The switching behaviors are classified into three types by controlling the compliance current (CC) and the voltage polarity. A single device that can have various resistive switching characteristics determined by the operating conditions is advantageous in the sense that it can be flexibly applied to various applications. Two bipolar resistive switching at positive set and negative set and a complementary resistive switching are evaluated in terms of the ON/OFF ratio, endurance cycle, read margin, and the nonlinearity and variation of potentiation and depression for synaptic device application in a hardware based-neuromorphic system. In addition, we experimentally demonstrate the transition between BRS and CRS.

Experimental section

The Pt/HfAlO_x/TiN device was fabricated as follows. A 100 nm-thick TiN was deposited by DC sputtering on a SiO₂/Si wafer. A 7 nm-thick high-k HfAlO_x film was then accurately deposited by atomic layer deposition (ALD). The HfO₂ layer reacted with TEMAHf and H₂O. One cycle is composed of TEMAHf (0.5 s)-purse (35 s)-H₂O (0.3 s)-purge (35 s) for ALD HfO₂ layer. The Al₂O₃ reacted with TEMAH and H₂O. The Al₂O₃ layer reacted with TMA and H₂O. One cycle is composed of TMA (0.2 s)-purse (15 s)-H₂O (0.2 s)-purge (15 s) for ALD Al₂O₃ layer. For the HfAlO_x film, one cycle of HfO₂ and then five cycles of Al₂O₃ were alternately deposited for a total of 15 times. Next, a 100 nm thick Pt top electrode was deposited by an e-beam evaporator and patterned by a shadow mask containing circular patterns with a diameter of 100 μm. All the electrical properties, including the DC and transient characteristics, were used with a Keithley 4200-SCS semiconductor parameter analyzer and in pulse mode using a 4225-PMU ultrafast module. All measurements were performed at room temperature and ambient atmosphere. The bias was applied on the Pt top electrode while the TiN bottom electrode was grounded.

Results and discussion

Fig. 1(a) shows the structure of the Pt/HfAlO_x/TiN device. The device stack is well confirmed by the high-resolution transmission electron microscope (HRTEM) image shown in Fig. 1(b). Further, each element (Pt, Hf, Al, O, Ti, and N) is well scanned by energy dispersive X-ray spectroscopy (EDS) analysis, as illustrated in Fig. 1(c).

Fig. 1 Device configuration of Pt/HfAlO_x/TiN device: (a) schematic of the device stack, (b) HRTEM image, (c) EDS line scan.

First, DC bias sweeps are applied to the device to characterize its typical I–V curves for electrical analysis, as shown in Fig. 2(a). The initial forming-free behavior on pristine cell and high resistance state (HRS) are found. After applying the CC of 700 μA, the Pt/HfAlO_x/TiN device shows stable BRS up to 200 cycles with an ON/OFF ratio of about 10 at 0.5 V. The device switches from HRS to low resistance state (LRS) at about −1.5 V for the set process. The device starts to return to HRS with positive sweep for reset. Note that this switching (negative set and positive reset) is classified as type 1 (BRS1) in this work. The multi-level states in the RRAM cell can increase the memory density at the same cell size, which is useful for storage memory applications.²² Moreover, MLC improves the computing system performance in hardware neuromorphic systems.²³ Fig. 2(b) shows the multi-level switching by controlling reset voltage switching. The set process occurs in an abrupt manner, and it is relatively difficult to control the set voltage for MLC.²⁴ Conversely, after the set process, the current gradually decreases by a continuous reset process while positively increasing the step voltage of 0.1 V. HRS and LRS follow Schottky emission and ohmic conduction, respectively, as reported in the previous literature^25,26 (see Fig. S1, ESI†).

Fig. 2 (a) I–V characteristics of the Pt/HfAlO_x/TiN device by negative set and positive reset (type 1, BRS1). (b) Multilevel I–V curves by reset stop voltage from 0.5 V to 1.1 V.

For more practical memory switching operation, pulse measurements are conducted on the Pt/HfAlO_x/TiN device. Fig. 3(a) shows the set and reset transient switching driven by voltage pulse input. The low current at the initial state is monitored by read pulse (0.2 V, 100 μs), and the current increases by the same read voltage after the set pulse (−0.8 V, 100 μs) is applied. Similarly, the current decreases are confirmed by the same read pulse after reset pulse (1 V, 100 μs). The endurance is conducted by up to 100 cycles for transitions between two states (ON: about 1 kΩ, OFF: 2 kΩ–2.8 kΩ) by applying the pulse scheme displayed in Fig. 3(a), as shown in Fig. 3(b). The ON/OFF ratio can be increased by using higher voltage amplitude. The multi-level conductance values are obtained by varying the voltage amplitudes (−0.7 V to −1.15 V) with an identical pulse width of 100 μs for the set process, and by varying the voltage amplitudes (0.9 V–1.3 V) for the reset process.

Fig. 3 Pulse responses of the Pt/HfAlO_x/TiN device in type 1. (a) Set and reset switching in pulse mode, (b) endurance cycle in pulse mode, (c) MLC with difference conductance levels driven by pulse response.

Next, we emulate important biological synapse functions, such as long-term potentiation (LTP), long-term depression (LTD), and paired pulse facilitation (PPF), in a Pt/HfAlO_x/TiN device, an artificial electronic device.²⁷ Fig. 4(a) shows a schematic of a biological synapse, a pre-synaptic neuron, and a post-synaptic neuron. The synapse acting as neuronal junction or bridge controls the electrical or chemical signal between two neurons.²⁸ Synapses regulate connection strength and are involved in learning and memory in the human brain. Similarly, the metal–insulator–metal (MIM) capacitance structure can facilitate weight (conductance) adjustment through external pulse inputs.²⁹ LTP and LTD are key features for adjusting the neuronal synaptic plasticity.³⁰ Fig. 4(b) shows the LTP and LTD curve driven by each of the identical 50 pulses. Fifty consecutive conductance values are measured at a V_READ of 0.2 V after potentiating the set pulse (−1.3 V, 100 μs). For LTD, depressing reset pulses (1.5 V, 100 μs) and a V_READ of 0.2 V are used. The conductance values are tuned from 1.116 mS to 2.028 mS. In the LTP, the conductance is significantly changed at the beginning of the pulse and a large variation is observed. The variation of LTP and LTD is due to the stochastic behaviors from resistive switching using the movement of oxygen vacancies. Especially, the potentiation (set process) has large variation due to the abrupt change in filamentary type.¹⁷

Fig. 4 Synaptic characteristics of the Pt/HfAlO_x/TiN device in type 1. (a) Schematic of the biological synapse between pre-neuron and post-neuron, (b) change in the conductance of 100 consecutive identical pulse responses for LTP and LTD, (c) PPF function emulated by artificial electron device.

The LTP curve is consistent with the abrupt set process of the I–V curve shown in Fig. 2(a). There are large variations in the LTP and LTD curves. For example, the conductance in some points decreases with the set pulse and increases with the reset pulse. Next, we emulate PPF, which is associated with short-term plasticity.³¹ The second current is higher than the first one when two identical paired pulses (voltage: −1.3 V, width: 100 μs) are applied on the artificial synaptic device (Pt/HfAlO_x/TiN device). This enhancement, which is also known as facilitation in the nervous system, occurs because the interval time is shorter than the recovery time and the device has a non-volatile property.³²

Resistive switching also occurs in the Pt/HfAlO_x/TiN device at the positive set and negative reset process, which is defined as type 2 (BRS2). Fig. 5(a) shows the typical type 2 BRS characteristics. The more gradual switching is observed for set switching, so we can control the set stop voltage (0.6 V to 0.72 V) as well as the reset stop voltage (−1 V to −1.44 V) to obtain different current levels, as shown in Fig. 5(b). In addition, LTP and LTD are obtained in a similar manner for type 1. Here, 50 consecutive increases in conductance for LTP (0.9 V, 100 μs) and 50 decreases in conductance for LTD (−1.6 V, 100 μs) are controlled to confirm the synaptic plasticity of the artificial electronic synapse.³³ The conductance values are varied from 1.589 mS to 2.966 mS with substantially lower fluctuation than that used in type 1.

Fig. 5 (a) BRS I–V characteristics of the Pt/HfAlO_x/TiN device by positive-set and negative set (type 2, BRS2), (b) MLC characteristics by controlling set (positive bias) and reset (negative bias) stop voltages, (c) LTP and LTD curve by identical pulses (LTP: 0.9 V and LTD: −1.6 V).

To evaluate the CC effect on resistive switching behaviours, a high CC of 2 mA is applied on a pristine cell by DC voltage sweep in a negative regime. The device shows an extraordinary CRS.³⁴ The repeatable CRS up to 50 consecutive cycles is obtained; here, the set occurs first, then the reset occurs at a larger voltage in the same polarity at both positive and negative regimes. Unlike conventional BRS, the CRS has the advantage of suppressing leakage current when applying a half-bias scheme in a cross-point structure, because the current is suppressed at a low voltage regime before the set process.³⁵ Moreover, to emulate the synaptic behaviour in the CRS curve, we design the applied voltage with different amplitudes at the same polarity. The conductance levels for the LTP and LTD curve are well controlled by 50 identical pulse responses (LTP: 0.9 V and 100 μs, LTD: 0.9 V and 100 μs) in a manner similar to those used for type 1 (BRS1) and type 2 (BRS2). The conductance range can be controllable from 0.745 mS to 1.382 mS by this pulse condition. In addition, CRS is observed in pulse train mode (see Fig. S2, ESI†). It should be noted that the conductance can only be increased and decreased by the magnitude of the voltage at the same polarity; this has the advantage of simplifying the peripheral circuit driving the synaptic device (Fig. 6).³⁶

Fig. 6 (a) CRS I–V curves of the Pt/HfAlO_x/TiN device in type 3 (CRS), (b) LTP and LTD curve by identical pulse responses in same polarity (LTP: 1 V and LTD: 1.2 V).

The linear weight update of the synaptic device is important for implementing high learning accuracy in a hardware neuromorphic system.^37,38 To evaluate the conductance update for three types (BRS1, BRS2, and CRS) in the LTP and LTD curves shown in Fig. 7(a)–(c), respectively, the nonlinearity (NL) is defined in the following equation:

Here, G and G_LINEAR are the measurement conductance value and the conductance with ideal weight update, respectively. Type 1 shows the highest NL value because of the abrupt transition for the set process. Type 3 shows a nearly similar NL, but the variation of weight update is higher than that of type 2.

Fig. 7 Normalized conductance of (a) type 1, (b) type 2, and (c) type 3 to extract the NL.

For the high-density integration of the storage memory device, the sneak current issue in the cross-point array structure can be mitigated by CRS.³⁹ The sneak current flows when a partial voltage is applied to adjacent cells of the target cell shown in Fig. 8(a). If all adjacent cells have LRS, the sneak current path leakage problem could be severe. To demonstrate a better read margin in CRS, a half-bias scheme is employed in the cross-point array structure.⁴⁰ The worst case read margin⁴¹ is calculated as a function of the word line (WL) or bit line (BL) number for the three types of switching displayed in Fig. 8(b). CRS (type 3) shows the highest read margin among them because the current is suppressed at a low voltage regime. However, a CRS curve operating at a lower current as well as an additional selector element will be connected to each memory cell to ensure a larger array size.⁴⁰ Table 1 compares the ON/OFF ratio, the endurance cycle, the linearity, the weight update error rate of potentiation and depression, and the read margin for the three types of switching.

Fig. 8 (a) Sneak current in cross-point structure, (b) read margin as a function of the number of WL for three types of switching.

Table 1 Comparison of three types of I–V characteristics at different current compliance

	Type 1 (BRS1)	Type 2 (BRS2)	Type 3 (CRS)
ON/OFF ratio	>10	<10	<10
Endurance cycles	200	100	50
Number of word lines at read margin (10%)	4	3	17
LTP/LTD NL (%)	211.9/89.12	178.3/35.42	195.8/39.46
LTP/LTD weight update error (%)	44.9/40.8	38.78/24.48	40.8/44.89

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The Pt/HfAlO_x/TiN device shows good stability as well as multilevel and tunable switching based on different measurement conditions such as CC,⁴² bias polarity, and voltage sweep range,⁴³ which are explained in the flow chart presented in the inset in Fig. 9. LRS current is well controlled by CC (see Fig. S3, ESI†). By increasing CC from 700 μA to 2 mA, the BRS1 (200 cycles) behavior turns to CRS (50 cycles), as shown in Fig. 9. We can then select type 1 or type 2 from CRS depending on the CC. The I–V curves (type 2, positive set and negative reset) are similar to the interface-type when a smaller voltage stop is used at positive bias. Interface-type switching is well known for its poor retention,⁴⁴ and we confirmed the current decay by short-term memory effect in pulse train (see Fig. S4, ESI†). There is no specific CC because the switching occurs before the effective current change. Fifty endurance cycles are observed in this switching mode, as shown in Fig. 9. Further, when a higher CC of 4 mA is newly applied at type 3 (CRS) at CC of 2 mA, the switching mode returns to type 1 (BRS1). The tendency for the LRS current to gradually increase is observed for the conversion to be completed, and 450 DC cycles of endurance are conducted after the stabilization (see Fig. S5, ESI†). The CC dependent switching tendency suggests that low CC (700 μA) can limit the reset process after the set process for CRS and high CC (4 mA). The possible conduction filament evolution model for the transition from BRS to CRS can be explained by the schematics based of previous literature about metal oxide-based RRAM devices (see Fig. S6, ESI†).^45–49

Fig. 9 Continuous endurance cycle for three switching types (BRS1 → CRS → BRS2) and flow chart and I–V curves for the transition among different switching types.

Conclusion

We characterize three types of resistive switching behaviors in a Pt/HfAlO_x/TiN device for neuromorphic application. Type 1 (BRS1 under negative set and positive reset) shows the best endurance and ON/OFF margin. Type 2 (BRS2 under positive set and negative reset) shows the weight update with the best linear manner and the lowest variation by identical pulses. Type 3 (CRS, the reset after the set process in the same polarity) is advantageous in the sense that it has the highest read margin in a cross-point array structure due to the nonlinear I–V characteristics. Moreover, with the same polarity, the increase and the decrease of the conductance can be controlled by the magnitude of the pulse. Finally, the transitions between BRS and CRS are verified by controlling the operation polarity and the CC. Various resistive switching characteristics according to the operation switching mode in one device can be flexibly applied to various applications including neuromorphic system.

Conflicts of interest

There are no conflicts to declare.

Acknowledgements

This work is supported by the National Research Foundation of Korea (NRF), grant funded by the Korean government (MSIP) under Grant 2018R1C1B5046454 and supported by the Dongguk University Research Fund of 2020.

Notes and references

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Footnote

† Electronic supplementary information (ESI) available. See DOI: 10.1039/d0ra06389d

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