Open Access Article
Mohsin
Ali
a,
Bahar
Ronnasi
a,
May
Ourabi
a,
Joon Hyung
Park
b,
Jean-Philippe
St-Pierre
a,
Chang-Hyun
Kim
c and
Benoît H.
Lessard
*ac
aDepartment of Chemical and Biological Engineering, University of Ottawa, 161 Louis Pasteur, Ottawa, ON, Canada. E-mail: benoit.lessard@uottawa.ca
bSchool of Electronic Engineering, Gachon University, Seongnam 13120, Republic of Korea
cSchool of Electrical Engineering and Computer Science, University of Ottawa, 800 King Edward Ave., Ottawa, ON, Canada
First published on 23rd December 2024
The constant demands for the better performance of consumer electronics have led to shorter usage lifespans, resulting in a significant increase in electronic waste (e-waste). Developing electronics that can be easily broken down and recycled is a promising strategy to tackle this growing e-waste challenge. Herein, we report a biocompatible and degradable organic thin film transistor (OTFT) utilizing a biocompatible semiconductor with a biodegradable dielectric and substrate. We present the first OTFT based on bispentafluorophenoxy silicon phthalocyanine (F10-SiPc) integrated with a polyvinyl alcohol (PVA) and poly(caprolactone) (PCL) bilayer as the dielectric, leading to a drop in threshold voltage (VT) from 12.7 V to −0.97 V, versus using SiO2 while maintaining similar mobility values. We demonstrate the importance of the annealing temperature on PLA substrate roughness and gate electrode surface chemistry for the fabrication of working OTFT devices. We then demonstrate that the bendable OTFTs could easily be dissolved in phosphate buffer saline (PBS) solution at room temperature in less than a month, which is a crucial aspect for ensuring eco-sustainability in electronic devices. Finally, incubation of the degradation products with fibroblastic cells did not affect cell viability, suggesting that they are non-cytotoxic. These cytocompatible disintegrable OTFTs with low operating voltages will find applications in bioresorbable electronics and constitute a step towards minimizing e-waste.
The use of thin, plastic substrates in the fabrication of electrical devices has the advantage of lowering the total mass of the systems and imparting flexible characteristics which can lead to new applications such as wearable electronics.8,9 Nevertheless, there are intrinsic disadvantages to using plastic substrates, including their disintegration into microplastics that can then find their way into our soil and groundwater, contributing to environmental contamination.10 Consequently, the use of plastic substrates in flexible electronics that are not biodegradable or recyclable is unsustainable.11 One of the challenges associated with using biodegradable substrates such as poly(lactic acid) (PLA) is that the glass transition temperature (Tg) of these materials is very low, which makes it challenging to integrate them into high-temperature manufacturing processes like the manufacturing of silicon semiconductors. For organic electronics, the semiconductor is carbon-based and can be deposited at lower temperatures, enabling integration onto plastic substrates while providing low energy requirements and potential economic incentives.12 Organic thin film transistors (OTFTs) are electrical switches and are basic components in more complex circuits finding applications in next generation biological and chemical sensors,13 health monitors,14 stretchable devices,15 and electronic skin.16 Research on OTFT development has focused primarily on improving device performance with little attention to assessing the biocompatibility and environmental impact of the resulting materials.17,18
Biodegradable OTFTs require biodegradable substrates, dielectrics, electrodes, semiconductors, and peripheral materials such as encapsulating materials. Biobased materials, such as PLA, polyhydroxyalkanoates (PHAs), starch blends, or cellulose-based polymers, are promising substrates if the processing temperatures can be kept <150 °C.19 However, biodegradable dielectrics with the desired physical and electrical properties are rare. Poly(vinyl alcohol) (PVA) is a bioresorbable dielectric that can be easily dissolved in environmentally friendly solvents such as water and breaks down naturally when exposed to suitable microorganisms.20 PVA has been previously used as a dielectric material in sensors21 and OTFTs, either as a homopolymer or as a blend of other materials.22,23 However, PVA also presents challenges; its printing is difficult often requiring careful optimization such as the addition of a viscosity enhancer24 and the resulting hydrophilic film is susceptible to moisture resulting in reduced reliability and stability of fabricated devices.25,26 Our group recently developed PVA with an interfacial, thermally crosslinked diisocyanate-terminated polycaprolactone (TPCL) leading to high-k/low-k bilayer dielectrics. The bilayer combined the desired electrical properties and high dielectric constant of the PVA with the moisture resistance of PCL, which also provides better surface matching for the subsequent deposition of the semiconductor. To further improve the shelf life and the ease of large-scale processing we then synthesized benzodioxinone-terminated PCL layer, which can be coupled to the PVA dielectric surface via UV radiation.27 High-k/low-k bilayer dielectrics have shown several advantages, such as reduced charge trapping, improved device stability, facilitation of orthogonal processing, and prevention of direct interaction between the hydroxyl groups of PVA and the semiconductor.28–30 The PCL layer acts as a protective coating for the PVA layer, creating a less polar environment at the interface between the dielectric and semiconductor.31,32
Phthalocyanines (Pcs) are promising semiconductors used in OTFTs that are produced on the ton scale annually and are commonly used as blue and green pigments in a variety of applications, including textiles, plastics, automotive paints, and others.33–35 Silicon phthalocyanines (R2-SiPcs) are a class of tetravalent Pc with axial groups that can be used as handles to impart functionalities onto the molecule such as solubility or solid state engineering amenability. Their strong near-infrared (NIR) emission has also stimulated their prospective use in both in vitro and in vivo bioimaging.36–40 Our group has demonstrated relatively better n-type performance of various R2-SiPc derivatives in OTFTs.41–45 In most cases R2-SiPc-based OTFTs suffer from high threshold voltage (VT) making them unsuitable for use in consumer electronics (<3 V) or in combination with printed batteries (<1.5 V).46,47 The interface between dielectrics and semiconductors in OTFT devices plays a pivotal role in enhancing charge transport by mitigating charge traps and reducing VT.48–50 Hybrid gate dielectric combinations of inorganic/organic bilayers are commonly employed to achieve high-performance organic transistors.51 However these materials are non-degradable suggesting the need for biodegradable materials with a high dielectric constant (k). Recently, our group published the first R2-SiPc paired with a polymer dielectric based on methyl methacrylate and dimethyl aminoethyl methacrylate copolymers (P(MMA-co-DMAEMA)), attaining near-zero VT.52 While not biodegradable, this study demonstrates the potential for using polymer dielectrics in combination with R2-SiPc semiconductors in OTFTs.
In this work, we present a disintegrable and biocompatible n-type OTFT with a low VT, based on the R2-SiPc OTFT utilizing a biodegradable bilayer PVA/UV-PCL as a gate dielectric with a biodegradable PLA substrate. Utilizing UV-PCL increased device stability and ease of processing while maintaining its encapsulation characteristics and moisture resistance for the PVA layer. We also demonstrate the aqueous disintegration of the resulting OTFTs into non-cytotoxic degradation products. These results demonstrate the broad applicability of low-voltage n-type and bioresorbable polymer dielectrics that employ scalable, economically viable R2-SiPc semiconductors.
The fabrication of OTFTs was accomplished by first spin-coating PLA on a quartz-coated glass substrate to coat a uniform PLA layer. This was followed by a baking process to remove any trapped solvent, according to the literature.60,61 The thickness of the biodegradable PLA substrate was approximately 3–4 μm which was then coated with chromium–gold (Cr–Au) where the Cr layer was used to improve the adhesion of Au on the PLA surface. The Au surface, which was deposited to cover the entire PLA substrate surface to enable automated and robust testing,62 serves as the bottom gate electrode. However, the gold surface with a water contact angle at ∼75° is not sufficiently hydrophilic for the PVA solution to be coated orthogonally and form a uniform layer. To overcome this, gold was treated with a self-assembled monolayer (SAM) of hydrophilic thiol for 1 hour to improve the hydrophilicity.63 Excess thiol molecules were rinsed off with pure ethanol. A decrease in the water contact angle to ∼40° was observed when gold films were treated with thiol (Fig. 2a). While other methods such as plasma treatment of gold could also be used to increase hydrophilicity, thiol treatment is simple and more permanent.
The PVA dielectric was deposited by spin-coating onto a thiol-treated gold/PLA substrate followed by thermal annealing. In previous reports,27,49 the PVA thin film was annealed at 150 °C for 1 hour to remove the solvent. Unlike our previous studies which annealed PVA on glass substrates, in this study PVA is deposited on PLA which is temperature-sensitive. Therefore, as the substrate is exposed to high temperatures it shrinks leading to buckling and high surface roughness, which is not conducive for OTFT fabrication. An average surface roughness of less than 10 nm is typically required to avoid surface traps at the dielectric–semiconductor interface and discontinuities of the semiconductor layer.64 Gold gate electrode-coated PLA films were vacuum annealed at different temperatures: 150 °C, 80 °C, 60 °C for 1 hour and 50 °C overnight, and the roughness measurements were carried out utilizing a profilometer (Fig. 2b). At annealing temperatures equal to or above 60 °C, the average roughness of the gold layer was >10 nm. We surmise that this increase in roughness is a product of different thermal expansion of the PLA substrate and gold layer leading to changes in morphology. However, when the gold-coated PLA films were annealed at 50 °C (below the Tg of PLA) overnight, the average roughness value was less than 10 nm. We also obtained microscopy images of the gold surface on a PLA substrate when annealed at different temperatures (Fig. 2c). These figures clearly show the roughness evolution upon increasing the temperature above the Tg value of PLA. Consequently, no major change in the roughness of the gate electrode surface was observed when the film was annealed at 50 °C overnight. Next, the UV-PCL solution was spin-coated onto the PVA layer, and the films were UV-cross-linked prior to rinsing the excess PCL. To confirm the crosslinking of UV-PCL, the films were rinsed with toluene, and the water contact angle was measured. As shown in Fig. 3 we report the contact angle of PVA and UV-PCL-coated PVA before and after rinsing with toluene. UV-PCL would dissolve in toluene during the rinsing process if it was not crosslinked to the PVA layer, resulting in a drop in the contact angle to match that of the bare PVA film. The UV-PCL maintained a contact angle of around 78° after two rinsing steps once crosslinking conditions were optimized (Fig. 3). The cross-linking reaction between PCL and PVA also secures the PCL layer in position,65 inhibiting aggregation and reducing the interfacial hydroxy groups, which can act as charge traps during OTFT operation.66 Interfacial cross-linking also preserves a substantial amount of hydroxyl groups in the bulk of PVA, leading to a high dielectric constant (k), while simultaneously enabling orthogonal processing.2,67
The dielectric properties of the bilayer dielectric (PVA/UV-PCL) were characterized by impedance spectroscopy and are summarized in Table 1. The bilayer dielectric constant values found were well within the predicted range for PVA.23,30,68 It has been reported that hygroscopic polymer dielectrics when exposed to moisture can experience an increase in the capacitance density by up to 50 times at 10 Hz.27 This change is explained by the fact that moisture acts as a plasticizer, facilitating hydroxyl group alignment under an applied electric field and thereby increasing the capacitance of the PVA film.69,70 However, for reliable transistors in flexible circuits, the dielectric properties need to be stable. Water molecules also introduce charge traps at the dielectric–semiconductor interface, increasing the device hysteresis which is also detrimental to the transistor performance. Therefore, a monolayer (∼1–2 nm) of UV-cross-linkable PCL layer deposited on top of PVA functions as a moisture barrier, thereby reducing the impact of moisture on the dielectric properties of PVA.27
| Dielectric | Effective dielectric constant (k) | Capacitance density (nF cm−2) |
|---|---|---|
| PVA/UV-PCL | 10.6 ± 1.6 | 26.70 ± 0.04 |
F10-SiPc was deposited on the UV-PCL layer. F10-SiPc OTFTs using OTS-treated SiO2 as the gate dielectric were fabricated using a similar device configuration for device performance comparison.23,27,30,68–70 Finally Cr and then Au were deposited on the semiconductor as the source/drain electrodes using shadow masks. The Cr interlayer improves electrode durability71 and reduce contact resistance by matching the work function of the electrode with the lower unoccupied molecular orbital (LUMO) energy level of F10-SiPc.72,73
Fig. 4a–d depicts the characteristic output and transfer curves of the F10-SiPc OTFTs on both PVA/UV-PCL and OTS-treated SiO2 dielectrics. The VT, electron mobility (μe) and on/off current (Ion/off) were determined and are presented in Table 2. The VT value of F10-SiPc OTFTs was reduced noticeably from 12.7 ± 1.7 V when using OTS-treated SiO2 as the gate dielectric to −0.97 ± 1.4 V when using a PVA/UV-PCL bilayer as the gate dielectric. The decrease in VT implies a reduction in polarity at the semiconductor/dielectric interface, minimizing the amount of charge trapping,29,74–76 which is likely due to the higher dielectric constant of PVA/UV-PCL (10.6) compared to SiO2 (3.9), at frequencies below 1 kHz.77 This represents a significant improvement compared to previous studies53 where biocompatible and bioresorbable OTFTs were fabricated utilizing PVA as the gate dielectric with VT values of approximately −15.4 V. A statistically similar μe was observed, going from (2 ± 0.7) × 10−2 cm2 V−1 s−1 on the OTS/SiO2 gate dielectric to (1.03 ± 1.6) × 10−2 cm2 V−1 s−1 when PVA/UV-PCL was used. This is consistent with previous research on bottom-gate devices that include the deposition of F10-SiPc on the PMMA dielectric, which provided an electron mobility of 1.1 × 10−2 cm2 V−1 s−1, lower than that obtained with F10-SiPc deposited on SiO2.52 Although the Ion/off ratios are comparatively low, this aligns with the literature reported for PVA dielectrics.78 The high off current observed in Fig. 4d might be due to the ambipolarity of the device as F10-SiPc has been demonstrated as an ambipolar semiconducting material. It is important to note that devices prepared on OTS/SiO2 had higher currents than devices prepared on PVA/UV-PCL which is a function of several factors including the operating conditions used to obtain the transfer and output curves, which are different in terms of VGS and VSD. With PVA/UV-PCL devices tested at VGS and VSD = 4 V, we obtain a current of ≈0.073 μA, but when using OTS/SiO2 at the same VGS and VSD the device does not turn on, highlighting the low voltage requirements when using PVA/UV-PCL. A comparable current is only obtained at ∼25 V when using OTS/SiO2.
| Dielectric | μ e (cm2 V−1 s−1) | V T (V) | I on/off |
|---|---|---|---|
| SiO2/OTS | 0.02 ± 0.007 | 12.7 ± 1.7 | 105 (at VGS = 50 V) |
| PVA/UV-PCL | 0.01 ± 0.016 | −0.97 ± 1.4 | 101–102 (at VGS = 4 V) |
Enhanced crystallinity in MPcs deposited by physical vapour deposition (PVD) generally results in enhanced charge transport characteristics in OTFTs, leading to greater mobility and on-current values, while amorphous MPcs typically show higher numbers of defect sites, which decreases the conductivity and mobility of the semiconductor.79 The crystallization of MPcs is impacted by substrate characteristics, molecular order of the sub-layer, surface roughness, chemistry, and deposition rate.80,81Fig. 4e and f show a comparison of XRD patterns of F10-SiPc films deposited on OTS-treated SiO2 and the PVA/UV-PCL dielectric. A reduction in peak intensity at 2θ = 8.43° for F10-SiPc films deposited on PVA/UV-PCL was observed compared to those on the OTS-treated SiO2 surface which might result in a change in relative crystallinity, change in polymorph or change in crystalline domain orientation. This discrepancy can be attributed to the differing surface diffusion behaviour of F10-SiPc molecules on PVA/UV-PCL compared to OTS-treated SiO2 during the nucleation of F10-SiPc vapours on the substrate and is consistent with the observed slight drop in device μe.52 Overall, these results demonstrate that PVA/UV-PCL is an effective green dielectric for the development of R2-SiPc-based OTFTs with a low VT value.
Numerical simulation was carried out to investigate the device physics of the corresponding transistors.82–84 We determined a set of models and parameters that reproduce the major characteristics of the OTFT based on the SiO2/OTS dielectric including both bulk traps and fixed charge at the semiconductor/insulator interface as shown in Fig. 5a. It is worth mentioning that we will focus on the ON-state simulation data because the simulation returns purely theoretically achievable OFF currents that are typically orders-of-magnitude lower than those realistically measurable. We then took a step-by-step approach to modelling the OTFT based on the PVA/UV-PCL dielectric to identify an origin for the different behaviors of the two transistors. First, we increased the capacitance from 15 nF cm−2 (SiO2/OTS) to 27 nF cm−2 (PVA/UV-PCL), without changing any other material parameters (curve “1”). This simple transformation is not enough to reflect the experimental data, especially because the VT is still too high. Next, to reduce VT, we removed the interface charge, obtaining curve “2”. Finally, we removed the trap states, obtaining curve “3”, which shows an excellent agreement between experiment and simulation, in terms of both the VT and the ON-state current levels. A detailed list of parameters used for the optimized simulation curves in Fig. 5a and b can be found in Table S1, ESI.†
Our simulation reveals that PVA/UV-PCL does not only offer a large capacitance but it also creates a charge-neutral and trap-minimized surface to enable low-voltage switching. Note that simple conversion of the subthreshold slope to the trap density would lead to the values of 3.5 × 1012 cm−2 eV−1 and 3.3 × 1012 cm−2 eV−1 for the transistors on SiO2 and the polymer bilayer dielectric, respectively. The value for the SiO2 based OTFT may reflect the actual trap density of states (DOS) in this device probed using numerical simulation (Table S1, ESI†). However, this method is likely to overestimate the trap density in the PVA/UV-PLC based OTFT as the subthreshold slope in this sample is not only determined by trap filling but also affected by leakage currents. To further emphasize this argument, we calculated the internal distribution of electrons in the PVA/UV-PCL based OTFT. Fig. 5c shows strongly depleted source/drain regions due to an injection barrier of 0.5 eV, yet the electron accumulation is clearly visible at the semiconductor/insulator interface at a VGS value of only 4 V. Fig. 5d shows that by increasing the VSD value from 0 to 4 V, this channel is successfully pinched-off at the drain side.
We demonstrated that these devices are capable of undergoing degradation under aqueous conditions. PLA resorption is influenced by temperature and pH, and degradation occurs slowly in phosphate buffer saline (PBS) with a pH of 7.4 at room temperature.85 To investigate the resorption behaviour of the device, an accelerated in vitro degradation experiment was performed by immersing the OTFTs in a PBS solution (1 M, pH ∼ 10) at room temperature. The accelerated degradation test demonstrates the complete disintegration of the device in 20 days (Fig. 6). We noticed that the PVA readily dissolved in PBS, and R2-SiPc completely disintegrated from the device within 5 hours. Afterward, a loss of structural integrity was seen, leaving PLA and gold. After 20 days, the whole device was disintegrated completely, leaving micro/nano gold particles in the PBS solution which are known to be excreted or absorbed by the human body.86
![]() | ||
| Fig. 6 Photographs of OTFTs taken at different intervals after being submerged in 1 M PBS (pH ∼ 10) for accelerated degradation. | ||
We also investigated whether the degradation products obtained from the incubation of OTFT devices in an aqueous medium elicit cytotoxicity in mammalian cells. Degradation product extracts were prepared by incubating devices in culture medium at 37 °C for 7 days following a protocol modified from that in the study by Deng et al.87 The metabolic activity of NIH 3T3 mouse fibroblast cultures following 24 hour incubation with these (OTFT) extracts was not significantly different from that of cultures incubated in fresh medium without the degradation products, whereby metabolic activity is an accepted metric for evaluating cell viability (Fig. 7a). The cells cultured in the presence and absence of degradation products were also incubated with calcein-AM to label live cells (green fluorescence) and ethidium homodimer-1 to label dead cells (red fluorescence). Fluorescence images show the presence of only a few dead cells under both culture conditions, confirming results from the metabolic activity assay (Fig. 7b and c). Overall, these preliminary cell viability studies suggest that the use of UV-PCL, F10-SiPc, Au electrodes, thiol treatment and PLA as a substrate do not cause cytotoxicity to mammalian fibroblasts following degradation of the OTFT devices in aqueous solutions.
000–50
000 Da; 98–99% hydrolyzed) and 2-aminoethanthiol hydrochloride were procured from Sigma-Aldrich. Chromium-coated (Cr) tungsten rods and gold (Au, 99.99%) were obtained from Angstrom Engineering. Quartz-coated glass substrates measuring 15 × 20 mm2 were purchased from Ossila Limited. Si wafers with a SiO2 thickness of 230 nm and shadow masks were obtained from WaferPro and Ossila Limited, respectively. Deuterated chloroform, with a purity of 99.8%, and benzene, with a purity of 98%, were acquired from Cambridge Isotope Laboratories Inc. The synthesis of F10-SiPc was carried out according to the literature.88 2,2-Dimethyl benzodioxinone-terminated PCL (UV-PCL) was synthesized according to the literature.27
![]() | (1) |
![]() | (2) |
Furthermore, each polymer film was subjected to a contact angle measurement (θ) with deionized (DI) water. This was obtained by dispensing 0.5 μl droplets of each reference liquid and taking an image of the drops with a VCA Optima goniometer camera (AST Products Inc.).
A Bruker Dektak XT profilometer was used to measure the dielectric layer thickness and roughness of the gate electrode surface. The thickness values were then used to correct the mobilities that were measured.
| div(εs∇φ) = −ρ | (3) |
![]() | (4) |
![]() | (5) |
and
are the electron and hole current density vectors, respectively,
is the electric field vector, μn and μp are the electron and hole mobility, respectively, Dn and Dp are the electron and hole diffusion coefficients, respectively, q is the elementary charge, n and p are the electron and hole concentrations, respectively. The simulator self-consistently solves eqn (3)–(5) over a 2D mesh that is defined to mimic the cross-section of a fabricated device. The two major outcomes of this process are geometric solutions of the electrostatic parameters and terminal current–voltage characteristics representing the integration of current densities under different bias conditions. An exponential trap DOS at the LUMO edge and a fixed interface charge density were added for the simulation of an OTFT with SiO2/OTS. The functional form of trap DOS is![]() | (6) |
000 cells per well in a 48 well plate and allowed to attach for 24 hours in an incubator at 37 °C in an environment characterized by 5% CO2 and 95% relative humidity. Subsequently, the medium was replaced with the degradation product extracts or fresh medium (control) and incubated for an additional 24 hours. Select cultures were evaluated for the metabolic activity of the cells with an alamarBlue assay (Thermo Fisher Scientific), according to the manufacturer's instructions. Additional cultures were incubated with 2 μM calcein AM (Invitrogen; live cell staining; green fluorescence) and 4 μM ethidium homodimer-1 (Sigma Aldrich; dead cell staining; red fluorescence) in DMEM for 10 minutes and imaged using a Zeiss Axio Observer 7 microscope. The degradation products from 5 OTFT devices were tested for both cell viability assays.
Footnote |
| † Electronic supplementary information (ESI) available. See DOI: https://doi.org/10.1039/d4ma01148a |
| This journal is © The Royal Society of Chemistry 2025 |