Highly end-doped silicon nanowires for field-effect transistors on flexible substrates

Abstract

We report on the VLS (vapour–liquid–solid) fabrication and characterization of in situ axially doped silicon nanowires (SiNWs) at both ends, and on their integration into a bottom gate–top contact geometry on both rigid and flexible substrates to realize field-effect transistors (FETs). To improve contact resistance between SiNWs and source/drain electrodes, we axially tuned the level of doping at both ends of the SiNWs by sequential in situ addition of PH₃. Characterisation of SiNWs by scanning spreading resistance microscopy in the device configuration allowed us to determine precisely the different sections of the SiNWs. The transfer to flexible substrates still allowed for workable FET structures. Transistors with electron mobilities exceeding 120 cm² V⁻¹ s⁻¹, I_on/I_off ratios greater than 10⁷ and ambipolar behaviour were achieved.

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Introduction

Over the past decade, sustained advances in macroelectronics have been achieved.¹ The fabrication of electronic devices on flexible substrates has attracted considerable attention owing to the huge market that is foreseen during the coming years for lightweight, flexible, cheap and portable consumer electronics. To date, efforts have focused mainly on organic semiconductors which are clearly well suited for large area, low-cost and low-temperature processes, the latter being a strong constraint inherent to the low thermal stability of plastics. Nevertheless, despite very significant improvement, intrinsic electronic properties of organics still limit the scope of their application. Inorganic nanomaterials and carbon nanotubes are also studied for macroelectronics, and promising results have been recently obtained for high-performance bendable and stretchable devices.^2–7

As a raw material, silicon nanowires (SiNWs) have many attractive properties, including good charge carrier mobility when compared to organics or amorphous silicon.^8,9 The CVD (chemical vapour deposition) synthesis temperature of SiNWs is not compatible with plastic substrates, but VLS (vapour–liquid–solid) nanowires can be first fabricated and then deposited by transfer techniques to realize electronic functions such as a field-effect transistor (FET) on solid or flexible substrates.^10,11 Goldman et al. have reported good p-type aligned SiNW device behaviour with threshold voltages of ca. 3.0 V and an on/off current ratio >10⁵.¹² Lieber's group has also demonstrated the elaboration of logic gates with SiNWs and has reported a 135 cm² V⁻¹ s⁻¹ value for hole mobility for SiNWs devices on flexible substrates.¹³

We report herein the synthesis of tailor-made SiNWs highly doped at both ends for the fabrication of SiNW-based FETs, and we present, more specifically, high-performance SiNW FETs fabricated at low temperature on flexible substrates.

The synthesis of SiNWs was realised by the VLS method as previously reported.^14,15 The ends of the SiNWs were doped in situ during the synthesis through addition of phosphine (1% PH₃ in hydrogen), with a P:Si ratio set to 2.10⁻² for the doped parts of the nanowires.¹⁶ The axial doping structure of these SiNWs can be represented as n⁺⁺–i–n⁺⁺, with n⁺⁺ corresponding to the highly doped parts and i to the intrinsic or unintentionally doped part. Gold catalyst was removed by placing the substrate in a IKI solution (Prolabo CMP) for 10 min. Phosphorous dopants were then activated by rapid thermal annealing at 750 °C (5 min in an RTA Addax oven) and surface dangling bond defects were passivated at 425 °C in forming gas (H₂/N₂ = 5%).

The devices were fabricated as fairly standard FETs in a bottom gate–top contact geometry by standard optical lithography, avoiding the common use of more complex technologies such as FIB, e-beam lithography or nanoimprint lithography. Top-contact stacking on SiNWs was chosen. Indeed, we observed high-resistance contacts when the SiNWs were just deposited on the source and drain contacts, whereas metal deposition on top of the SiNWs formed better contacts.

In the first part of the study, FETs are fabricated from SiNWs transferred onto highly As-doped silicon substrates, also used as gate electrodes, coated with 200 nm of thermal SiO₂ as a dielectric. Nanowires were transferred by directly sliding the growth substrate with SiNWs onto the transistor substrate, this simple technique allows an efficient alignment of SiNWs with rather low density.^17,18 Source and drain contacts were then processed with 5 to 10 μm channel lengths and 1000 μm channel width by standard UV photolithography and lift-off processes. Ni and Ti electrodes (thickness of ca. 30 nm) were deposited by metal evaporation just after removal of the SiNW oxide sheaths in the contact regions with buffered HF (1%). Ni and Ti were chosen because they provide low contact resistance.¹⁹ Ni-based devices were rapidly thermally annealed to generate Ni silicide (15 s at 450 °C in an RTA Addax oven, inset of Fig. 3) whereas no thermal treatment was applied to the Ti-based devices because of higher temperature (800 °C) of treatment needed.

Two main routes have been developed to enhance the electrical performance of SiNW FETs by reducing contact resistance. The first one is to generate metal silicide contacts which reduce the parasitic resistance and improve device and circuit performances.^20–23 The second one is to tune the level of doping along the axis of the SiNWs to afford conductive silicon areas.^24,25 Our strategy, also recently developed by Mayer et al.,²⁵ is to improve carrier injection by decreasing the contact resistance thanks to high doping at both ends of the SiNWs. Indeed, it is well known that contact resistance is negligible for the measurement of transconductance in heavily doped SiNW devices, while it makes a substantial contribution in lightly doped SiNW devices.⁹ For two-probe contact analysis, the total resistance is R_t = 2R_c + R_all SiNWs where 2R_c is the contact resistance at the source and drain electrodes, and R_all SiNWs corresponds to the resistance of all the nanowires bridging the channel. For a single SiNW, R_SiNW = R_undoped + 2R_{highly doped} with R = ρLS⁻¹ where ρ is the nanowire resistivity, L is the length of the active part of the nanowire and S the area of the nanowire section. The resistivities of undoped and doped (P:Si = 2 × 10⁻²) SiNWs reported in a previous work¹⁵ were respectively 44.4 Ω cm and 3.56 × 10⁻⁴ Ω cm, corresponding to doping concentrations of 1 × 10¹⁴ at cm⁻³ and 2 × 10¹⁹ at cm⁻³. It implies that R_undoped ≫ R_{highly doped} thus R_SiNW ≈ R_undoped. For instance, a 50 nm in diameter and 1 μm long SiNW has a resistance of R_undoped = 2.3 × 10⁸ Ω. In the devices, several SiNWs bridge the channel, acting as parallel resistors. The inverse of R_all SiNWs is equivalent to n/R_undoped where n is the number of nanowires bridging the channel. No more than 5 SiNWs were connected between electrodes, which means that R_all SiNWs could be estimated around 46 MΩ to 77 MΩ depending on the number of nanowires connecting the source and drain electrodes. From the FET characteristics, 2R_c values were calculated according to eqn (1) proposed by Jain:^26,27

where g_D is the conductance, C_ox is the gate dielectric capacitance, μ is the effective mobility, W and L are respectively the width and the length of the channel, V_g is the gate bias and V_t is the threshold voltage. 2R_c was found to be in the range of 2.1 × 10⁸ Ω to 7.0 × 10⁸ Ω which implies that R_t ranges from 2.5 × 10⁸ Ω to 7.8 × 10⁸ Ω depending on the number of SiNWs connected. According to our 2R_c estimation, no significant contact resistance difference was noticeable for Ni and Ti-based systems. Furthermore, the total resistance including contact and channel contributions can also be measured (source–drain bias current ratio) at low drain voltages without gate bias. The measured total resistance was between 2.0 × 10⁸ Ω and 8.9 × 10⁸ Ω which is in fair agreement with previously calculated R_t values. Thus, it seems reasonable to assume that the total resistance is mainly associated with the contribution of the contact resistance between the SiNW and source and drain electrodes. Moreover, due to the non-linear trend at low V_d of the output characteristics, these devices behave as Schottky barrier (SB) SiNW FETs, as already reported.^11,18,20,28

The different parts of the axially doped SiNWs were characterized and measured by scanning spreading resistance microscopy (SSRM) using a Dimension 3100 microscope from Veeco instruments. SSRM is an AFM-mode that maps simultaneously the topography and the local resistivity of the sample (Fig. 1).

Fig. 1 SSRM measurements performed on SiNWs bridged at both ends by two Ni pads, with characteristic pictures of (a) topography (Δz = 200 nm) and (c) resistivity mapping (ΔV = 20 V); scale bar is 1μm. (b) Schematic view of SiNWs axially doped at both ends.

Measurements were carried out with a 1 V source–drain bias and the use of a diamond-coated metallic tip. Fig. 1(a) depicts the topography of two NWs bridging the Ni electrodes (after thermal silicidation as previously described). Fig. 1(c) shows the electrical response correlated to the height image [Fig. 1(a)]. Two equivalent conductive parts are measured at both ends of the SiNWs, and a resistive internal part of 1.0 μm corresponding to the non-intentionally doped segment can be easily observed. The two conductive parts of the SiNWs correspond actually to the highly n-doped part and not to Ni silicides which are only few tens of nanometres long as observed by SEM (see Fig. 2 inset). The lengths of sections along the SiNWs axis measured by SSRM were in good agreement with the experimental parameters used during the VLS synthesis.

Fig. 2 Transfer curves I_dversusV_g at V_d = 2 V for transistors having Ti (black solid line, not annealed) or Ni (red dashed line, annealed) electrodes on non-flexible substrate. Inset: SEM image of the Ni silicide.

The number of SiNWs transferred and connected between the source and drain electrodes was roughly controlled by the pressure applied during the contact printing and then precisely measured by SEM. Representative transfer curves for SiNW FET fabricated on non flexible substrate with Ti or Ni electrodes are compared in Fig. 2.

For devices with nickel silicide, the FETs show an ambipolar behaviour, i.e. hole injection occurs for negative gate voltages and electron injection occurs for positive gate biases. Similar electronic transport for SiNW FETs was previously reported by Fisher et al. who clearly pointed out a transition from p-type enhancement mode FET to an ambipolar SiNW FET through nichrome gold contact annealing.²⁹ Colli et al. also investigated the electronic transport in ambipolar SiNWs as a function of the electrode metal.¹⁸ Ti or Ni contacts on SiNWs and rapid thermal annealing were evaluated in terms of contact resistance and band alignment. They observed that annealed Ni contacts yield the lowest device resistance and highest on/off ratio.

The effective mobilities of the FET (Table 1) were extracted from the measured transconductance of the current–voltage characteristics according to eqn (2) at V_d = 2 V:

where L is the channel length of the undoped part measured by SSRM, W is the channel width corresponding to the sum of the silicon nanowire diameters and C_ox is the gate dielectric capacitance.^20,22,30 The performances were measured on at least five devices. Mobility values given in Table 1 are probably slightly underestimated since no correction of the contact resistance effects was taken into account.

Table 1 Electrical parameters extracted for three different SiNW FET configurations

Devices [substrate/pad]	μ /cm^2 V^−1 s^−1	I on/Ioff	I off/A	V t/V	Charge carriers
Si/Ni	4.8	5.8 × 10^2	4.1 × 10^−10	10.0	e^−
	1.0 × 10^−2	8.9	4.2 × 10^−10	−25.0	h^+
Si/Ti	12.6	4 × 10^1	7.4 × 10^−9	−2.0	e^−
	—	—	—	—	h^+
PEN/Ti	101.0	1.2 × 10^7	2.0 × 10^−14	14.3	e^−
	4.0 × 10^−4	2.4 × 10^4	2.0 × 10^−14	−33.3	h^+

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Fig. 2 clearly shows that FETs with Ti contacts seem to lose their ambipolar behaviour on non-flexible substrates, in agreement with published results.¹⁸ The observed residual plateau can be ascribed to thermoionic emission.³¹ For Ni contacts an off state is clearly measured (I_off = 2 × 10⁻¹⁰ A). The lack of thermoionic emission in Ni-based devices may be related to a different SB between the metal and the SiNWs. Indeed, SB energy (for holes) is about 0.08 eV using Ti³¹ whereas SB (for holes) between Ni and SiNW is 0.57 eV.³² The I_on increase between the two devices is mainly due to the number of silicon nanowires connected between the source and drain. Effective electron mobilities are respectively 5 and 12 cm² V⁻¹ s⁻¹ for Ni and Ti contacts, in the same range but lower than the 28 cm² V⁻¹ s⁻¹ recently reported for axially doped SiNW FETs on non-flexible substrates.²⁵

In the second part of this study, the same SiNWs were transferred onto flexible substrates to evaluate the performances of flexible SiNW FETs. Poly(ethylenenaphthalate) (PEN) films TEONEX® Q65 were used as the flexible substrates. Gold (60 nm) was evaporated onto the films to form the gate electrode, then 800 nm of UV crosslinkable organic dielectric was spin-coated. SiNWs were transferred from their growth substrate onto the device (vide supra) and Ti or Ni-based source and drain electrodes were evaporated using optical lithography and a lift-off process. A schematic view and image of a flexible SiNW FET are presented in Fig. 3.

Due to low thermal stability of flexible substrate, no thermal annealing was carried out thereafter and thus no silicidation could be performed. Consequently, no functional transistors were obtained with Ni contacts as already reported by Byon et al. on non-flexible substrate,²⁹ but transistors were achieved for Ti electrodes. Transfer curves of FET using Ti electrodes on both flexible and non-flexible substrates are presented in Fig. 4.

Fig. 3 Stacking schematic view of a flexible FET having axially end-doped SiNWs in the channel, and image of a flexible device containing more than 50 linear transistors.

Fig. 4 High-performance ambipolar SiNW device on plastic. Comparison of transfer curves (V_d = 2 V) of non-flexible SiNW FET (black solid line) and flexible ambipolar SiNW FET (red dashed line) having both Ti pads as source and drain electrodes. Inset: SEM image of a SiNW in a flexible device connected between Ti electrodes with no thermal annealing.

For Ti contacts realised under identical processes, SiNW FET performance appears to be strongly substrate dependent. Flexible devices showed an ambipolar behaviour with a very low off current (I_off <5 × 10⁻¹⁴ A). Electrical values presented in Table 1 point out an on/off ratio higher than 10⁷, which is to our knowledge the highest value reported to date for flexible SiNW FETs. Moreover, an effective electron mobility ranging from 72 up to 124 cm² V⁻¹ s⁻¹ was measured on five devices, which is also a very promising result though non-negligible variation (101 cm² V⁻¹ s⁻¹ ± 28% for μ values) was observed. Although we have no clear explanation for such a difference between flexible and non-flexible substrates, all these results are very encouraging when compared to the literature.^{12,13,25,33,34} It is likely that surface potential at the organic dielectric/SiNW and SiO₂/SiNW interfaces are quite different due to differences in interface charges, interface energetics and interface dipoles. Moreover, it is known that Schottky barrier height at the source and drain contacts is tuned by surface potential Ψs.^35–37 Thus, different behaviours of SiNW FET devices on flexible and non-flexible substrates might be related to the modification of the Ti work function due to the dielectric nature which can significantly influence the surface potential near the bottom of the electrode and at the dielectric/SiNW interface. Further experiments are ongoing to investigate this issue.

Conclusion

In summary, a specific n-doped profile along the axis of SiNWs was designed by a VLS growth process. Integration of these heterostructured SiNWs by a bottom-up approach into FET has been performed on both non-flexible and flexible substrates. The SSRM technique allowed us to visualize and characterize the intrinsic or unintentionally doped part in between the highly doped ends. Ti-based SiNW devices were fabricated on flexible substrates at low temperature. They showed an ambipolar behaviour. Furthermore on/off ratios exceeding 10⁷ and electron mobilities of 124 cm² V⁻¹ s⁻¹ were measured. These performances are among the highest reported values in the literature for SiNW-based flexible devices. We hope the methods presented here should be applicable to more complex circuits such as OLED drivers or flexible sensors, and could be a useful direction for future development of macroelectronics based on SiNW FETs.

Acknowledgements

This research was supported partly by the European integrated project Hydromel NMP2-CT-2006-026622. The authors would like to acknowledge Dr D. Vuillaume for valuable discussions and Dr M. Heitzmann and S. Poncet for their help.

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