ALD-grown semimetallic TiS_x for hole injection into monolayer WSe₂

Abstract

Semimetal contacts have recently emerged as promising due to the remarkably low contact resistance of Bi and Sb to n-channel field effect transistors (FETs) prepared from two-dimensional (2D) transition metal dichalcogenide (TMD) semiconductors. However, hole injection in 2D semiconductors remains a bottleneck, hindering application of 2D devices in advanced logic nodes. In this study, we investigate the use of atomic layer deposition (ALD) to fabricate high work function semimetallic TiS_x interlayers for efficient hole injection into WSe₂, a 2D semiconductor of considerable interest due to its potential for next-generation scaled electronics. By employing ALD-grown semimetallic TiS_x combined with capping the device with MoO_x, we achieved a hole current of ∼64 µA µm⁻¹ at V_D = −1 V, a contact resistance of 10 ± 3 kΩ µm, and an I_ON/I_OFF ratio exceeding 10⁶ at room temperature. Hole injection may be favored because of a high work function and low density of states at the Fermi level of TiS_x, promoting a low Schottky barrier to the valence band of WSe₂, and by the van der Waals nature of the contacts. Performance is further aided by channel doping by MoO_x.

---

Introduction

Achieving low-resistance contacts for 2D p-channel field effect transistors (FETs) remains a key challenge for their integration into advanced technology nodes. Significant progress has been made with semimetallic contacts such as Bi¹ and Sb² and low-melting-point soft metal contacts (e.g., Sn and In),³ both of which have reduced contact resistance (R_C) and enhanced performance of n-channel FETs. However, the performance of p-channel FETs fabricated from TMDs is still compromised by high contact resistance.⁴ These semimetal and soft metal contacts have poor band alignments for hole injection, leading to high Schottky barrier (SB) heights, high R_C, and low current delivery. WSe₂ has emerged as a promising TMD for FETs capable of supporting both n- and p-channels.^5,6 Moreover, recent progress in scalable methods for synthesizing and transferring TMDs—particularly monolayer WSe₂—has opened new opportunities for practical device integration.⁷

A few studies have explored contact materials with high work functions such as MoO_x and Pt for hole injection. For example, FETs with the contact configuration Pd/MoO_x/WSe₂ exhibited on currents on the order of 10⁻⁷ A µm⁻¹,⁸ while Pt/WSe₂ contacts resulted in contact resistances for hole injection of 5.7 kΩ µm.⁹ There has been progress in van der Waals (vdW) contact schemes for hole injection, realized through metal transfer techniques¹⁰ or optimized evaporation,¹¹ avoiding covalent bonds with semiconductor that can lead to charge redistribution and significant perturbations in the 2D electronic band structure,^12,13 which can result in Fermi-level pinning, high Schottky barriers, and increased contact resistance. Moreover, various doping techniques such as NO_x,¹⁴ or O₂ plasma¹⁵ treatment have been employed, resulting in markedly reduced contact resistance on exfoliated multilayer flakes. However, all techniques fall short in achieving performance comparable to NMOS devices.^1,2

Another approach that has been explored is the use of 2D metals with high work functions. For example, 2D TaSe₂ has been used for hole injection into laser-doped regions of WSe₂ for p-channel FETs.¹⁶ Growing interest in employing 2D metallic contacts, such as VS₂,¹⁷ and NbS₂,¹⁸ for 2D MoS₂-based n-channel FETs, is similarly driven by their potential to reduce contact resistance for electron injection. When used on top of the semiconductor, such contacts interact weakly with 2D semiconductors through van der Waals (vdW) forces, leading to weaker Fermi level pinning.¹⁹ Moreover, the work function of 2D semimetals like graphene can be adjusted using an external electric field, providing control over the Schottky barrier height at 2D semimetal/semiconductor junctions.²⁰

Recent studies have demonstrated the potential of the layered semimetal titanium disulfide (TiS₂), in creating contacts to MoS₂. Using density functional theory (DFT), Gao et al. predicted that TiS₂ could be used as an ohmic contact on MoS₂ for hole injection and a Schottky contact for electrons, making it a versatile contact material.²¹ Zhang et al.²² explored the use of 2D semimetals with high work function as gate electrodes for n-channel transistors. The authors experimentally demonstrated that using the 2D semimetal TiS₂ with a measured ultrahigh work function (6.6 eV) by Kelvin-probe force microscopy (KPFM) as the gate can lead to transistors with a sub-0.1 V threshold voltage. This result paves the way for low-power electronics with improved gate control.

Research on atomic layer deposited (ALD)-grown TiS_x contacts for n-channel MoS₂ field-effect transistors further highlights the potential of this material and the use of ALD for source/drain contacts.²³ The ALD-grown TiS_x contacts of varying thicknesses to ALD-grown MoS₂ were compared with conventional evaporated Ti contacts. The authors found that MoS₂ FETs with approximately 1.2 nm thick TiS_x contacts outperformed Ti contacts, as key device metrics such as I_ON and R_C showed significant improvement with the use of the ultrathin TiS_x interlayers layers, despite exhibiting a higher Schottky barrier height than the Ti contacts, as well as modest device performance due to the use of ALD-grown MoS₂. Another study suggests that TiS₂/monolayer MoS₂ heterojunctions prepared by depositing TiS₂ by ALD exhibit reduced Fermi-level pinning (FLP) compared with conventional evaporated metal electrodes due to the formation of clean van der Waals contacts having an unexpectedly low work function of 4.33 eV measured by KPFM, which in turn improves the overall performance of the devices, including on current, subthreshold swing, and threshold voltage.²⁴

This work investigates the application of ALD-grown semimetallic TiS_x thin films for efficient hole injection into WSe₂. By leveraging the advantages of ALD, a powerful technique suitable for industrial-scale applications, we have exploited TiS_x for efficient hole injection in WSe₂-based devices. ALD enables the conformal deposition of layers, including as contacts for FETs, allowing for increasingly complex device architectures through precise control over film thickness and composition. This low-temperature thin-film synthesis method is compatible with conventional Si technology, in ideal cases offering excellent large-area uniformity, sub-monolayer thickness control, and conformality for high aspect ratio features. This research builds upon the growing interest in 2D semimetals for advanced transistor applications and contributes to the development of high-performance WSe₂ devices. Our investigation demonstrates the potential of WSe₂ p-channel FETs (pFETs) with semimetallic TiS_x contacts combined with MoO_x capping, achieving a remarkable on-state current of 64 µA µm⁻¹ at V_D = −1 V for the best device and a contact resistance of 10 ± 3 kΩ µm. These results underscore the viability of WSe₂ for CMOS applications and highlight the significant progress in overcoming the hurdles associated with hole injection in 2D semiconductors.

Experimental approach

Materials synthesis and characterization

Monolayer WSe₂ was synthesized by metal–organic chemical vapor deposition (MOCVD) on double-side polished 2″ prescored c-plane sapphire as previously described²⁵ were obtained from the 2D Crystal Consortium (2DCC) at Pennsylvania State University and cleaved into smaller pieces for sample fabrication. Atomic force microscopy (AFM) images and Raman spectra are shown in Fig. S1.

Titanium sulfide (TiS_x) was grown by thermal ALD using tetrakis(dimethylamido)titanium (TDMATi) and hydrogen sulfide (H₂S). The substrate and chamber were heated to 100 °C and TDMATi was set at 75 °C. The H₂S flow was supplied at 40 sccm and diluted by 70 sccm Ar. The growth of TiS_x in a saturation study was monitored using an in situ quartz crystal microbalance (QCM), as shown in Fig. S2. The QCM was coated with TiS_x prior to the saturation study (during chamber conditioning) to minimize the effect of a nucleation delay on the measurement. The saturation study was conducted to confirm that TiS_x growth was a self-limiting process. Based on the saturation study, the dose for saturation of TDMATi was found to be 0.06 s, while for H₂S it was 2 s.

The recipe for the TiS_x layer was a 0.06 s TDMATi pulse followed by a 15 s Ar purge. The H₂S was then introduced for 30 s (longer than the minimum dose required for saturation but consistent with Basuvalingam et al.²⁶) and another 30 s Ar purge was performed to remove unreacted H₂S and byproducts from the reactor. A nucleation delay occurred while depositing TiS_x on WSe₂. AFM images (Fig. 1) reveal that 50 cycles of TiS_x layer on WSe₂ is not fully continuous, displaying islands. In contrast, 100 cycles of TiS_x appear to achieve complete coverage of the WSe₂ surface.

Fig. 1 AFM images: (a) 50 cycles of TiS_x on WSe₂ (b) 100 cycles of TiS_x on WSe₂.

Step edges were also measured using AFM (Fig. S3). A measurable step edge was not detected after 50 cycles. However, 84 cycles resulted in a layer ∼5 nm thick, while 100 cycles resulted in ∼7 nm and 150 cycles resulted in ∼13 nm.

Fig. 2 shows the Raman spectrum of ALD grown TiS_x on SiO₂/Si. The synthesized TiS_x in Fig. 2(a) shows two Raman peaks at ∼230 and ∼340 cm⁻¹, corresponding to the in-plane E_g and out-of-plane A_1g modes of 1T-TiS₂.²⁴ Fig. 2(b) presents a comparison of the Raman spectra for 100 cycles and 50 cycles of TiS_x deposited on WSe₂. The peaks of WSe₂ show no noticeable changes or deterioration, confirming that the underlying WSe₂ remains intact, suggesting that van der Waals (vdW) contacts might be formed by depositing TiS_x onto WSe₂ (as was the case for TiS_x onto MoS₂).²⁴

Fig. 2 Raman spectra of ALD grown TiS_x at 100 °C (a) on SiO₂/Si and (b) on WSe₂.

High resolution X-ray photoelectron spectroscopy (XPS) of a freshly deposited layer of TiS_x deposited at 100 °C was performed in a PHI-VersaProbe II (Physical Electronics Inc.) using a monochromated Al source. An initial survey was collected, and peaks were correct using the position of the C 1s. A 2 kV Ar ion beam was then used to etch layers, and high-resolution spectra for the O 1s, C 1s, N 1s, Ti 2p, W 5p and S 3s peaks were collected at the outset and after each cycle of ion-beam etching to obtain a depth profile. Data analysis was performed using CasaXPS software. A freshly exfoliated TiS₂ crystal was also used to calibrate the relative sensitivity factors (RSF) of Ti 2p and S 3s. Using XPS, we found a Ti : S ratio of 1 : 1.7 in the interior of the deposited layer. Some oxygen was observed in the film (<10%), bringing the ratio of Ti : (S + O) to approximately 1 : 1.9. The depth profile is shown in Fig. S4.

Device fabrication

To fabricate the devices, we transferred the WSe₂ monolayer onto Al₂O₃/Pt/Ti/p + Si or Si₃N₄/p + Si via poly(methyl methacrylate) (PMMA)-assisted wet-transfer.²⁷ To define the channel regions of the WSe₂ FETs, we adhered to the recipe detailed in our recent publication.²⁸ For defining the source and drain contacts, we introduce a lift-off method for TiS_x grown at 100 °C using a dual PMMA photoresist. Both A3 and A6 PMMA layers were spin-coated onto the samples at 4000 rpm. Electron beam lithography was then employed to define the contact patterns, followed by development in the same MIBK : IPA solution. Contacts were deposited using ALD for TiS_x and e-beam evaporation for 30 nm of Au. Finally, the samples underwent a lift-off process to remove excess resist and metal by immersion in acetone for 1 h, followed by IPA for an additional 30 min. Capping of devices by MoO_x was accomplished using thermal evaporation at a rate of 0.05 nm s⁻¹ for a thickness of 10 nm.

Results and discussion

First, we measured control devices with Au contacts (reference devices), then devices with TiS_x interlayer beneath the Au contacts. The transfer characteristics, i.e., source-to-drain current (I_D) versus V_BG of the WSe₂ FETs for a constant drain voltage (V_D) of −1 V, are shown for different channel lengths L_CH = 200 nm, 300 nm, and 500 nm with no TiS_x (reference Au contacts) in Fig. 3(a–c). The devices display ambipolar behavior. Fig. 3(d) shows the variation in I_ON current for different channel lengths. The maximum ON current varies slightly with channel length, with 200 nm channels showing an average maximum ON current of 1.9 µA µm⁻¹, 300 nm channels yielding 2 µA µm⁻¹, and 500 nm channels exhibiting 1.8 µA µm⁻¹ for the p-channel. The average subthreshold slope is 1.4 V dec⁻¹ for the 200 nm channel, 1.7 V dec⁻¹ for the 300 nm channel and 1.6 V dec⁻¹ for the 500 nm channel while the mobility is 0.41 cm² V⁻¹ s for the 200 nm channel, 0.30 cm² V⁻¹ s for the 300 nm channel, and 0.27 cm² V⁻¹ s for the 500 nm channel, respectively. We note that the measured field-effect mobility can be affected by the contacts and is not a fundamental materials property.

Fig. 3 Au contacts to WSe₂. Transfer characteristics with different channel lengths of (a) 200 nm, (b) 300 nm, and (c) 500 nm and (d) maximum ON current variation in different channel lengths.

Then we studied the contacts with two different TiS_x thicknesses beneath Au. All devices with TiS_x contacts, regardless of thickness, continued to exhibit ambipolar characteristics but showed an enhanced p-branch compared to the reference device. This improvement is likely due to the higher work function of TiS_x, which exceeds that of Au (∼5.2 eV). Thus, TiS_x contacts appear to enhance hole injection, likely due to its high work function and the formation of clean contacts with WSe₂. The transfer characteristics curve and maximum ON current variation with 100 cycles (∼7 nm) TiS_x contacts with different channel lengths are shown in Fig. 4. For the 7 nm contact, the ON current also varies with channel length: 200 nm channels exhibit an average maximum ON current of 6.8 µA µm⁻¹, 300 nm channels yield 7.0 µA µm⁻¹, and 500 nm channels show 6.9 µA µm⁻¹. The average subthreshold slope is 2 V dec⁻¹ for the 200 nm channel, 1.6 V dec⁻¹ for the 300 nm channel, and 1.8 V dec⁻¹ for the 500 nm channel, respectively, while the average mobility is 0.89 cm² V⁻¹ s for the 200 nm channel, 0.43 cm² V⁻¹ s for the 300 nm channel, and 0.65 cm² V⁻¹ s for the 500 nm channel. Table S1 provides the device parameters for all these samples in our study.

Fig. 4 7 nm TiS_x contacts to WSe₂. Transfer characteristic curves with different channel lengths of (a) 200 nm, (b) 300 nm, and (c) 500 nm and (d) maximum ON current variation in different channel lengths.

The average ON-state current is nearly four times higher than the devices with the Au reference contacts. However, decreasing the TiS_x thickness from 100 cycles (∼7 nm) to 84 cycles (∼5 nm) resulted in a decrease in average maximum ON current from 6.8 µA µm⁻¹ to 2.6 µA µm⁻¹ for the 200 nm channel, while from 7.0 µA µm⁻¹ to 2.3 µA µm⁻¹ for the 300 nm channel, and from 6.9 µA µm⁻¹ to 2.7 µA µm⁻¹ for the 500 nm channel shown in Fig. 5. A similar decreasing trend in ON current was also observed in a previous study for TiS_x/MoS₂.²³ When including all data points from the TLM structures at a fixed overdrive voltage such as −11.5 V for 5 nm and −13 V for 7 nm TiS_x contacts, the resulting TLM plots (Fig. S5) do not yield a clear trend, making it unsuitable for extracting the contact resistance for both cases. The performance was slightly better for contacts with 100 cycles (∼7 nm) of TiS_x interlayers. We repeated the measurement with a 7 nm TiS_x layer on a Si wafer with a 100 nm Si₃N₄ dielectric and observed a similar on-state current to the devices with 50 nm Al₂O₃ as the dielectric, as shown in Fig. S6.

Fig. 5 5 nm TiS_x contacts to WSe₂. Transfer characteristics with different channel lengths of (a) 200 nm, (b) 300 nm, and (c) 500 nm. (d) Maximum ON current variation in different channel lengths with standard deviation.

MoO_x capping to boost performance

To further enhance the I_ON, we capped the pFETs with a 10 nm MoO_x layer (sheet resistance > 1 MΩ □⁻¹) deposited via thermal evaporation. Modulation doping as well as an enhancement of I_ON can be induced by a MoO_x capping layer on pFETs.⁷ Following the optimization of TiS_x contacts and capping layers, we observed enhanced transport characteristics in the WSe₂ pFETs by incorporating MoO_x caps. The transfer characteristics for all monolayer WSe₂ pFET are shown in Fig. 6(a–d). The originally ambipolar behavior observed in WSe₂ FETs with TiS_x contacts was converted to completely unipolar (p-type) transport through MoO_x doping. The variation in ON current is shown in Fig. 6(e). The maximum I_D for a pFET with the 7 nm TiS_x/30 nm Au contact and a 10 nm MoO_x cap is 64 µA µm⁻¹ for V_D = −1 V. This represents around 6× improvement in ON current compared to devices without MoO_x, using TiS_x contacts alone. Fig. 6(f) shows a representative output characteristic for a one-monolayer WSe₂ pFET. Initially, we observe linear behavior up to V_D = −0.1 V; however, as the drain voltage increases, particularly around V_D = −1 V, the I_D–V_D characteristics become somewhat increasingly nonlinear. The nonlinearity in contact behavior is likely due to not being perfectly ohmic. Similar nonlinearities have been reported for Pt contacts to WSe₂ and Pd contacts to MoS₂,¹¹ and Cr contacts to laser doped WSe₂,¹⁶ which were all attributed to the presence of Schottky barriers. Likewise, a small Schottky barrier was observed for ALD-grown TiS_x contacts to MoS₂.²⁴ Transfer-length method (TLM) test structures were used to estimate the contact resistances of the optimized monolayer WSe₂ pFETs to extract R_C. Since the device yield was relatively low (∼25%) excluding the devices gave almost no current, we were unable to obtain a complete set of data from a single TLM structure. The low device yield can be attributed to several factors: the WSe₂ may contain gaps regions, the TiS_x film may not have nucleated uniformly across the contact area, and physical damage such as probe-induced scratching during measurements may have made it impossible to probe some devices.

Fig. 6 Transfer characteristics, i.e., source-to-drain current (I_D) versus back-gate voltage (V_BG) for a constant drain voltage for different channel lengths: (a) 200 nm, (b) 300 nm, (c) 500 nm, (d) 800 nm. (e) Maximum ON current variation with standard deviation. (f) Output characteristics (I_D–V_D) for different back-gate voltages.

To estimate the contact resistance, we combined results from multiple TLM structures at a fixed overdrive voltage (−32.5 V), which translates into a carrier density of n_s = 1.51 × 10¹³ cm⁻². To better extract the slope for contact resistance, we excluded a data point (marked in red) that deviated significantly. We extracted contact resistance of 10 ± 3 kΩ µm from the Fig. 7(a). The most recent p-channel WSe₂ FETs using high-work function 2D TaSe₂ combined with laser doping¹⁶ reported a contact resistance of 11 kΩ µm, which is similar.

Fig. 7 (a) Resistance vs. channel length for the extraction of contact resistance (n_s = 1.51 × 10¹³ cm⁻²). (b) Comparison of I_ON at V_D = −1 V for the best 7 nm TiS_x contacts with MoO_x capping on 1L WSe₂ p-channel FETs.

Some improvements for future devices are recommended. The subthreshold slope (SS) was 3.5 V dec⁻¹, significantly higher than the ideal value of ∼60 mV dec⁻¹, attributed to the thicker oxide stack and non-idealities like interface traps.²⁹ To improve the SS, the use of high-k dielectric materials and a thinner oxide stack could be employed.³⁰ We also observed hysteresis in our WSe₂-based FETs, as shown in Fig. S7, which could be due to charge trapping and measurements being conducted under ambient conditions.^31,32 To see saturation in the transfer characteristics, we therefore chose gate voltage sweeping from positive to negative for analysis.

Fig. 7(b) benchmarks the I_ON versus channel length for our study, alongside previous studies of monolayer CVD and exfoliated WSe₂ FETs.^7,14,33–39 The I_ON for our best pFET is high among CVD 1L WSe₂ reported in the literature. These devices demonstrate high performance for pFETs, making them a promising technology for advancing WSe₂ FETs toward 2D CMOS electronics and advanced logic applications.

Conclusion

In this study, we leveraged atomic layer deposition (ALD) to create high-work function semimetallic TiS_x contacts to facilitate efficient hole injection into WSe₂. The electrical performance of various contact configurations was evaluated for efficient hole injection into WSe₂. MoO_x capping layer onto the monolayer WSe₂ p-channel also led to a dramatic improvement in the on-state current. The TiS_x/Au-contacted FETs with 200 nm channels achieved a maximum I_ON of ∼64 µA µm⁻¹ at V_D = −1 V. Additionally, the devices with the low contact resistance of 10 ± 3 kΩ µm at a carrier concentration of 1.51 × 10¹³ cm⁻² exhibited an I_ON/I_OFF ratio exceeding 10⁶, indicating excellent switching performance. Thus, our approach utilizing ALD-grown TiS_x interlayers in source/drain contacts with MoO_x capping of the channel presents a promising pathway for fabricating high-performance 2D FETs with significantly lower contact resistance for future nanoelectronics.

Author contributions

M. S. R. conceived the idea and developed the study under the guidance of S. E. M. M. S. R. fabricated the devices, conducted the electrical measurements and characterized the data. C. W. C. conducted the growth of ALD and XPS of TiS_x films and x-ray photoel. M. S. R and C. W. C wrote the draft, and S. E. M revised the manuscript.

Conflicts of interest

There are no conflicts to declare.

Data availability

Data are provided in the supplementary information (SI), and for the growth of the WSe₂ epilayers, in the repository cited as ref. 19.

Supplementary information: AFM image showing a monolayer of WSe₂ with some bilayers (triangular shape) along with a Raman spectrum of CVD-grown WSe₂ before metallization. Approximate GPC from QCM saturation study. Representative AFM image of a step edge. XPS depth profile of a TiS_x film deposited on WSe₂/Al₂O₃ at 100 °C by ALD. Data points from TLM test structures. 7 nm TiS_x contacts to WSe₂ on Si₃N₄. Hysteresis in devices with Au contacts for V_D = −1 V. Contact configurations and device performance. See DOI: https://doi.org/10.1039/d5ra06569k.

Acknowledgements

The authors acknowledge the primary financial support of the National Science Foundation (NSF) through ECCS 2227346. Epilayers were provided by the Penn State 2D Crystal Consortium–Materials Innovation Platform (2DCC-MIP) under NSF DMR 2039351. The authors are also grateful to Yu Sheng Li at Penn State for help with AFM and Eilam Yalon and Emmanuel Ber at The Technion for helpful discussion.

References

1. P. C. Shen, C. Su, Y. Lin, A. S. Chou, C. C. Cheng, J. H. Park, M. H. Chiu, A. Y. Lu, H. L. Tang, M. M. Tavakoli, G. Pitner, X. Ji, Z. Cai, N. Mao, J. Wang, V. Tung, J. Li, J. Bokor, A. Zettl, C. I. Wu, T. Palacios, L. J. Li and J. Kong, Ultralow Contact Resistance between Semimetal and Monolayer Semiconductors, Nature, 2021, 593(7858), 211–217,  DOI:10.1038/s41586-021-03472-9.
2. A.-S. Chou, T. Wu, C.-C. Cheng, S.-S. Zhan, I.-C. Ni, S.-Y. Wang, Y.-C. Chang, S.-L. Liew, E. Chen, W.-H. Chang, C.-I. Wu, J. Cai, H.-S. P. Wong and H. Wang, Antimony Semimetal Contact with Enhanced Thermal Stability for High Performance 2D Electronics, in. 2021 IEEE International Electron Devices Meeting (IEDM), IEEE, 2021, pp. 721–724,  DOI:10.1109/IEDM19574.2021.9720608.
3. A. Kumar, K. Schauble, K. M. Neilson, A. Tang, P. Ramesh, H.-S. P. Wong, E. Pop and K. Saraswat, Sub-200 Ω·µm Alloyed Contacts to Synthetic Monolayer MoS₂, in. 2021 IEEE International Electron Devices Meeting (IEDM), IEEE, 2021, pp. 731–734,  DOI:10.1109/IEDM19574.2021.9720609.
4. Y. Wang and M. Chhowalla, Making Clean Electrical Contacts on 2D Transition Metal Dichalcogenides, Nat. Rev. Phys., 2022, 4(2), 101–112,  DOI:10.1038/s42254-021-00389-0.
5. S. Das and J. Appenzeller, WSe₂ Field Effect Transistors with Enhanced Ambipolar Characteristics, Appl. Phys. Lett., 2013, 103(10), 103501,  DOI:10.1063/1.4820408.
6. Z. Wang, Q. Li, Y. Chen, B. Cui, Y. Li, F. Besenbacher and M. Dong, The Ambipolar Transport Behavior of WSe₂ Transistors and Its Analogue Circuits, NPG Asia Mater., 2018, 10(8), 703–712,  DOI:10.1038/s41427-018-0062-1.
7. A.-S. Chou, Y.-T. Lin, Y. C. Lin, C.-H. Hsu, M.-Y. Li, S.-L. Liew, S.-A. Chou, H.-Y. Chen, H.-Y. Chiu, P.-H. Ho, M.-C. Hsu, Y.-W. Hsu, N. Yang, W.-Y. Woon, S. Liao, D.-H. Hou, C.-H. Chien, W.-H. Chang, I. Radu, C.-I. Wu, H.-S. Philip Wong and H. Wang, High-Performance Monolayer WSe₂ p/n FETs via Antimony-Platinum Modulated Contact Technology towards 2D CMOS Electronics, in. 2022 International Electron Devices Meeting (IEDM), IEEE, 2022; pp. pp. 721–724,  DOI:10.1109/IEDM45625.2022.10019491.
8. S. Chuang, C. Battaglia, A. Azcatl, S. McDonnell, J. S. Kang, X. Yin, M. Tosun, R. Kapadia, H. Fang, R. M. Wallace and A. Javey, MoS₂ P-Type Transistors and Diodes Enabled by High Work Function MoO_x Contacts, Nano Lett., 2014, 14(3), 1337–1342,  DOI:10.1021/nl4043505.
9. N. H. Patoary, J. Xie, G. Zhou, F. Al Mamun, M. Sayyad, S. Tongay and I. S. Esqueda, Improvements in 2D P-Type WSe₂ Transistors towards Ultimate CMOS Scaling, Sci. Rep., 2023, 13(1), 3304,  DOI:10.1038/s41598-023-30317-4.
10. Y. Liu, S. Liu, Z. Wang, B. Li, K. Watanabe, T. Taniguchi, W. J. Yoo and J. Hone, Low-Resistance Metal Contacts to Encapsulated Semiconductor Monolayers with Long Transfer Length, Nat. Electron., 2022, 5(9), 579–585,  DOI:10.1038/s41928-022-00808-9.
11. Y. Wang, J. C. Kim, Y. Li, K. Y. Ma, S. Hong, M. Kim, H. S. Shin, H. Y. Jeong and M. Chhowalla, P-Type Electrical Contacts for 2D Transition-Metal Dichalcogenides, Nature, 2022, 610(7930), 61–66,  DOI:10.1038/s41586-022-05134-w.
12. J. Kang, W. Liu, D. Sarkar, D. Jena and K. Banerjee, Computational Study of Metal Contacts to Monolayer Transition-Metal Dichalcogenide Semiconductors, Phys. Rev. X, 2014, 4(3), 031005,  DOI:10.1103/PhysRevX.4.031005.
13. C. Gong, L. Colombo, R. M. Wallace and K. Cho, The Unusual Mechanism of Partial Fermi Level Pinning at Metal–MoS₂ Interfaces, Nano Lett., 2014, 14(4), 1714–1720,  DOI:10.1021/nl403465v.
14. P. Zhao, D. Kiriya, A. Azcatl, C. Zhang, M. Tosun, Y.-S. Liu, M. Hettick, J. S. Kang, S. McDonnell, S. KC, J. Guo, K. Cho, R. M. Wallace and A. Javey, Air Stable P-Doping of WSe₂ by Covalent Functionalization, ACS Nano, 2014, 8(10), 10808–10814,  DOI:10.1021/nn5047844.
15. C. Pang, T. Y. T. Hung, A. Khosravi, R. Addou, Q. Wang, M. J. Kim, R. M. Wallace and Z. Chen, Atomically Controlled Tunable Doping in High-Performance WSe₂ Devices, Adv. Electron. Mater., 2020, 6(8), 1901304,  DOI:10.1002/aelm.201901304.
16. B. Liu, X. Yue, C. Sheng, J. Chen, C. Tang, Y. Shan, J. Han, S. Shen, W. Wu, L. Li, Y. Lu, L. Hu, R. Liu, Z. J. Qiu and C. Cong, High-Performance Contact-Doped WSe₂ Transistors Using TaSe2 Electrodes, ACS Appl. Mater. Interfaces, 2024, 16(15), 19247–19253,  DOI:10.1021/acsami.4c01605.
17. W. S. Leong, Q. Ji, N. Mao, Y. Han, H. Wang, A. J. Goodman, A. Vignon, C. Su, Y. Guo, P.-C. Shen, Z. Gao, D. A. Muller, W. A. Tisdale and J. Kong, Synthetic Lateral Metal-Semiconductor Heterostructures of Transition Metal Disulfides, J. Am. Chem. Soc., 2018, 140(39), 12354–12358,  DOI:10.1021/jacs.8b07806.
18. H. Bark, Y. Choi, J. Jung, J. H. Kim, H. Kwon, J. Lee, Z. Lee, J. H. Cho and C. Lee, Large-Area Niobium Disulfide Thin Films as Transparent Electrodes for Devices Based on Two-Dimensional Materials, Nanoscale, 2018, 10(3), 1056–1062,  10.1039/C7NR07593F.
19. Y. Liu, P. Stradins and S.-H. Wei, Van Der Waals Metal-Semiconductor Junction: Weak Fermi Level Pinning Enables Effective Tuning of Schottky Barrier, Sci. Adv., 2016, 2(4), e1600069,  DOI:10.1126/sciadv.1600069.
20. Y.-J. Yu, Y. Zhao, S. Ryu, L. E. Brus, K. S. Kim and P. Kim, Tuning the Graphene Work Function by Electric Field Effect, Nano Lett., 2009, 9(10), 3430–3434,  DOI:10.1021/nl901572a.
21. J. Gao and M. Gupta, Titanium Disulfide as Schottky/Ohmic Contact for Monolayer Molybdenum Disulfide, npj 2D Mater. Appl., 2020, 4(1), 26,  DOI:10.1038/s41699-020-00161-5.
22. T. Zhang, J. Miao, C. Huang, Z. Bian, M. Tian, H. Chen, R. Duan, L. Wang, Z. Liu, J. Qiao, Y. Xu, B. Yu and Y. Zhao, 2D Semimetal with Ultrahigh Work Function for Sub-0.1 V Threshold Voltage Operation of Metal-Semiconductor Field-Effect Transistors, Mater. Des., 2023, 231, 112035,  DOI:10.1016/j.matdes.2023.112035.
23. R. Mahlouji, W. M. M. E. Kessels, A. A. Sagade and A. A. Bol, ALD-Grown Two-Dimensional TiS_x Metal Contacts for MoS₂ Field-Effect Transistors, Nanoscale Adv., 2023, 5(18), 4718–4727,  10.1039/D3NA00387F.
24. H. Yoon, S. Lee, J. Seo, I. Sohn, S. Jun, S. Hong, S. Im, Y. Nam, H.-J. Kim, Y. Lee, S. Chung and H. Kim, Investigation on Contact Properties of 2D van Der Waals Semimetallic 1T-TiS₂/MoS ₂ Heterojunctions, ACS Appl. Mater. Interfaces, 2024, 16(9), 12095–12105,  DOI:10.1021/acsami.3c18982.
25. H. Zhu, N. Nayir, T. H. Choudhury, A. Bansal, B. Huet, K. Zhang, A. A. Puretzky, S. Bachu, K. York, T. V. Mc Knight, N. Trainor, A. Oberoi, K. Wang, S. Das, R. A. Makin, S. M. Durbin, S. Huang, N. Alem, V. H. Crespi, A. C. T. van Duin and J. M. Redwing, Step Engineering for Nucleation and Domain Orientation Control in WSe₂ Epitaxy on C-Plane Sapphire, Nat. Nanotechnol., 2023, 18(11), 1295–1302,  DOI:10.1038/s41565-023-01456-6.
26. S. B. Basuvalingam, Y. Zhang, M. A. Bloodgood, R. H. Godiksen, A. G. Curto, J. P. Hofmann, M. A. Verheijen, W. M. M. Kessels and A. A. Bol, Low-Temperature Phase-Controlled Synthesis of Titanium Di- and Tri-Sulfide by Atomic Layer Deposition, Chem. Mater., 2019, 31(22), 9354–9362,  DOI:10.1021/acs.chemmater.9b02895.
27. F. Zhang, C. Erb, L. Runkle, X. Zhang and N. Alem, Etchant-Free Transfer of 2D Nanostructures, Nanotechnology, 2018, 29(2), 025602,  DOI:10.1088/1361-6528/aa9c21.
28. M. Saifur Rahman, A. D. Agyapong and S. E. Mohney, Effect of Physical Vapor Deposition on Contacts to 2D MoS₂, J. Appl. Phys., 2024, 136(22), 224303,  DOI:10.1063/5.0231261.
29. S. Ghosh, Y. Zheng, Z. Zhang, Y. Sun, T. F. Schranghamer, N. U. Sakib, A. Oberoi, C. Chen, J. M. Redwing, Y. Yang and S. Das, Monolithic and Heterogeneous Three-Dimensional Integration of Two-Dimensional Materials with High-Density Vias, Nat. Electron., 2024, 7(10), 892–903,  DOI:10.1038/s41928-024-01251-8.
30. J.-S. Ko, A. Shearer, S. Lee, K. Neilson, M. Jaikissoon, K. Kim, S. Bent, K. Saraswat and E. Pop, Achieving 1-Nm-Scale Equivalent Oxide Thickness Top Gate Dielectric on Monolayer Transition Metal Dichalcogenide Transistors with CMOS-Friendly Approaches, in. 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), IEEE, 2024, pp. 1–2,  DOI:10.1109/VLSITechnologyandCir46783.2024.10631360.
31. F. Ali, H. Choi, N. Ali, Y. Hassan, T. D. Ngo, F. Ahmed, W. Park, Z. Sun and W. J. Yoo, Achieving Near-Ideal Subthreshold Swing in P-Type WSe₂ Field-Effect Transistors, Adv. Electron. Mater., 2024, 10(9), 2400071,  DOI:10.1002/aelm.202400071.
32. C. Liu, X. Yan, P. Zhou and D. W. Zhang, Mobility Enhancement and Hysteresis Phenomenon in WSe₂ FETs, in. 2016 IEEE 16th International Conference on Nanotechnology (IEEE-NANO), IEEE, 2016, pp. 180–183,  DOI:10.1109/NANO.2016.7751488.
33. K. Maxey, C. H. Naylor, K. P. O'Brien, A. Penumatcha, A. Oni, C. Mokhtarzadeh, C. J. Dorow, C. Rogan, B. Holybee, T. Tronic, D. Adams, N. Arefin, A. Sen Gupta, C.-C. Lin, T. Zhong, S. Lee, A. Kitamura, R. Bristol, S. B. Clendenning, U. Avci and M. Metz, 300 Mm MOCVD 2D CMOS Materials for More (Than) Moore Scaling, in. 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), IEEE, 2022, pp. 419–420,  DOI:10.1109/VLSITechnologyandCir46769.2022.9830457.
34. C.-C. Chiang, H.-Y. Lan, C.-S. Pang, J. Appenzeller and Z. Chen, Air-Stable P-Doping in Record High-Performance Monolayer WSe₂ Devices, IEEE Electron Device Lett., 2022, 43(2), 319–322,  DOI:10.1109/LED.2021.3135312.
35. B. Liu, Y. Ma, A. Zhang, L. Chen, A. N. Abbas, Y. Liu, C. Shen, H. Wan and C. Zhou, High-Performance WSe₂ Field-Effect Transistors via Controlled Formation of In-Plane Heterojunctions, ACS Nano, 2016, 10(5), 5153–5160,  DOI:10.1021/acsnano.6b00527.
36. L. Kong, X. Zhang, Q. Tao, M. Zhang, W. Dang, Z. Li, L. Feng, L. Liao, X. Duan and Y. Liu, Doping-Free Complementary WSe2 Circuit via van Der Waals Metal Integration, Nat. Commun., 2020, 11(1), 1866,  DOI:10.1038/s41467-020-15776-x.
37. M. Yamamoto, S. Nakaharai, K. Ueno and K. Tsukagoshi, Self-Limiting Oxides on WSe₂ as Controlled Surface Acceptors and Low-Resistance Hole Contacts, Nano Lett., 2016, 16(4), 2720–2727,  DOI:10.1021/acs.nanolett.6b00390.
38. M. Li, X. Zhang, Z. Zhang, G. Peng, Z. Zhu, J. Li, S. Qin and M. Zhu, Unipolar P-Type Monolayer WSe₂ Field-Effect Transistors with High Current Density and Low Contact Resistance Enabled by van Der Waals Contacts, Nano Res., 2024, 17(11), 10162–10169,  DOI:10.1007/s12274-024-6942-5.
39. H.-Y. Lan, C.-P. Lin, L. Liu, J. Cai, Z. Sun, P. Wu, Y. Tan, S.-H. Yang, T.-H. Hou, J. Appenzeller and Z. Chen, Uncovering the Doping Mechanism of Nitric Oxide in High-Performance P-Type WSe₂ Transistors, Nat. Commun., 2025, 16(1), 4160,  DOI:10.1038/s41467-025-59423-9.

---