Surface charge transfer doping induced inversion layer for high-performance graphene/silicon heterojunction solar cells

Abstract

Graphene/silicon heterojunction solar cells have stimulated enormous research interests due to simple device architecture and low-cost solution-processing capability. Graphene can serve as p-type layer to form heterojunction with n-type crystalline Si. However, improvement of device performance is hindered by the relatively low junction height arising from the small work function of graphene. Herein, for the first time, we develop and implement a surface inversion layer on Si substrates by surface charge transfer doping (SCTD) scheme using a layer of high work function metal oxide (MoO₃) as a hole injection layer on Si surface. Spontaneous hole injection from the MoO₃ layer to Si led to the generation of a hole inversion layer on Si surface, greatly enhancing the built-in electric potential and suppressing the carrier recombination. The use of SCTD method, in combination with additional device optimization by graphene doping and polymer anti-reflection coating, results in a high power conversion efficiency approaching 12.2%. The SCTD scheme provides a new platform to further enhance the performance of graphene/silicon heterojunction solar cells.

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1. Introduction

In comparison with traditional Si p–n junction solar cells, graphene/Si (Gr/Si) heterojunction solar cells can not only inherit the advantage of Si p–n junction solar cells with high-efficiency and high stability, but also wipe off the complicated procedures of ion implantation or the high-temperature diffusion process (>1000 °C) that results in the decrease of Si minority carrier lifetime.¹ Both the potentially high performance and the cost-effective fabrication procedure make the Gr/Si heterojunction promising candidates for new-generation solar cells. Up to now, various methods have been developed to improve the performance of Gr/Si heterojunction solar cells. From the aspect of optical management, a variety of Si micro/nanostructures that have strong light trapping capabilities, including Si micro/nano wires,^2,3 pillars,⁴ and holes^5,6etc., were adopted to reduce the light waste resulting from the high reflection of planar Si. Antireflection coating of TiO₂ layer⁷ and the use of metal particles with surface plasmon resonance effects⁸ also show the capability to enhance light absorption of the solar cells. On the other hand, surface recombination of Si, especially for Si micro/nanostructures with large surface area, remains a key issue that limits the performance of Gr/Si heterojunction solar cells. To suppress the recombination, surface passivation on Si surface with methyl (CH₃–) group,^5,9 the introduction of interfacial layers like graphene oxide (GO),^10,11 SiO₂,¹² MoS₂,¹³ and organic electron blocking layer of poly(3-hexylthiophene) (P3HT),^5,9 and the insert of lithium fluoride layer (LiF) at rear-side¹⁴ were exploited and demonstrated to be effective. Moreover, surface modification on graphene with HNO₃,^2,15 trifluoromethane-sulfonic acid (TFSA),¹⁶ AuCl₃,^6,12 Au nanoparticles (NPs),^17,18 Ag nanowires (NWs),¹⁹ electric field,²⁰ and sunlight induced doping²¹etc. were conducted to further tune the work function as well as conductivity of graphene. Systematic optimization on Gr/Si heterojunction solar cells gives rise to a promising efficiency over 10%.^9,10,12

Gr/Si heterojunction solar cells are normally formed through physical contact of graphene sheet with n-type Si substrate via solution transfer method.²² The simple device architecture and the solution processing capability constitute the main advantages of Gr/Si heterojunction solar cells. Due to the weak light absorption (∼2.3%) and short lifetime (picoseconds) for electron–hole pairs,^23,24 photo-excited carriers in graphene have little contribution to the external photocurrent. Therefore the output photocurrent mainly comes from the light absorption of Si substrate; the photo-excited electron–hole pairs generated in n-Si will diffuse to the Gr/Si interface and then be separated by the built-in electric field, forming the photocurrent. However, compared to the conventional Si p–n junction solar cells with high junction barrier (∼1.1 eV), the relatively low work function of graphene leads to a small junction barrier (∼0.6–0.7 eV). As a result, the Gr/Si heterojunction solar cells usually possess a much smaller open circuit voltage (V_oc) (∼0.5 V)^9,10 as compared to the Si p–n junction solar cells (0.6–0.7 V).^25,26 This becomes one of the main obstacles faced by the Gr/Si heterojunction solar cells. One possible solution for this issue is the introduction of p–n junction at Si surface, which can enlarge the junction height and facilitate the separation of photo-generated carriers.^27,28 Nevertheless, most of the methods that introduce p–n junction on Si substrate involve the use of ion implantation or high-temperature diffusion process. The complicated high-temperature process may largely counteract the advantages of Gr/Si heterojunction solar cells.

Alternative to conventional doping method, surface charge transfer doping (SCTD), which arises from the spontaneous charge transfer between surface dopants and underlying semiconductors, has attracted much attention owing to the nondestructive doping process, excellent reproducibility, and high doping efficiency.^29–31 SCTD is first observed on diamond surface³² and then extended to other material systems such as carbon nanotubes (CNTs)^33,34 and two-dimensional (2D) materials like graphene, MoS₂ and black phosphorus.^35–37 SCTD offers a simple yet efficient route to tune the electronic and optoelectronic properties of semiconductors via surface modification. In previous works, we demonstrated that the conduction type of Si nanowires depends on surface species and can be tuned by surface adsorption with water or oxide molecules.^38,39 SCTD on CdS nanostructures also led to the construction of high-quality CdS p–n homojunction for high-performance photovoltaic devices.^40,41

Herein, we successfully demonstrated the fabrication of a p-type inversion layer on n-Si surface through SCTD method. A thin layer of the high-work function transition metal oxide (MoO₃) was introduced as the surface dopant on Si wafer and a p-type inversion layer was formed by spontaneous transfer of holes from MoO₃ layer to Si. The p-type inversion layer resulted in the energy band bending near the Si surface, thus effectively improving the effective barrier height and suppressing the recombination of photo-generated carriers. With an optimized thickness of MoO₃ layer, a high power conversion efficiency (PCE) of 12.2% was achieved, manifesting the great potential of the SCTD strategy for high-efficiency Gr/Si heterojunction solar cells.

2. Experimental details

2.1 Graphene sheets preparation

Monolayer graphene sheets were prepared by chemical vapor deposition (CVD) method using 25 μm thick copper foil as catalytic substrate.⁴² First, the copper foil was heated up slowly to a high temperature of 1030 °C under the H₂/Ar environment. After heat preservation for 2 h, a mixed gas flow of CH₄ (3 sccm) and H₂ (50 sccm) was introduced. The mixed gas flow was kept for 40 min, after that the foil substrate experienced a quick cooling process, ensuring the growth of monolayer graphene during this process. To transfer graphene from growth substrate to Si, 8 wt% polymethylmethacrylate (PMMA) dissolved in methyl-phenoxide was spin coated on the graphene/copper substrate with a rotation speed of 3000 rpm for 30 s. The PMMA/graphene/copper substrate was then immersed in FeCl₃ etchant solution to remove the underlying copper foil. The PMMA/graphene film was cleaned in deionized water for several times and was ready for use. Raman characterization indicated that high-quality monolayer graphene was obtained (Fig. S1†). Since monolayer graphene usually shows a relatively large sheet resistance (∼1000 Ω □⁻¹). 3-Layer graphene sheets, which were prepared by layer-by-layer transfer method⁴³ and have a sheet resistance of ∼500 Ω □⁻¹, was employed in this study (Table S1 and Fig. S2†).

2.2 Photovoltaic device construction

N-type Si wafer (thickness 490 ± 10 μm, resistivity 1–3 Ω cm) with 300 nm SiO₂ capping layer was used and cut into 1 × 1 cm² pieces. These 1 × 1 cm² Si chips were sequentially cleaned with ethanol, acetone and deionized water in ultrasonic. Afterwards, a circular window with a diameter of 4 mm was opened on the SiO₂ layer using photolithography and consequently 5 wt% HF solution etching, allowing the expose of Si substrate within the window. This defined the effective device area to be ∼0.13 cm². Methylation was conducted via a two-step chlorination/alkylation approach to passivate the Si surface.⁴⁴ MoO₃ layer was then deposited onto Si surface as surface doping layer through thermal evaporation. The evaporation was conducted at high vacuum of 10⁻⁴ Pa with a evaporation rate of 0.5 Å s⁻¹. The thickness of MoO₃ layer was controlled to be 5–25 nm by varying the evaporation time. Afterwards, 3-layer graphene was transferred onto the top of the window as the transparent electrode. Ag paste and In–Ga alloy were employed as metal contacts for graphene and rear side of Si, respectively.

2.3 Materials and devices characterizations

The quality of graphene sheets was examined by Raman spectroscopy (Jobin Yvon/Labram HR800) with 514 nm laser excitation (beam size 2 μm). Sheet resistance was measured by a digital four-probe tester (JG/ST-2258A). Transmittance spectra were measured by a UV-VIS spectrometer (Perkin-Elmer LAMBDA 750) equipped with an integrating sphere. In situ ultraviolet photoelectron spectroscopy (UPS) measurements were conducted in a customized ultrahigh vacuum photoemission spectroscopy system⁴⁵ using monochromatized He I radiation. Minority carrier lifetimes of Si substrate were detected using microwave photoconductance delay (μ-PCD) technique (WT-2000PVN, Semilab). Surface potential (KPFM) was determined by atomic force microscope (AFM, Veeco Multimode V). Photovoltaic characteristics of the Gr/Si heterojunction solar cells were evaluated by a Keithley 2612 source meter with a Newport 91160 solar simulator and an air mass (AM) 1.5G filter. The irradiation intensity was 100 mW cm⁻², which was calibrated by a Newport standard Si solar cell 91150.

2.4 First-principles calculation

The calculation was implemented in the Cambridge Sequential Total Energy Package (CASTEP) program in Materials Studio 6.1 package of Accelrys Ltd.⁴⁶ The generalized gradient approximation (GGA) with the Perdew–Burke–Ernzerhof (PBE) functional was adopted to describe the correction of electronic exchange and correlation effects.^47,48 The energy cutoff was set as 500 eV, and 6 × 6 × 6 k-points with the Monkhorst–Pack scheme in the first Brillouin zone was employed in the present work.⁴⁹

3. Results and discussion

Fig. 1a displays the schematic illustration of the Gr/n-Si heterojunction solar cell with a MoO₃ interfacial layer inserted between graphene layer and Si substrate. To investigate the effect of MoO₃ layer thickness, photovoltaic devices with different MoO₃ layer thickness from 0 to 25 nm, with 5 nm interval, were fabricated in this study. Fig. 1b depicts MoO₃ layer thickness dependent photovoltaic characteristics of the Gr/MoO₃/Si solar cells. To simplify the comparison, the devices were measured before graphene doping by HNO₃. It is noteworthy that the device without MoO₃ interfacial layer exhibits worst device performance, while the device performance enhances with increasing the thickness of MoO₃ layer from 0 to 15 nm. Compared to the short current density (J_sc), which shows a moderate increase by ∼5.2% from 23.2 to 24.4 mA cm⁻², the open circuit voltage (V_oc) of the device increases significantly by ∼19% from 0.48 to 0.57 V (Fig. 1c). Meanwhile, the fill factor (FF) also improves from 0.44 to 0.59 as the MoO₃ thickness increases from 0 to 15 nm, signifying the reduced carrier recombination of the device. Correspondingly, PCE of the device rises from 5.28% without MoO₃ layer to 8.18% with 15 nm MoO₃ layer (Fig. 1d). However, further increase of the MoO₃ layer thickness to 25 nm leads to an obvious degradation of device performance. This could be probably due to the relatively poor electrical conductivity of MoO₃ layer. The carrier recombination in MoO₃ layer became not negligible when a thick MoO₃ layer was used,⁵⁰ leading to the decrease of FF and V_oc. Based on the above results, the optimum MoO₃ layer thickness is determined to be around 15 nm.

Fig. 1 (a) Schematic illustration of the Gr/n-Si heterojunction solar cell with a MoO₃ interfacial layer. A p-type inversion layer was generated on Si surface owing to the SCTD effect induced by MoO₃ layer. The thickness is not proportional to the real device. (b) Photovoltaic characteristics of the devices with varied MoO₃ layer thickness. (c) Plots of V_oc and J_sc as a function of MoO₃ layer thickness. (d) Plots of FF and PCE as a function of MoO₃ layer thickness.

The remarkable increase in V_oc after inserting a layer of MoO₃ between graphene and Si manifests that the effective junction barrier is significantly increased. To understand the underlying mechanism, in situ ultraviolet photoelectron spectroscopy (UPS) measurement was employed to reveal electronic structure evolutions of Si during the step-wise deposition of MoO₃ layer. The work function changes of the sample with MoO₃ deposition are determined by secondary electron cutoffs (Fig. 2a). The bare Si has a work function of 4.4 eV, which is consistent with the standard values for n-type Si. Notably, with increasing MoO₃ layer thickness from 2 to 64 Å, the secondary electron cutoff presents a dramatic shift to higher energy. Correspondingly, the work function has increased to 4.80, 5.20, 5.55, 5.90, 6.30, 6.50, and 6.65 eV for the MoO₃ layer thickness of 2, 4, 8, 16, 32, 48, and 64 Å, respectively. From the valence band region, Fig. 2b, the valence band maximum (VBM) of the bare Si is 0.8 eV below Fermi level (E_F). However, with the successive deposition of MoO₃ layer, a shift could be observed towards lower binding energy direction. Correspondingly, the energy difference between VBM and E_F has been reduced from 0.8 eV to 0.40, 0.35, and 0.25 eV with increasing the MoO₃ layer thickness from 0 to 2, 4, and 8 Å, respectively. This result clearly manifests the upward energy band bending of Si with the deposition of MoO₃ layer. When the MoO₃ thickness exceeds 8 Å, the intensity of characteristic features for Si gradually decreases while a feature centered at 1 eV binding energy, which can be related to MoO₃ gap states,^51,52 is gaining intensity. Most likely, though the characteristic signal for Si is difficult to be detected at higher MoO₃ layer, the upward band bending of Si continues and the E_F of Si may cross with the VBM ultimately. Fig. 2c illustrate the energy band diagram of the Gr/MoO₃/Si heterojunction solar cell. Due to the large work function of MoO₃ (6.65 eV), deposition of MoO₃ on Si results in the spontaneous transfer of electrons from Si to MoO₃ (holes from MoO₃ to Si). The accumulation of holes, along with the energy band bending, eventually leads to the formation of a p-type inversion layer near the Si surface. The enhanced surface built-in potential can greatly facilitate the separation/transport of photo-generated carriers, and contribute to the suppression of surface recombination by preventing the electrons transport from Si to junction interface. On the other hand, a defect band originating from the defects in MoO₃ layer, such as oxygen vacancies, may exist within the energy band of MoO₃,⁵³ which allows the effective transport of holes through the MoO₃ layer to graphene. As a result, the Gr/MoO₃/Si heterojunction solar cell exhibits a significant improvement on photovoltaic performance. In previous studies, some semiconductor materials, such as MoS₂, with suitable band structures were used as an electron-blocking/hole-transporting layer in the Gr/Si solar cells.¹³ The insert of MoS₂ between graphene and n-Si improved the device's performance by enhancing the band curvature of Si surface and consequently reducing the recombination rate. In contrast to MoS₂, which has a work function of 4.60 eV, the higher work function of MoO₃ (6.65 eV) enables a stronger energy band bending at the Si surface, resulting in a higher performance of the devices.

Fig. 2 UPS spectra of bare Si and Si with varied MoO₃ layer thickness: (a) secondary electron cut-off region and (b) valence band region. (c) Band alignment of the Gr/MoO₃/Si heterojunction solar cell. An inversion layer was generated on Si surface due to the charge transfer between MoO₃ layer and Si. (d) Cross-section line profile of the surface potential image. Inset is surface potential image of Si substrate with one half coated with MoO₃ layer.

In addition to UPS characterizations, the surface potential was probed using Kelvin probe force microscopy (KPFM) to visualize the effect of MoO₃ on tuning the work function of Si near surface (Fig. 2d). To perform the experiment, the bare Si was partially coated with 15 nm MoO₃ layer and then the scan was conducted at the border region of Si and MoO₃ coated Si. Inset in Fig. 2d shows the surface potential image. The border can be easily distinguished according to the difference of colors. A lower surface potential means the high work function property by using the following equation:^54,55

Φ_s = Φ_tip − eV_sp (1)

where e is the elementary charge, V_sp is the measured surface potential, Φ_tip is the work function of the conductive tip, and the Φ_s is the work function of the sample. It is observed that the surface potential of MoO₃ coated region is remarkably lower than that of the bare Si, revealing a surface potential difference of ∼570 mV. The surface potential gradient from Si to MoO₃ coated Si is due to the non-uniform MoO₃ thickness at the border region. All these results collectively demonstrate that the work function of MoO₃ coated Si has been significantly improved.

To gain more insight into the charge transfer between MoO₃ decoration layer and the methylated silicon surface, we calculated the difference charge density (Δρ) of the methylated silicon surface after MoO₃ decoration based on the first-principles calculation. Δρ is defined by the following equation: Δρ = ρ_{MoO3/CH3–Si} − ρ_CH3–Si − ρ_MoO3, where ρ_{MoO3/CH3–Si}, ρ_CH3–Si, and ρ_MoO3 represent the charge densities of the full system, the methylated silicon, and the isolated MoO₃ molecule, respectively. Fig. 3a and b show the top and side views of one MoO₃ molecule adsorbed on the methylated silicon surface, and the corresponding two-dimensional slice of Δρ values is plotted in Fig. 3c. The regions of electron accumulation and depletion are displayed in red and blue colors respectively in the two-dimensional slice. It is noteworthy that strong electron accumulation is present around the O atoms of MoO₃ molecule, while electron depletion appears around the surface of methylated silicon. This phenomenon suggests that the adsorbed MoO₃ molecule gains electrons, whereas the methylated silicon loses electrons. In addition, on the basis of Mulliken population analysis (Fig. 3d) the charge of one adsorbed MoO₃ is 0.39e, indicating that a fractional positive charge of 0.39e is injected into the methylated silicon, as proved in the experiment.

Fig. 3 (a) Top and (b) side views of one MoO₃ molecule adsorption on the methylated silicon surface. (c) Two dimensional slice contour plots of the difference charge density for the MoO₃ molecule adsorbed on the methylated silicon surface. The red area represents electron accumulation, while the blue area represents electron depletion (hole accumulation). The unit of the numbers given in the legend at the right is e Å⁻³. (d) The Mulliken charge of MoO₃ molecule and methylated silicon for the MoO₃ absorption on the methylated silicon.

Characterization of minority carrier lifetime was carried out to verify the reduced surface recombination due to the enhanced effective barrier height for the Gr/MoO₃/Si heterojunction. The minority carrier lifetime is a visual evidence of the recombination rate of the minority carriers; longer minority carrier lifetime means lower recombination rate and thus is much desirable for high-efficiency solar cells. The minority carrier lifetime can be expressed with the following equation:

where τ is the measured minority carrier lifetime, τ_bulk is the bulk minority carrier lifetime, W is the thickness of Si, and S_front and S_back are the recombination rate of the front and rear surface minority carriers, respectively. In general, the bulk minority carrier lifetime is much longer than that of the surface minority carrier. Meanwhile, the rear surface of our device is passivated by SiO₂ layer prior to lifetime testing. Therefore, 1/τ_bulk and S_back/W can be neglected and the measured τ can be considered as the front surface minority carrier lifetime, which represents the recombination rate. In this study, a 15 nm thick MoO₃ decoration layer was deposited onto one half of the bare Si area to make the comparison of the minority carrier lifetime between bare Si and MoO₃ decorated Si surfaces directly, as shown in Fig. 4a. The minority carrier lifetime mapping (Fig. 4b) shows a very obvious boundary between the two halves of the Si substrate; the average minority carrier lifetime of the bare Si is about 22 μs, while that for the MoO₃ decorated Si surface can be as high as 50 μs, revealing a remarkable prolongation of minority carrier lifetime after MoO₃ decoration. Thus, the recombination rate of MoO₃ decorated Si is much lower than that of the bare Si. This result unambiguously demonstrates the important role of the MoO₃ decoration layer on suppressing the surface recombination. Fig. 4c depicts the dark current density versus voltage (J–V) curves of the devices with and without MoO₃ layer. The reverse leakage current (J₀) of the device with MoO₃ decoration layer was largely suppressed, along with a remarkable decrease of the ideality factor (n) from 2.36 to 1.83. The enhanced diode characteristics of the device after MoO₃ layer decoration also indicates a reduced recombination rate at the junction interface. A lower J₀ can lead to a larger V_oc according to the well known relation:⁵⁶where q is the charge of an electron, n is the ideality factor, k is the Boltzmann constant, and T is the temperature. Using this equation the theoretical V_oc increases by 60 mV for the MoO₃ decorated device, which is comparable with the experiment result (90 mV).

Fig. 4 (a) Schematic illustration of the sample with half part coated with MoO₃ decoration layer for minority carrier lifetime measurement. (b) Spatial mapping of the minority carrier lifetime of the sample. (c) Dark current density versus voltage curves of the devices with and without 15 nm MoO₃ decoration layer. Inset shows the corresponding ln J–V curves for evaluating the ideality factor.

Hole current density distribution near the junctions of the devices was simulated by Silvaco TCAD to understand how the surface reversion layer impacts the device performance. Fig. 5a and b show the device structures without and with a surface p-type inversion layer, respectively, adopted in the simulation. The device model consists of n-Si substrate, SiO₂ window layer, and the transparent conductive electrode. To simplify the simulation process, the Si substrate was identified as two dimensional rectangle with size of 20 μm × 5 μm, respectively, along X axis and Y axis. The near surface inversion layer was produced via diffusion of boron atoms to the phosphorus doped n-Si substrate. Fig. 5c and d display the corresponding hole current density distribution for the devices without and with inversion layer, respectively. Compared to the device without surface inversion layer, there is an obvious improvement of the hole current density for the device with surface inversion layer from the color map difference, indicating that the collection rate of holes is effectively enhanced upon the generation of surface inversion layer. This is in well accordance with the prolonged minority carrier time mentioned above. As a result of reduced surface recombination, the V_oc has remarkable increased from ∼0.13 V for the device without inversion layer to ∼0.17 V for the device with inversion layer (Fig. 5e). In contrast, the J_sc shows little enhancement. These results are also consistent with the measurement results for realistic devices in Fig. 1b.

Fig. 5 (a) and (b) show the schematic illustrations of the devices without and with a surface inversion layer, respectively. (c) and (d) show hole current density distribution at Y direction of the devices without and with an inversion layer, respectively. (e) Simulated J–V characteristics of the devices without and with inversion layer under AM 1.5G light illumination, respectively.

Although the introduction of a MoO₃ decoration layer has greatly enhanced the performance of Gr/MoO₃/Si heterojunction solar cells, the device efficiency is still hindered by the relatively low conductivity of graphene and large light waste caused by high light reflection of planar Si. To further boost the device efficiency, both chemical doping on graphene and antireflection coating on the device were performed. After HNO₃ doping, Fig. 6a, the PCE of the device increases from 8.18% to 10.14%, along with an obvious increase in FF from 0.58 to 0.71. This could be ascribed to the improved conductivity of graphene upon HNO₃ doping.⁵⁷ Moreover, by applying a PMMA antireflection layer with optimized thickness of 100 nm (Fig. S3†), the J_sc is greatly enhanced from 24.4 to 30.7 mA cm⁻², giving rise to a high PCE of 12.2%. The effect of the antireflection coating can be clearly seen from the inset in Fig. 6a; the device with 100 nm PMMA coating layer (the right one) shows a darker color, indicating less light reflection and enhanced light absorption of the device. Fig. 6b depicts the correspondent EQE spectra of the device before/after HNO₃ doping and with PMMA antireflection coating. It is observed that the HNO₃ doping has little effect on improving the EQE value, while the PMMA antireflection coating can lead to ∼20% increase of the EQE value. The J_sc calculated by integrating the EQE curve is 31.4 mA cm⁻² for the PMMA coated device, which is consistent with that obtained from the J–V curve.

Fig. 6 (a) Photovoltaic characteristics of the device with 15 nm MoO₃ decoration layer before and after HNO₃ doping. 100 nm PMMA was spin-coated onto the device surface as an antireflection layer. Inset shows the photograph of the devices without and with PMMA antireflection coating. The 100 nm PMMA-coated device is much darker than the device without coating. (b) EQE spectra of the devices with PMMA antireflection coating and graphene doping. The device without PMMA coating was also measured before/after HNO₃ doping for comparison.

4. Conclusions

In summary, we demonstrated a new strategy to introduce a surface inversion layer into Gr/Si heterojunction solar cell by SCTD method using transition metal oxide of MoO₃ as surface dopant. Due to the high work function of MoO₃ decoration layer, spontaneous hole transfer will happen at the MoO₃/Si interface, leading to the generation of a p-type inversion layer on n-Si surface. The surface energy band bending, along with the increase of built-in potential at junction interface, greatly enhanced the separation/transport of photo-generated carriers and suppressed the carrier recombination at interface as well. In situ UPS, minority carrier lifetime, surface potential measurements as well as analog calculations had been conducted to verify the surface charge transfer and the formation of a surface inversion layer. A high PCE of 12.2% was eventually obtained by further combining graphene doping and PMMA antireflection coating. Given the high efficiency and simple fabrication process, the SCTD method opens up the great opportunities for high-efficiency Gr/Si heterojunction solar cells.

Acknowledgements

This work was supported by the National Basic Research Program of China (No. 2013CB933500), the Major Research Plan of the National Natural Science Foundation of China (No. 91333208), the National Natural Science Foundation of China (No. 61422403, 51672108, 51622306, 21673151, 51401138, 11550110176), Qing Lan Project, and a Project Funded by the Priority Academic Program Development of Jiangsu Higher Education Institutions. We also thank the Shanghai Institute of Technical Physics (SITP) for software support.

Notes and references

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Footnote

† Electronic supplementary information (ESI) available. See DOI: 10.1039/c6ta07100g

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