Ferroelectricity of low thermal-budget HfAlO_x for devices with metal–ferroelectric–insulator–semiconductor structure

Abstract

The effect of annealing temperature on the ferroelectricity of HfAlO_x with Al concentration of 4.5% is physically and electrically investigated by metal–ferroelectric–insulator–semiconductor (MFIS) platform. HfAlO_x with 600 °C annealing is confirmed to possess ferroelectricity by the formation of non-centrosymmetry orthorhombic III phase, clockwise capacitance–voltage hysteresis, significant polarization–electric field hysteresis curve, and in-depth analysis of current component as compared with non-ferroelectric HfO₂. Compared to commonly discussed MFM devices from which thermal annealing of 800 °C is required to induce ferroelectricity, the relatively lower thermal budget to form ferroelectric HfAlO_x in MFIS devices can be attributed to the compressive thermal stress caused by the difference in thermal expansion between the Si substrate and HfAlO_x during thermal annealing, and it is the stress that helps lower the annealing temperature to crystallize HfAlO_x in the orthorhombic phase. In addition, MFIS devices with 600 °C-annealed HfAlO_x hold the prospect of becoming a promising candidate for memory applications by demonstrating a memory window of 0.6 V with 3 V operation voltage which is comparable with or superior to those with conventional ferroelectric films. Furthermore, the process to from ferroelectric HfAlO_x-based devices can be fully integrated into incumbent mass production fabs, empowering next-generation memory technology.

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Introduction

Ferroelectric materials have aroused great interest over the past few decades since these are the core materials to implement ferroelectric random access memory (FRAM)¹ which stores dielectric polarization as information and demonstrates the competence to play an important role in the next-generation memory market due to faster access time and much lower power consumption as compared to conventional flash memory. Different from FRAM which requires ferroelectric capacitors for data storage, a ferroelectric-based field effect transistor (FeFET) that employs a ferroelectric material to replace typical gate dielectric has drawn considerable attention because of its simplified capacitor-less structure, non-destructive readout and good scalability.² Besides the application of non-volatile memory, ferroelectric materials also find applications in achieving negative capacitance (NC) in MOS transistors that overcome the 60 mV per decade subthreshold swing (SS) limit,^3–5 making low-voltage operation possible. Although ferroelectric materials have been explored for decades, the most widely studied materials for FRAM are of perovskite-based structure such as (Ba,Sr)TiO₃ (BST)⁶ PbZr_1−xTi_xO₃ (PZT)^7,8 and SrBi₂Ta₂O₉ (SBT)^9,10 with high dielectric constant. These materials present desirable ferroelectric characteristics; however, thickness more than 100 nm with an interfacial barrier is required to obtain transistors with data non-volatility. The relatively thick thickness not only induces fringing effect that degrades device performance, it also poses a limit for further thickness scaling which is a prerequisite in modern VLSI technology. Moreover, Pb and Bi diffusion are also serious process issues which determines the degradation of the perovskite oxide in memory application.¹¹ For low-SS MOS transistors, (PVDF–TrFE) ferroelectric copolymer¹² was first integrated in the gate stack and demonstrated desirable performance. However, polymer-based ferroelectric material is not fab-friendly and therefore developing new materials that are compatible with incumbent VLSI process platform is a prerequisite to fully exert the advantages of ferroelectric properties.

HfO₂-based dielectrics haven been adopted as the gate dielectrics of advanced MOSFETs for years.^13–15 It has also been reported that by doping Al into HfO₂, HfAlO_x demonstrates promising characteristics for the applications of resistive switching memories.^16,17 Recently, HfO₂-based materials have been found to possess ferroelectricity and drawn intensive attention since they are fab-friendly dielectrics which have been employed in the production line for years. Ferroelectricity of HfO₂ can be achieved by doping Si,¹⁸ Al,¹⁹ Zr,^4,5,20,21 Y,²² La,²³ Gd,²⁴ or Sr²⁵ to from non-centrosymmetric orthorhombic phase and developing the doped-HfO₂ ferroelectric materials ushers in a new era for ferroelectric memory and low-SS transistors applications. Nevertheless these doped-HfO₂ ferroelectric materials are promising, Si-, Al-, and Zr-doped HfO₂ are more feasible for further application since dopants such as Y, La, Gd and Sr are not commonly adopted in mass production fabs. Zr-Doped HfO₂ is the most discussed ferroelectric materials in the field owing to the similar chemical properties between HfO₂ and ZrO₂, and the low thermal budget to induce ferroelectricity. On the other hand, Si-¹⁸ and Al-¹⁹ doped HfO₂ are less explored and one possible reason maybe the high annealing temperature (>800 °C) to from the desirable phase for ferroelectricity. In this work, the effect of annealing temperature on the ferroelectricity of Al-doped HfO₂ is systematically studied. The annealing temperature dependent behavior is quite important for process integration and has been extensively investigated for ferromagnetic properties of FePt.^26,27 Note that although similar effect has been discussed in the literature for Al-doped HfO₂, the major advances compared to prior arts are (1) metal–ferroelectric–insulator–semiconductor (MFIS) rather than metal–ferroelectric–metal (MFM) structure is studied. In fact, most HfO₂-based ferroelectric devices under research are of MFM structure^{18–20,22–25} which is more convenient to extract the intrinsic ferroelectricity of the material and can be applied to one-transistor-one-capacitor (1T1C) FRAM configuration. However, to realize 1T FRAM, it is indispensable to examine the MFIS structure. Furthermore, the MFIS structure can also be integrated into MOS transistors for NC applications. (2) The reported 800–1000 °C annealing temperature to achieve ferroelectricity for MFM structure¹⁹ can be reduced to 600 °C for MFIS structure and the reduced thermal budget holds the potential to be integrated with existent gate-last VLSI technology.

Experimental

P-type Si substrates with 1–10 Ω cm resistivity were used as the starting materials. Thermal SiO₂ of 3 nm was grown in a furnace at 900 °C as the interfacial layer followed by the deposition of 15 nm HfAlO_x (4.5% Al) as the ferroelectric film by atomic layer deposition (ALD) at 250 °C. The Al content in the HfAlO_x was controlled by the respective number of cycles (monolayers) for HfO₂ and Al₂O₃ during deposition. TEMAH and TMA were respectively adopted as Hf and Al precursors, with H₂O as the co-reactant. The 3 nm SiO₂ was employed to retard possible dopant diffusion from HfAlO_x during subsequent annealing so that the interfacial quality can be maintained. To study how Al dopant affects the ferroelectricity of the film, pure HfO₂ without incorporating Al dopant was also prepared as reference. Next, 20 nm blanket TiN was deposited by sputtering with a subsequent thermal annealing at temperatures ranging from 600 to 1000 °C to obtain the optimal condition for desirable crystalline phase and ferroelectricity. Note that the blanket TiN was used to provide mechanical confinement to enhance the crystallization. Finally the MFIS capacitors were complete by patterning the annealed TiN film as the top electrode with the area of 500 μm × 500 μm. Polarization–electric field (P–E) hysteresis were characterized by aixACCT TF Analyzer 2000 system with a built-in frequency of 1 kHz. Capacitance–voltage (C–V) curves were performed by Agilent 4284 LCR meter with typical frequency of 1 MHz and a 100 mV AC probing signal while leakage current was measured by Keithley 4200-SCS semiconductor parameter analyzer. Note that the different measurement frequency between C–V and P–E characterization is also reported in the literature.^28–30 15 devices were measured for each condition. Besides typical electrical characterization, physical analysis of surface roughness and thickness for the annealed dielectrics were respectively measured by atomic force microscopy (AFM) and ellipsometer. For all annealed dielectrics, the thickness is between 14.82 nm and 15.51 nm with comparable root mean squared (RMS) roughness of 0.27–0.29 nm. X-ray diffraction (XRD) with Cu Kα radiation (wavelength of 0.154056 ​ nm) was used to identify the crystalline phase for samples with different process conditions.

Results and discussion

Fig. 1 displays the bi-directional curves for devices with HfO₂ and HfAlO_x annealed at different temperatures between ±3 V sweeping under the measurement frequency of 1 MHz. As expected, with 600 °C annealing, pure HfO₂ is a typical dielectric which exhibits counterclockwise C–V characteristic with negligible hysteresis. For HfAlO_x with 800 °C annealing, similar counterclockwise behavior to pure HfO₂ is found. On the contrary, HfAlO_x with 600 °C annealing shows a relatively significant hysteresis with clockwise characteristic. Note that the C–V hysteresis for the MFIS capacitors are contributed by stored charge injected from either side of the contact and/or ferroelectric nature. For devices fabricated on p-type substrate, the C–V hysteresis caused by charge storage can be counterclockwise and clockwise for substrate and gate charge injection respectively. On the other hand, ferroelectricity of a film always causes clockwise C–V hysteresis. That is, even with clockwise hysteresis for 600 °C-annealed HfAlO_x, one cannot confirm whether the film is ferroelectric. Assume that the clockwise hysteresis for 600 °C-annealed HfAlO_x is totally contributed by gate injection without any ferroelectric effect, then the hysteresis for 800 °C-annealed HfAlO_x would become more significant while keeping clockwise since annealing of HfO₂-based dielectric at a higher temperature would result in the decomposition of metal–oxygen ionic bonds and give rise to more defects which are favorable for charge storage. However, as shown in the figure, 800 °C-annealed HfAlO_x demonstrates insignificant and counterclockwise hysteresis, implying that the original assumption of charge injection from gate is incorrect. In other words, if charge injection contribute to C–V hysteresis for 600 °C and 800 °C-annealed HfAlO_x, charges are injected from the substrate. From the inference, 600 °C-annealed HfAlO_x may possess ferroelectricity because of the clockwise hysteresis even though the charge injection induced hysteresis is counterclockwise. Note that C–V characteristics for HfO₂-based devices show sharp transition from accumulation to inversion regime which is not observed for HfAlO_x-based devices. The main reason for the distinct difference in C–V characteristics can be attributed to Al diffusion from HfAlO_x into Si/SiO₂ interface through the thin SiO₂ interfacial layer.

Fig. 1 C–V characteristic with bi-directional sweeping between ±3 V for devices with 600 °C-annealed HfO₂, 600 °C-annealed HfAlO_x and 800 °C-annealed HfAlO_x.

Fig. 2 shows the XRD pattern for HfO₂ and HfAlO_x with different annealing temperatures. 600 °C-annealed HfAlO_x presents a distinctive diffraction peak at 30.6° which corresponds to orthorhombic III phase with space group Pbc2₁ with non-centrosymmetry, the essential requirement for ferroelectricity.³¹ Note that the peak may also include the contribution from cubic and tetragonal phases since these three phases are difficult to be distinguished in the range of 27–33°. The presence of orthorhombic phase implies that 600 °C-annealed HfAlO_x is very likely to possess ferroelectricity, consistent with the aforementioned C–V analysis. Note that the C–V hysteresis of 600 °C-annealed HfAlO_x is the combinational effects of ferroelectricity (clockwise) and charge injection (counterclockwise). The final clockwise hysteresis implies that ferroelectricity effect is stronger than that of charge injection effect which is expected to be small due to the tiny amount of charge trapping sites resulting from the ALD process-based dielectric. For 800 °C-annealed HfAlO_x, the component of orthorhombic phase significantly decreases while monoclinic phase (28.4° and 31.6°) which is of symmetric structure increases after a higher temperature annealing, suggesting the insignificant ferroelectricity in the film. The 800 °C-annealed HfAlO_x dominated by monoclinic phase well explains that the C–V hysteresis is mainly caused by charge injection instead of ferroelectricity and the insignificant counterclockwise hysteresis indicates a small number of trapping sites after 800 °C annealing. Nevertheless, the number of trapping sites is expected to be higher than that of 600 °C-annealed HfAlO_x due to the aforementioned decomposition of ionic bonds at a higher annealing temperature. This phenomenon of phase transition becomes more pronounced for 1000 °C-annealed HfAlO_x and it is suggested to have the most insignificant ferroelectricity. For 600 °C-annealed HfO₂, it also reveals monoclinic phase as expected and the mechanism behind the insignificant C–V characteristic is the same as that of 800 °C-annealed HfAlO_x.

Fig. 2 Dependence of annealing temperature on XRD patterns for HfO₂ and HfAlO_x.

To more directly confirm whether ferroelectricity exists in 600 °C-annealed HfAlO_x, polarization versus electric field (P–E) characteristics were measured and the same characterization was also conducted for 600 °C-annealed HfO₂ and 800 °C-annealed HfAlO_x for comparison. The P–E behaviors for various kinds of devices are displayed in Fig. 3 and the corresponding current are also recorded in the same figure. The P–E characteristic for 600 °C-annealed HfO₂ shown in Fig. 3(a) is composed of two straight lines without showing any hysteresis loop, indicating absence of ferroelectricity of the film. On the contrary, as shown in Fig. 3(b), 600 °C-annealed HfAlO_x exhibits hysteresis loop. However, the hysteresis loop does not necessarily mean ferroelectricity of the film except the effect of leakage current induced lossy capacitor can be excluded.³² To better understand whether the loop is caused by lossy capacitor, it is worth examining the current component of the film. For a typical dielectric without any ferroelectricity, based on the analysis of the displacement current versus time,³³ total current I(t) of an MIS capacitor is given by formula (1):

where A is the area of contact, D(t) is the dielectric displacement, σ is the conductivity, E_a is the applied electrical field, C(t) is the capacitance, V(t) is the applied voltage and I_c is the conduction (leakage) current. However, for a typical dielectric with ferroelectricity, the current should be modified as the expression shown below where P(t) is the polarization of the ferroelectric material.

Fig. 3 P–E characteristic measured at 1 kHz for (a) 600 °C-annealed HfO₂, (b) 600 °C-annealed HfAlO_x and (c) 800 °C-annealed HfAlO_x. Corresponding current behaviors are shown in the figures.

For the current of 600 °C-annealed HfO₂ shown in Fig. 3(a), one can observe that even with negative applied electric field (from −4 to 0 MV cm⁻¹), positive current is obtained and this phenomenon could exclude I_c as the main component since the polarity of I_c should be consistent with that applied electric field. Fig. 4 shows the measured I_c for 600 °C-annealed HfO₂ and HfAlO_x by minimizing the voltage sweeping rate dV(t)/dt to be 10 mV s⁻¹ and both devices demonstrate a tiny value in the order of 100 pA which further confirms that I_c contribute negligible amount to total current. Furthermore, since the capacitance switches between accumulation to inversion regime during the sweep as evidenced by the C–V curve shown in Fig. 1 and the change of capacitance as a function of voltage dC(t)/dV(t) is small in the accumulation and inversion regime, it implies that the term V(dC(t)/dV(t))(dV(t)/dt) is still not the main component of the current. Note that although dC(t)/dV(t) becomes larger when the capacitance switches from accumulation to inversion, however, it almost occurs at zero bias which means that the term V(dC(t)/dV(t))(dV(t)/dt) is also negligible even for the capacitance switch. The main component of the current is most likely contributed by capacitive displacement current C(dV(t)/dt) which is proportional to the capacitance under fixed voltage sweeping rate dV(t)/dt. For negative and positive applied field, the capacitor is respectively with high capacitance (under accumulation regime) and low capacitance (under inversion regime) and therefore the capacitive displacement current follows the trend which is consistent with the measured current. Moreover, the polarity of the measured current is the same as the voltage sweeping rate. Based on the analysis, it confirms that capacitive displacement current is the main component of the current. Since the polarization is the integral of the displacement current with the correlation of , polarization in the form of two straight lines with one corresponding to accumulation regime while the other inversion regime, is expected and the linear polarization manifests that 600 °C-annealed HfO₂ is a typical paraelectric dielectric. With similar methodology, one can also analyze the current component of 600 °C-annealed HfAlO_x to verify whether ferroelectricity exists in the film. From the I_c shown in Fig. 4, since the value of HfAlO_x is comparable with that of HfO₂ which does not demonstrate lossy capacitor induced hysteresis loop, it can be inferred that the hysteresis loop shown in 600 °C- and 800 °C-annealed HfAlO_x is not caused by leakage current. Similarly, the term V(dC(t)/dV(t))(dV(t)/dt) can also be excluded because of the small change rate of capacitance with the sweeping voltage in accumulation and inversion regime. In addition, the behavior of current is quite different from that of 600 °C-annealed HfO₂, suggesting that there is another current component besides capacitive displacement current C(dV(t)/dt). The most likely component that leads to the current behavior is the existence of the polarization induced term dP(t)/dt and implies the ferroelectricity of the film. Thus the hysteresis loop for 600 °C-annealed HfAlO_x is resulted from the ferroelectricity and coercive field (E_c) can also be observed. Note that compared to typical MFM devices, the slight shift of the loop toward negative electric field for the MFIS devices is due primarily to electrodes with asymmetric work function (TiN as top electrode, Si substrate as bottom electrode).³⁴ Fig. 3(c) shows the P–E behavior and current response for 800 °C-annealed HfAlO_x. It is clearly observed that although the behavior is quite similar to those of 600 °C-annealed HfAlO_x, the current level is lower which implies more insignificant ferroelectricity. Furthermore, no matter what annealing temperature is, the P–E behavior and current response are quite different from that of paraelectric HfO₂, confirming the unique ferroelectricity for annealed HfAlO_x. It is worth noting that similar P–E hysteresis behaviors without “pinched” tail were also reported in the literature for Si-based MFS structure.^35–38

Fig. 4 Conduction (leakage) current for devices with 600 °C-annealed HfO₂ and HfAlO_x measured by minimizing the voltage sweeping rate to exclude capacitive displacement current.

To further prove the existence of ferroelectricity, current response to triangular voltage waveform is investigated and the results for 600 °C-annealed HfO₂, 600 °C-annealed HfAlO_x and 800 °C-annealed HfAlO_x are shown in Fig. 5. As aforementioned analysis and shown in Fig. 5(a), since 600 °C-annealed HfO₂ is a paraelectric dielectric and capacitive displacement current C(dV(t)/dt) dominates its current behavior, the nearly constant high and low current (absolute value) respectively corresponds to accumulation (high capacitance) and inversion (low capacitance) while the polarity is consistent with the voltage sweeping slope. As shown in Fig. 5(b) which is similar to that of MFIS devices with HfZrO-based ferroelectric,⁵ the current behavior of 600 °C-annealed HfAlO_x is quite different from that of HfO₂ in terms of the non-constant current which indicates additional dP(t)/dt term comprising the total current. Moreover, during the time interval of 0–0.2 ms, the current first decreases (negative current slope) and then increases with increasing sweeping voltage, referring to as current turnover. Note that for ideal ferroelectric film, only one current peak without any current turnover point can be observed during positive voltage sweeping rate. Typically, one current peak indicates that polarization of all dipoles inside the ferroelectric film switch to opposite orientation as the applied voltage exceeds a certain coercive field. The phenomenon of current turnover in the time interval of 0–0.2 ms suggests that the ferroelectric domain in the HfAlO_x could be roughly divided into a smaller coercive field domain and a larger coercive field domain, resulting from domain pining or seed inhabitation.³⁹ That is, because of the domains that correspond to different coercive fields, two current peaks can be observed during the time interval with positive sweeping rate (0–0.2 ms and 0.8–1 ms). This phenomenon that ferroelectric film has domains with different coercive fields has been reported in the literature^39–41 and is usually ascribed to the existence of oxygen vacancies in the film. Further process optimization is still required to suppress the amount of oxygen vacancies so that all the domains could demonstrate similar behaviors. Fig. 5(c) shows the result for 800 °C-annealed HfAlO_x and similar current response to that of 600 °C-annealed HfAlO_x is found. Again, it reveals lower current level, suggesting more insignificant ferroelectricity.

Fig. 5 Current response to triangular voltage waveform measured at 1 kHz for (a) 600 °C-annealed HfO₂, (b) 600 °C-annealed HfAlO_x and (c) 800 °C-annealed HfAlO_x.

Fig. 6 shows the P–E characteristics for MFIS capacitors with 600 °C, 800 °C and 1000 °C-annealed HfAlO_x. As aforementioned discussion, 600 °C annealed devices exhibit ferroelectricity with remnant polarization (P_r) of 1.5 μC cm⁻² at zero voltage. As the annealing temperature becomes higher, the P_r at zero bias becomes smaller which suggests the insignificant ferroelectricity and the trend is consistent with the C–V measurement and XRD characterization.

Fig. 6 P–E characteristic for HfAlO_x-based devices with different annealing temperatures measured at 1 kHz.

Compared to typical P–E characteristics of MFM devices with HfAlO_x,¹⁹ MFIS devices reported in this work show different properties in terms of (1) a lower P_r value and (2) a lower process temperature to induce ferroelectricity. For the lower P_r value observed in MFIS devices, the phenomenon can be explained by the fact that for MFIS devices, in addition to the polarization of HfAlO_x, induced charges over the Si/SiO₂ interface also occurs when the gate bias is applied. The induced charges along with the parasitic series resistance from the Si substrate make the applied field cannot fully impose on the HfAlO_x and therefore the P–E curve is not as ideal as those reported in MFM devices where the entire applied field appears across the ferroelectric layer. For the process temperature, 600 °C annealing is observed to induce ferroelectricity for MFIS devices, lower than that reported for MFM (TiN/HfAlO_x/TiN) devices which is 800 °C.¹⁹ The lower process temperature of MFIS devices implies that the process necessitates lower thermal budget and can be fully integrated into incumbent advanced Si-based VLSI technology which adopts gate-last process and requires low process temperature to avoid devices degradation. Although HfAlO_x has been found to be a promising ferroelectric materials in MFM devices, the process temperature higher than 800 °C may limit its applications in certain fields. The ferroelectric HfAlO_x in MFIS structure developed in this work further advances the progress by lowering the process temperature to 600 °C, making it possible to be applied to front end process while widening the application spectra. It is apparent that the required temperature to induce ferroelectricity strongly depends on the substrate and Si substrate is capable to form ferroelectric HfAlO_x at a lower process temperature. The mechanism behind the substrate-dependent phenomenon may be ascribed to the compressive thermal stress caused by the difference in thermal expansion between the substrate and the HfAlO_x during thermal annealing. Assume that the stress in the HfAlO_x is completely exerted by the thermal expansion difference and no significant stress develops in the substrate, then the in-plane stress in the HfAlO_x can be expressed as

where σ is the stress, E is the Young's modulus of HfAlO_x, ν is the Poisson's ratio of HfAlO_x, Δα is the difference in thermal expansion coefficient between the substrate and HfAlO_x, ΔT is the change in temperature. The thermal expansion coefficients for Si is 3 × 10⁻⁶ K⁻¹, TiN is 22 × 10⁻⁶ K⁻¹, SiO₂ is 0.5 × 10⁻⁶ K⁻¹ and HfO₂ is 30 × 10⁻⁶ K⁻¹. Note that the thermal expansion coefficient for HfAlO_x approximates that of HfO₂ because the Al content in HfAlO_x is about 4.5%. Based on the properties, it can be inferred that Δα in the HfAlO_x is larger for MFIS devices than that of MFM devices where M denotes TiN. As the amorphous HfAlO_x crystallizes, thermal energy is required for the system to overcome the energy barrier to initiate phase transformation (amorphous to orthorhombic phase) and the thermal stress outlined above plays an essential role to reduce the required thermal energy. Because MFIS devices correspond to larger Δα, it requires smaller ΔT to achieve the required thermal stress, making it possible to form orthorhombic phase that causes ferroelectricity at a lower process temperature.⁴² Once the external thermal energy is large enough to form the orthorhombic nucleus, the grain growth will be followed instantaneously because the process is by means of small atom displacement rather than atom diffusion due to the martensitic nature of HfO₂-based dielectric. For MFIS devices developed in this work, from the P–E characteristics, annealing at temperature higher than 600 °C attenuates the ferroelectricity even though a higher thermal stress is expected. This result can be understood by the fact the higher-temperature annealing provides higher thermal energy to even overcome the next energy barrier for phase transformation to monoclinic phase which is a more thermodynamically stable phase at 800 °C or 1000 °C and the inference is evidenced by the XRD analysis shown in Fig. 2.

Since HfAlO_x with 600 °C annealing has been proven to possess the most significant ferroelectricity, the analysis of C–V hysteresis with various voltage sweeping ranges for memory window test only focuses on devices with the process condition and the results are shown in Fig. 7. When the sweeping range increases from ±1 V to ±4 V, as depicted in Fig. 7(a), it shows clockwise hysteresis which increases as the sweeping range becomes larger and reaches a maximum value of 0.6 V for ±3 V sweeping range. For Fig. 7(b), as the sweeping range is larger than ±4 V, the clockwise hysteresis becomes smaller and it can be attributed to the fact that both ferroelectric and charge injection effects occur during the measurement and the latter corresponds to counterclockwise C–V hysteresis for p-type substrates.^43,44 Since the charge injection effect is more pronounced for larger sweeping range, it counteracts the ferroelectric effect and therefore leads to smaller hysteresis even with larger sweeping voltage. Fig. 7(c) summarizes the hysteresis trend with different sweeping voltage ranges and it apparently reaches a maximum value at ±3 V.

Fig. 7 C–V characteristics for HfAlO_x-based devices with 600 °C annealing under (a) ±2 V to ±4 V sweeping and (b) ±4 V to ±5 V sweeping. (c) C–V hysteresis memory window as a function of bi-directional sweeping voltage.

Table 1 exhibits the memory window for MFIS-based devices with different ferroelectric films. Although conventional ferroelectric films such as BaTiO₃,^44,45 SBTO,¹⁰ and PZT-based^7,8 ferroelectrics demonstrate promising memory characteristics in terms of reasonable memory windows at low operation voltage, the relative thick film thickness and the non-fab-friendly materials may hinder its integration with incumbent VLSI technologies. PVDF–TrFE,⁴⁶ an alternative ferroelectric film that holds potential for memory application because of 0.5 V memory window with operation voltage down to 3 V, still faces the difficulties to be implemented in a mass production line due to its organic properties. Compared to the counterparts reported in the literature, the HfAlO_x developed in this work presents its great perspectiveness by showing the memory window of 0.6 V with 3 V operation voltage which is comparable or superior with those with conventional ferroelectric film. Furthermore, the ferroelectric HfAlO_x can be realized in relatively thin thickness and is fully compatible with fab process with the capability to be formed at 600 °C which is desirable for prevalent advanced gate-last VLSI technology.

Table 1 Comparison of memory window and operation voltage for MFIS-based devices with different ferroelectric films and thermal treatments

Ferroelectric film	Thickness (nm)	Thermal treatment	Operating voltage (V)	Memory window (V)	Reference
BaTiO3	120	700 °C/30 min	2	0.5	44
SBTO	300	800 °C/60 min	3	0.47	10
BaTiO3	90	600 °C/NA	7	0.75	45
PZT	290	500 °C/60 s	4	0.65	7
PZT	120	600 °C/60 s	10	3.4	8
PVDF–TrFE	45	130 °C/60 min	3	0.5	46
HfZrOx	30	950 °C/NA	3	0.5	21
HfAlOx	15	600 °C/30 s	3	0.6	This work

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Conclusion

The ferroelectricity of HfAlO_x with Al concentration of 4.5% is systematically investigated by physical and electrical characterization through the platform of MFIS structure. XRD analysis reveals that 600 °C-annealed HfAlO_x is crystallized into non-centrosymmetry orthorhombic phase which is a preliminary requirement for ferroelectricity while HfAlO_x annealed at 800 °C corresponds to dominant monoclinic phase with minor orthorhombic phase showing further degraded ferroelectricity due to the phase transition. The ferroelectricity of HfAlO_x is further verified by clockwise C–V hysteresis, significant polarization–electric field hysteresis curve, and in-depth analysis of current component as compared to HfO₂. Compared to typical HfAlO_x-based MFM devices where annealing temperature higher than 800 °C is required to induce ferroelectricity, the greatly reduced thermal budget of 600 °C for MFIS devices can be ascribed to the compressive thermal stress caused by the thermal expansion between the Si substrate and the HfAlO_x during thermal annealing, and it is the stress that facilitates the formation of orthorhombic HfAlO_x at a lower annealing temperature. The HfAlO_x-based MFIS devices also present the great perspectiveness for low-voltage memory applications in terms of a memory window of 0.6 V with 3 V operation voltage which is comparable with or superior to those with conventional ferroelectric film. Thanks to the MFIS devices structure and lower required thermal budget for ferroelectricity, the process developed in this work paves an intriguing way to implement low-power transistor and memory by integrating the ferroelectric HfAlO_x with advanced VLSI technology.

Acknowledgements

This work was supported by Ministry of Science and Technology of Taiwan under Contracts MOST 104-2221-E-007-080.

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