Advanced artificial synaptic thin-film transistor based on doped potassium ions for neuromorphic computing via third-generation neural network

Abstract

As the basic and essential unit of neuromorphic computing systems, artificial synaptic devices have great potential to accelerate high-performance parallel computation, artificial intelligence, and adaptive learning. Among the proposed artificial synaptic devices, the synaptic transistors are well considered to be one of the most suitable devices for simulating artificial intelligence. So far, synaptic transistors based on iontronic have been proposed and proved to demonstrate great potential in artificial intelligence applications. However, little research specifically focused on improving the device's ability to mimic synaptic behaviour. Here, we proposed the enhancement of synaptic properties of the solution-based thin-film transistors based on potassium ion conduction in the dielectric layer for the first time. Due to the formation of a gated electrical double-layer, the transistor exhibited an enlarged memory window. Based on this, the excitatory postsynaptic current in the synaptic thin-film transistor was modified accordingly, which further enhanced the suitability of the proposed synaptic thin-film transistor for simulating biological synapses. In addition, considerable synaptic properties were evaluated elaborately, including paired-pulse facilitation, short-term memory, long-term memory, and spike-time-dependent-plasticity. Most importantly, according to the impressive results of the Artificial Neural Network algorithm's image recognition simulation, the simulation image recognition rate based on the mentioned artificial synaptic devices reached as high as 92%. Last but not least, in order to simulate biological neurobehavior more closely, the Spiking Neural Network algorithm was also successfully implemented to complete the specified machine learning task, which further proved the great potential of the synaptic devices in advanced low-power neural network systems.

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Introduction

With the increase in the amount of data and demand for parallel computing, modern computers based on the von Neumann architecture are facing severe challenges of inefficient information processing.^1–3 Inspired by biological neural network systems, massively parallel neuromorphic computing was then proposed accordingly.^2,4 Unlike the traditional logic circuit with transistors connected by only one or less than a handful of other components, one neuron in the neural network could connect to a thousand other neurons.² Since information processing can be highly parallel within a dense neural network, the data selection characteristics of neural networks are considered to be more power-efficient for artificial intelligence than the existing von Neumann computing architecture.^5–8 The basic and essential unit in a neural network is the synapse, which is regarded as the functional connection between two adjacent neurons in the biological brain.⁹ The strength of the synapse, i.e., the synapse weight, could be adjusted and memorized, through which the neuron can transfer and analyze the information.^7,9,10 Therefore, the development of artificial synaptic devices towards an artificial neural network to mimic similar functions of the biological neural network is greatly worthy of investigation. Over the past decades, significant efforts have been extensively devoted to developing a synaptic device to trigger synaptic plasticity and non-volatility. In order to mimic and simulate synaptic activity, typically, the two-terminal memristors with reversible analogue switch behavior such as oxide-based resistance random access memory (RRAM),^11,12 ferroelectric memory,^13,14 and phase-change memory (PCM)^15,16 were well studied and reported. Nevertheless, it is considered to be a significant obstacle for them to enable both learning and signal transmission simultaneously.¹⁷ In addition, the reduced control of conductance changes and asynchronous read/write operations limits the further application of two-terminal memristor devices as synaptic elements. Although several solution schemes based on consecutive update-verify procedures have been initiated and attempted to modify the weight adjusting procedure of synaptic devices,³ they further induced energy-expensive and device-to-device access, and increased the complexity of peripheral circuit design from application perspectives. Consequently, the energy-saving advantages of neuromorphic computing in data processing will no longer hence exist.^18–21

To overcome these mentioned challenges, synaptic transistors have been proposed accordingly, such as ferroelectric-gate synaptic transistors and electrolyte-gate synaptic transistors.^9,14,22,23 Compared with two-terminal memristor devices, the synaptic transistor with individually controllable three terminals can effectively prevent crosstalk between adjacent devices, allowing selective and parallel weight update.²⁴ In addition, the channel conductance between the source (S) and the drain (D) electrodes of the synaptic transistor-like devices could be adjusted by the gate (G) voltage, which is recognized as synapse weight.¹⁰ Therefore, neuromorphic computing is widely considered to be realized with a broad application prospect via three-terminal synaptic transistors. Recently, the mechanism for devices to possess synaptic properties has been proposed tentatively, such as electrostatic modulation, iontronic theory, and ferroelectric effect theory.^2,14,25–28 Moreover, many kinds of research are worth discussing on how to optimize the mechanism of synaptic devices. At the same time, it is worthwhile to study the mechanism of the synaptic transistors from the perspective of material characterization. In addition, diverse research of neuromorphic applications still relies on traditional algorithms that have a weight updating process different from the real biological neuron system, such as ANN. Therefore, simulating biological neural networks more realistically in neural networks is of significant worth studying.

Here we propose a novel technology of doping potassium (K⁺) ions in the dielectric layers to enhance the synaptic characteristics of solution-processed synaptic thin-film transistors (TFT) for the first time. For biological individuals, as an indispensable element in the human body, K⁺ ions play an important role in nerve signal transmission.²³ For a gated transistor-like device, the K⁺ in ion conducted dielectric contributes to the formation of the electric double-layer (EDL) at the interface between the dielectric and semiconductor layer, which leads to an increase of the controllable and repeatable memory window.² As a result, the transmission characteristic curve of the synaptic transistor will be more adaptable to mimic the synaptic activity. In addition, due to the effects of electrostatic modulation and electrochemical doping, devices doped by K⁺ ions have greater relaxation time, causing the artificial synaptic transistor similar to the real biological synapse. For the proposed synaptic transistor, the indium oxide (InO_x) and alumina (AlO_x) were served as the n-type channel and dielectric materials, respectively. Both AlO_x and InO_x thin films were prepared by solution method, which is well proved to have low cost and high composition controllability.²⁹ The synaptic plasticity was then simulated, such as paired-pulse facilitation (PPF), short-term memory (STM), long-term memory (LTM), spike-time-dependent-plasticity (STDP). Furthermore, the image recognition process was simulated using Artificial Neural Network (ANN) and Spiking Neural Network (SNN) algorithms. The simulated image recognition rate by ANN algorithms after 20 learning epochs reached 92%, which is close to the theoretical value that the learning rate is 1 (96%). In addition, although ANN's deep learning model has proven its powerful learning capabilities, it requires expensive computing resources and significant power consumption, making it difficult to be applied on the mobile edge devices such as smartphones and watches.³⁰ Furthermore, ANN employs a “classical” backward propagation approach in order to demonstrate classification. The backward propagation has no relation with neuromorphic computing as it only utilizes the static weight of the synapses (G⁺ − G⁻) but not their complex temporal properties. Therefore, the SNN algorithm, another advanced neuromorphic calculation model for the 3rd generation neural network with significant energy efficiency, has been proposed. Being an artificial neural network constructed using knowledge observed in biology, SNN uses spatiotemporal information (such as STDP) to update synaptic weights based on local learning rules,³¹ in which neurons connect neurons through synapses with adjustable weight values. Moreover, some recent study suggests that the STDP learning rule is involved in the formation of associative memory.³² Therefore, SNN is capable of more closely mimicking the working mode of biological synapses. In this work, the Mixed National Institute of Standards and Technology (MNIST) data set was also successfully identified under the SNN algorithm and well proved to obtain extremely low energy consumption.

Experimental section

For the solution preparation, the AlO_x precursor solution with a concentration of 2.5 M was prepared by dissolving aluminium nitrate nonahydrate (Al(NO₃)₃·9H₂O, Aladdin) in deionized water (DI water). Based on the K⁺ doping concentration, the 0, 1, and 10 at% K⁺ ion-doped AlO_x precursors were prepared by adding 0, 0.025, and 0.25 M potassium chloride (KCl, 99.99% metals basis, Aladdin) into the AlO_x precursor solution, respectively. The InO_x precursor solution with a concentration of 0.15 M was prepared by dissolving indium nitrate hydrate (In(NO₃)₃·xH₂O, Aladdin) in deionized water (DI water). Subsequently, the prepared precursor solutions were ultra-sonicated and filtered through a 0.45 μm poly (ether sulfone) (PES) syringe to obtain transparent solutions.

For TFTs fabrication, the heavily doped n-type silicon (n⁺⁺ Si) was utilized as the gate substrate. In order to prepare the dielectric layer, the AlO_x precursor solution with and without specific K⁺ ion doping were spun onto the plasma-treated n⁺⁺ Si substrate and then annealed at 300 °C under ambient atmosphere for 30 minutes. After that, the InO_x precursor solution was spun onto the surface of the dielectric layer and then annealed at 250 °C for 30 minutes in an ambient atmosphere. Finally, the Al source and drain electrodes were deposited onto the semiconductor layer through thermal evaporation. The channel length (L) and width (W) were 10 and 150 μm, respectively, with a thickness of 100 nm.

The surface roughness of the K⁺ doped AlO_x layers was observed by atomic force microscopy (AFM, Bruker Nanoscope V). The surface morphology of the AlO_x layers was characterized by using a scanning electron microscope (SEM, Hitachi S4700). The element distribution of the sample was characterized by using the energy-dispersive X-ray spectroscopy (EDS, Hitachi S4700). The chemical bonds were measured through X-ray Photoemission Spectroscopy (XPS, Thermo scientific ESCALAB 250Xi with Al Ka X-ray source). The electrical characteristics and synaptic characteristics test of the TFTs were revealed utilizing a semiconductor analyzer (Keysight, B1500 A) in the dark condition at room temperature.

Results and discussion

Generally, as depicted in Fig. 1a, for biological individuals, signals are transmitted from presynaptic neuron to postsynaptic neuron through synapses in nervous systems.³³ When presynaptic neurons receive external stimuli, ions in the extracellular fluid enter synaptic neurons through ion conduction and form memory by generating graded potentials and action potentials.³⁴ In order to mimic the behaviour of biological synapses, the electrochemical artificial synaptic TFTs based on K⁺ doped AlO_x dielectric and InO_x semiconductor were fabricated as described in Fig. 1a. For these devices, the Al gate electrode, InO_x semiconductor, and K⁺ ions represent the presynaptic neuron, the postsynaptic neuron, and neurotransmitter, respectively. Fig. 1b shows the transfer characteristic curves of the TFTs with or without K⁺ ions doped AlO_x dielectric layer, indicating typical characteristics of n-type TFTs. According to the results, under the gate voltage (V_G) swept forward and backwards from −2 to 4 V, the devices with K⁺ doped AlO_x dielectric exhibit an obvious counter-clockwise hysteresis window than the ones without K⁺ doping. This could be utilized as the basis for the synaptic properties of the devices. In addition, from the distribution diagram in Fig. S1 (ESI†), it could be concluded that the device memory window in this work shows the normal distribution. In order to further investigate the surface morphology of the thin films, the AFM measurement was then operated, and the result is shown in Fig. 1c. The root-mean-square (RMS) roughness value of the AlO_x film without K⁺ ions is 0.138 nm, while the AlO_x film doped by K⁺ ions is 0.202 nm. This phenomenon shows that doping did not deteriorate the surface roughness of AlO_x, and all the deposited films are of nanoscale smoothness which is beneficial for fabricating a high-quality channel layer and advantageous for obtaining TFT with high stability.^35,36 The SEM image in Fig. 1d also indicates that the produced K⁺ doped AlO_x film exhibits flat and dense properties. The element map scanning during the EDS analysis was operated accordingly, and the results are shown in Fig. 1e to Fig. 1g. It is worth noting that Fig. 1f demonstrates that the doped K⁺ ions are evenly distributed in the film.

Fig. 1 (a) Schematic diagram of the K⁺ doped AlO_x synaptic TFT. (b) Transmission characteristics of AlO_x with and without K⁺ doped. (c) AFM images of AlO_x with and without K⁺ doped. (d) SEM image of surface topography in AlO_x surface view. The EDS mapping of (e) N, (f) K, (g) O elements in AlO_x coating on Si substrate. (h) K⁺ ions migration in the K⁺ doped AlO_x solid-state electron by bias spikes. (i) XPS image of the surface InO_x film.

In the biological neuron network, information transmission is mainly in the form of a bioelectrical pulse. The nerve fibres of each neuron are not directly connected but separated by other substances. When a bias input reaches the end of presynaptic neurons, basic ion neurotransmitters are released into synapses, resulting in new electrical bias spikes on adjacent postsynaptic neurons.³⁶ Similarly, for artificial synaptic TFT, the mobile K⁺ ions in the AlO_x dielectric act as neurotransmitters, resulting in the changing of the channel conductance. The mechanism of channel conduction modulation is proposed in Fig. 1h. When the positive electric spike is applied to the gate of the synaptic TFT, the moving K⁺ ions will drift toward the dielectric/semiconductor interface.³⁷ These migrated K⁺ ions could modulate the channel conductance through two types of iontronic modulation processes: EDL modulation (under weak bias peak) and electrochemical doping (under strong bias voltage).^25,37 For EDL modulation, the migrated K⁺ ions will accumulate at the dielectric/semiconductor interface, inducing the accumulation of channel electrons.^38,39 Consequently, the channel conductance will increase. Once the external electric field is removed, K⁺ ions will diffuse back to their original equivalent position due to the concentration gradient within a short period of time, and the EDL will then disappear. For electrochemical doping, other than the EDL modulation, part of the migrated K⁺ ions will penetrate the InO_x channel, causing the increase of the channel conductance.⁴⁰ After the removal of the gate voltage, the penetrated K⁺ ions will gradually diffuse back to the original equivalent position, and this process will take a long period of time, leading to long-term retention of the increased channel conductance.^25–27 As mentioned above, the mobile K⁺ ions within K⁺ doped AlO_x dielectric contribute to the formation of an EDL and electrochemical doping, resulting in short-term retention and long-term retention, respectively.^23,41–43 To prove the existence of the EDL, the metal-insulated semiconductor structure device was fabricated (Fig. S2, ESI†). Moreover, the capacitance–voltage (C–V) and capacitance-frequency (C–F) were tested. Fig. S3a (ESI†) shows the C–V test result, in which the gate voltage increases from −2 to 4 V and the capacitance of the device increases from 1.6 × 10⁻⁷ to 5.3 × 10⁻⁷ F cm⁻². During the artificial synaptic TFT operation, these specific capacitances are maintained at a high level. Compared with the control group without K⁺ doping, the capacitance increased significantly, considering K⁺ and protons in K⁺ doped AlO_x strongly accumulate on the InO_x/K⁺ doped AlO_x interface to form EDL under the action of an electric field, which can be regarded as a nanogap capacitor with ultra-high capacitance, thereby increasing the capacitance.³⁸ Fig. S3b (ESI†) illustrates the C–F test result. The specific capacitance distribution can be divided into two areas, the high-frequency area with a small capacitance value (>10 kHz) and the low-frequency area with a large capacitance value (<10 kHz)). The one in the high-frequency region (>10 kHz) refers to a bulk electrolyte capacitance with a fast-charging speed. The increase in capacitance in the low-frequency region (<10 kHz) is reasonably related to the formation of an EDL at the InO_x/K⁺ doped AlO_x interface. The EDL obtains large capacitance through the migration and accumulation of ions on the interface.^25,37 Furthermore, the C–V relationship at several frequencies was tested, and the results are shown in Fig. S3c (ESI†). At 10 kHz–1 MHz, the capacitance exhibits a weak V_gs dependence. At 1 kHz, with the increase of V_gs, the capacitance increases significantly, indicating the presence of pseudocapacitance. Through the integration of the C–V curve, the total accumulated charge Q_T can be found:⁴³

where Q_M is the mobile charge and Q_F is the faradaic charge. The result is shown in Fig. S3d (ESI†). The total charge generated by the C–V integration at 10 kHz–1 MHz is almost the same, indicating that the interface charge has electrostatic properties. The Q_F can be ignored at these frequencies, and the total charge is equal to the mobile charge. At the frequency of 1 kHz, the Q_T in the devices showed the largest value. This could also be mainly attributed to the formation of interface EDL.⁴³ To demonstrate the existence of electrochemical doping, X-ray photoelectron spectroscopy (XPS) scanning was performed on the surface of the InO_x layer before and after a long-time strong gate bias (1000 s, 4 V) had been applied to the TFTs with or without K⁺ doping. In order to make the comparison more obvious and explicit, 10% K⁺ doped AlO_x was used for the experiment. According to the results in Fig. 1i, through the application of gate bias, the peaks of K 2p (292.6 eV) could be found in the InO_x layer of the devices with K⁺ doping while could not for the ones without K⁺ doping.⁴⁴ However, since both the K⁺ doped AlO_x layer and the InO_x layer were prepared by the aqueous solution method, during the InO_x fabrication, the precursor solution might dissolve part of the K⁺ from the K⁺ doped AlO_x dielectric. Therefore, for K⁺ doped AlO_x TFT without bias application, K⁺ ions could also be found on the InO_x surface (Fig. S4, ESI†). Nevertheless, according to the ratio of the peak intensities of K 2p_3/2 and In 3d_5/2 in the XPS spectra before (29.89%) and after (35.13%) the gate bias, it could be concluded that the content of K⁺ ions in the InO_x layer induced by electrochemical doping increases after the bias voltage (Table. S1, ESI†).

In synaptic TFT, the excitatory postsynaptic current (EPSC) is used to manifest the channel conductance and indicate the response to presynaptic signals, i.e., the gate bias (Fig. 2a).⁴⁵ When the gate bias is applied in the form of pulses, the EPSC in the synaptic TFT could show a modulated trend that effectively mimics the excitability changes in biological neurons (synaptic plasticity). As shown in Fig. S5 (ESI†), a positive gate pulse could cause an immediate increase of EPSC followed by a gradual recovery, while a negative gate pulse leads to an opposite response. Most importantly, the EPSC can be arbitrarily regulated, which is the research basis of synaptic devices.^42,46,47 In the neuromorphological system, neurofacilitation, also named paired-pulse facilitation (PPF), is known as typical synaptic behaviour.⁴⁸ Due to the memory effect, if two presynaptic peaks are close enough, the EPSC peak resulting from the first presynaptic peak cannot be eliminated entirely, and the peak generated by the second presynaptic peak will be enhanced accordingly.^48,49 A pair of presynaptic spikes (4 V, 30 ms) with a pulse interval (Δt) of 20 ms was continuously applied to the gate, as shown in Fig. 2b. The second EPSC peak triggered by presynaptic pulses is much higher than that of the first. Fig. 2c depicts the PPF index as a function of the interval time between pairs of pulses. The PPF index curve can be fitted as follows double-phase exponential function:⁵⁰

PPF index = A₂/A₁ = 1 + C₁ exp (−Δt/τ₁) + C₂ exp (−Δt/τ₂)

where A₁ and A₂ are the first and second EPSC peaks, C₁ and C₂ are the initial facilitation magnitudes, and τ₁ and τ₂ are relaxation time constants. The curve shows that PPF decreases with the increase of Δt. For the case of AlO_x TFT, the relaxation times, τ₁ and τ₂, are estimated to be 76.1 ms and 93.1 ms, respectively. For the case of K⁺ doped AlO_x TFT, τ₁ and τ₂ are estimated to be 136.2 ms and 166.5 ms, respectively, which is similar to the relaxation time of synapses in organisms. The higher value of time constants shows that K⁺ doping is indeed more suitable for simulating biological synapses with long-term memory characteristics.^43,51 For K⁺ doped TFTs, the EPSC levels of five consecutive presynaptic spikes at different voltage levels with Δt of 50 ms are shown in Fig. 2d. With the increase of presynaptic voltage from 1 V to 4 V, the amplitude changing of EPSCs was also increased. The peak value of the postsynaptic current was affected not only by the magnitude of voltage stimulation but also by the pulses’ width. When the width of the voltage pulse (4 V) increased from 50 ms to 1600 ms, the EPSC peaks of the TFT have more than doubled, as shown in Fig. 2e. Fig. 2f shows the EPSC levels of five presynaptic spikes (4 V) at different frequencies (2 Hz–25 Hz). It could be obtained that a higher frequency signal means a shorter interval between each peak, and a shorter interval time leads to a promotion of the EPSC. The ratio between the EPSC generated by the 5th peak and the 1st peak is defined as the current gain (A₅/A₁). As expected, the current gain enhanced with the pulse frequency. When the pulse frequency is 25 Hz, the current gain reached 1.35, which is increased by 32% compared to the test result under 2 Hz. Therefore, synaptic TFT can be used as high-frequency filters for large-scale neural morphological computing systems with frequency or time coding.^5,52 These results indicate that the proposed synaptic TFT has synaptic plasticity for various presynaptic voltage spikes, just like the characteristics of biological nerves. The stronger the stimulus applied, the stronger the response behaved.^49,53 In contrast, under the same pulses test for the TFTs without K⁺ doping, the EPSCs quickly returned to the initial states after the removal of the pulses without an obvious rising trend (Fig. S6, ESI†). These results are well consistent with the above analysis and confirm the effectiveness of K⁺ ion doping. In addition, the synaptic behaviours of devices with 10% K⁺ doped AlO_x TFT were also measured (Fig. S7, ESI†). The excessive K⁺ ion doping caused an intensive increase of the EPSC peaks to observe an upward trend with good linear characteristics. This means that this type of device is not suitable for further application in the machine learning field, which will be introduced in detail in the latter part. In addition, for artificial synaptic devices, lower energy consumption values are more conducive for the realization of large-scale calculations and more realistic simulation of biological synapses. As shown in Fig. S8a (ESI†), the EPSC response can still be triggered under extremely low V_ds and electrical impulse stimulation, and its energy consumption can be calculated by the formula:⁵⁴

E = V_ds × I_ds × t

where V_ds is the voltage applied to the drain terminal of the synaptic transistor, I_ds is the current flowing from drain to source terminal, and t is the width of the electrical pulse. The result is shown in Fig. S8a (ESI†). The energy consumption of our synaptic device is 2.5 fJ. The comparison of artificial synaptic energy consumption between K⁺ doped AlO_x artificial synapse TFT and other recently published work are shown in Fig. S8b (ESI†), which indicates a lower energy consumption of this work, similar to a biological system (10 fJ per synaptic event).^55–65 This result indicated that the device in this work has great potential in simulating the behaviours and energy consumption of human brain synapses.”

Fig. 2 (a) The principle of signal transmission from pre-synaptic to post-synaptic in biological synapses and simulation of the electrical impulse of artificial synaptic TFT. (b) Two consecutive presynaptic spikes (4 V, 30 ms) generate EPSC. Interval time (Δt) is 100 ms. (c) The PPF index is defined as the function of the ratio of A₂/A₁ and two pulses (4 V, 30 ms) interspike interval (V_ds = 4 V). (d) EPSC is generated by five presynaptic spikes (1 V to 4 V, 50 ms), Δt is 50 ms (V_ds = 2 V). (e) The enhancement effect of five consecutive presynaptic pulses (2 V) on EPSC, the pulse time varies from 50 ms to 1600 ms (V_ds = 2 V). (f) EPSC (V_ds = 4 V) is generated by five presynaptic spikes (4 V, 30 ms) with different pulse frequencies (2 Hz–25 Hz).

The multi-storage model proposed by Atkinson and Shiffrin (as demonstrated in Fig. 3a) shows that human memory has three components: sensory memory, STM, and LTM.⁶⁶ The external environment input of new information is firstly stored in the sensory register as a sensor memory in a short period and then selectively converted to temporary STM in short-term memory storage or permanent LTM in long-term memory storage. If the sensory stimuli are repeated frequently, STM will be transformed into LTM. Due to the complexity of the neural processes known to be realized in neural engineering, it is difficult to prove that neural processes are interconnected. However, the TFTs can simulate the synaptic function of STM and LTM characteristics by using input repetitive pulse stimulation. As shown in Fig. 3b, a series of electrical pulses (number of 5, 10, 20, 50, 100, 200) with a fixed duration of 100 ms and a voltage intensity of 4 V was applied to the synaptic device. It shows that EPSC rises under a positive pulse, which can be regarded as “learning”. The learning state is defined as the state at the end of the positive pulse. When presynaptic spikes had finished, the synaptic weight decays spontaneously over time. This decay process is similar to the forgetting process of biological synapse behaviour. In Fig. 3c, with the increase of the number of learning pulses, the drop of EPSC as a function of time gradually slows down, indicating the transition from STM to LTM.^3,49 In addition, due to the presence of electrochemical doping, the charge can be preserved for a long time. Furthermore, the learning process based on positive pulses is reversible, which means that the negative pulse input could accelerate the EPSC decrease process. Based on this, in addition to long-term potentiation (LTP), the device also exhibited long-term depression (LTD) characteristics. The LTP and LTD together formed the basis of neural computing. As shown in Fig. 3d, 50 positive voltage pulses were applied to enhance the synaptic weight (channel conductance, G) and simulate the “learning” function. Then 50 negative voltage pulses were applied to depress the synaptic weight and represent the “erasing” function.

Fig. 3 (a) The multi-storage model of human memory was proposed by Atkinson and Shiffrin. (b) EPSC is generated by different numbers (5–200 times) of presynaptic spikes (4 V, 80 ms), and EPSC is observed to be gradually increased. (c) As the number of applied pulses increases, it changes from STM to LTM. After different numbers (5–200 times) of presynaptic spikes stimulate 60 s, the current is still stored. (d) Conductance change during learning (by positive spike: 4 V, 100 ms) and erasing (by negative spikes: 2 V, 100 ms).

In order to investigate the stability of the device, 25 mentioned full-scale “writing” and “erasing” cycles were tested in the device, as shown in Fig. 4a. The results show that the device's synaptic behaviour remains stable after 2500 pulses. Ideally, the linear proportions existed between the increase and decrease of G and the number of electrical pulses. In fact, the cumulative conductance is unable to exactly follow a simple linear correlation, which leads to non-linearity (NL) of the synaptic weight update. The value of G could be then described by function:³

G_P = B_P[1 − exp (γP/A_P)] + G_min

G_D = −B_P[1 − exp(P − γ/A_D)] + G_max

B_P/D = (G_max − G_min)/[1 − exp(−γ/A_P/D)]

G_P and G_D are the fitted conductance of “writing” and “erasing” processes in Fig. 3d. P is the normalized pulse number, γ in this work is 1, and A is a parameter that can control the nonlinear relationship between conductance and the number of pulses and is inversely proportional to the value of NL (Table. S2, ESI†).³ According to the results, the weight-renewed NL has a relatively low gain for the potentiation mode in the “learning” process (NL_P = 0.8884), while the value of the “erasing” process (NL_D = 3.54) is asymmetrically high. This corresponds to previous studies that the positive and negative pulses of the same amplitude cause the EPSC to rise and fall in different amplitudes.⁶⁷

Fig. 4 (a) Use 25-cycle pulses (50 positives (4 V) and 50 negatives (−2 V) pulses with a pulse duration of 50 ms and an interval of 50 ms) to simulate the synaptic TFT channel conductance. (b) ANN structure used in the simulation. (c) Simulation of MNIST digit recognition accuracy based on synaptic TFT perceptron neural network. (d) Mapping images of test data sets for three different learning epochs.

To further explore the neuromorphic computational simulation capabilities of K⁺ doped AlO_x TFT synaptic devices, a handwritten artificial neural network was developed, which can simulate the numbers in the revised MNIST data set through the ANN algorithm.^3,68 Specifically, as shown in Fig. 4b, since the synapse layer is composed of 28 × 28 input neurons, the input pattern contains the same number of pixels, which are fully connected with 7840 synaptic weights and converted into 10 output neurons. It is worth noting that the synaptic TFTs have only positive channel conductance, while there are positive conductance and negative conductance in the weight matrix. Therefore, the conductance difference between two equivalents synaptic structures was defined as the synapse weight, which can be expressed as W = G⁺ − G⁻. Here, the symbol W represents the synapse weight. Based on the backpropagation algorithm, W increases as G⁺ increases and decreases as G⁻ increases. As described in Fig. 3d, the G of the device can be increased by applying a positive voltage pulse, and the application of a negative pulse will cause the G of the device to decrease. The conductance change extracted from the “learning” and “erasing” curves describes the detailed information of the synaptic weight change. It can be concluded that the G_max/G_min ratio of the synaptic device is 25.1. According to previous literature, good linearity and a high G_max/G_min ratio will improve the final recognition accuracy.^67,69 In the simulation, due to the high G_max/G_min ratio (25.1) and suitable linearity (NL_P = 0.8884, NL_D = 3.54), the recognition accuracy can reach 92% after 20 learning cycles, as shown in Fig. 4c. Moreover, the experimental device's recognition accuracy also approaches the ideal accuracy based on linear weight updating route and unlimited G_max/G_min (96% after 20 periods). As shown in Fig. 4d, considering the handwritten number “3” as an example, the output matrix was drawn in the mapped image (28 × 28 pixels). Initially, the output was random without any image information, and after 20 learning states, the shape of “3” became recognizable accordingly.

In addition, the SNN algorithm-based simulation for image recognition was further attempted. Compared with ANN, SNN is closer to the actual working model of biological synapses. As shown in Fig. 5a, the ANN algorithm is based on a continuous mathematically-defined nonlinear activation function. However, the information processing modes of the human brain and the artificial neural networks are distinguished from each other. Typically, the information is encoded as binary spikes in the human brain, while most artificial neural networks use real-valued vectors to represent data. As a comparison to ANN and shown in Fig. 5a, the SNN is all-or-none output in response to input spikes. It is also regarded as the “third-generation” neural network since it has the potential to replace deep learning methods in the fields of computational neuroscience and biological trusted machine learning.⁷⁰ The binary (spike or no spike) operation is considered to be more suitable for fast and energy-efficient simulation on hardware devices.⁷¹ In addition, the SNN can emulate the human brain more faithfully on artificial neuromorphic hardware due to its noise resiliency, energy efficiency, and convenient implementation.⁷² The shaping of weight is based on the following two rules: Firstly, any synapses that contribute to the firing of postsynaptic neurons should become stronger, and their value should increase; Secondly, the synapse that does not contribute to the firing of the postsynaptic neuron should be weakened. Typically, as shown in Fig. 5b, multiple neurons are connected to a single neuron through synapses. Each presynaptic neuron fires at its own rate, and the spike is sent forward by the corresponding synapse. The strength of the spikes converted to postsynaptic neurons depends on the strength of the connecting synapses. Due to the input spike, the membrane potential of the postsynaptic neuron increases and emits a spike after crossing the threshold. When the postsynaptic neuron spikes, it will monitor which presynaptic neurons help it fire. This can be acquired by observing which presynaptic neurons spiked before the postsynaptic neurons spiked. Therefore, the postsynaptic spike is then induced by increasing the membrane potential, so the corresponding synapse is strengthened accordingly.

Fig. 5 (a) ANN algorithm and SNN algorithm function diagram. (b) SNN algorithm weight update diagram. (c) STDP response based on K⁺ doped AlO_x synaptic devices. (d) Image recognition rate of SNN algorithm. (e) Different stage results of training the SNN using the MNIST data set. Via the generation characteristics of the SNN, the image is reconstructed using the training weights connected to each output neuron to view the learning situation of the network.

In order to operate the SNN simulator, the STDP behaviour of the device served as the principle rule to update the weights and classify patterns, which is considered to be a biological process used by the brain to modify its neural connections. Fig. 5c shows the STDP curve of the synaptic device under electric pulse V_ds of 1 V and V_gs of 1 V with both pulse duration of 30 ms. The STDP is the change in the synaptic weight (Δw) between pre-and postsynaptic spikes which can be modulated by using relative time duration between them.⁷³ The Δw is defined as (G_Post − G_Pre)/G_Pre, where G_Pre and G_Post are conductance after the pre-and postsynaptic spikes, respectively. It could be observed that if the pre-spiking precedes the post-spiking (Δt >0), the connection strength of the synapse between two neurons would be reinforced. On the contrary, Δt <0 led to a depression phenomenon.

During the SNN simulation, the G_Post weight used is the conductance of 1 s after V_post or V_pre, and the maximum time interval Δt between V_post and V_pre is 3.2 s during the process of testing STDP. To prove this simulation further closer to the actual hardware conditions, a time interval as an additional inference period was added. Therefore, the 4.3 s, which is slightly larger than the summation of Δt and one-second postpone, was chosen as an additional inference period. Fig. 5d shows the simulation result of image recognition using the SNN algorithm. The recognition rate of the MNIST data set after training reached 86%. Fig. 5e shows the weights of all synapses connected to a specific output neuron (the number is 400) after training based on the MNIST dataset. The red line in the figure represents the variable threshold. The threshold of each mode was calculated based on the number of contained activations. As shown in the inset diagram, the trained weight matrix could successfully recognize the image.

Conclusions

In summary, the solution-processed synaptic TFTs with K⁺ doping were fabricated and investigated. By doped K⁺ ions, the pristine InO_x/AlO_x TFTs exhibited enhanced synaptic behaviour. Based on the strong interfacial electric-double-layer coupling effect and electrochemical doping effect, the K⁺ doped transistors showed an obvious anti-clockwise memory window, which leads to a regulated EPSC behaviour. Moreover, several essential synaptic properties were measured, including PPF, STM, LTM, and STDP. Most importantly, under the simulation based on the ANN algorithm, the image recognition rate of the MNIST database for the proposed K⁺ doped device is as high as 92%. Based on the SNN algorithm, the image recognition task was also successfully simulated and proved its advantage in energy consumption. Overall, the TFTs experimental results present a simple and low-cost method to enhance the synaptic characteristics of artificial synaptic TFT, which is expected to act as a basic computing unit in the next generation of the neuromorphic system and has the potential to give birth to better robots, self-driving cars, medical diagnosis, and other intelligent human-computer interaction systems.

Conflicts of interest

There are no conflicts to declare.

Acknowledgements

This research was funded in part by the Natural Science Foundation of the Jiangsu Higher Education Institutions of China Program (19KJB510059), Natural Science Foundation of Jiangsu Province of China (BK20180242), the Suzhou Science and Technology Development Planning Project: Key Industrial Technology Innovation (SYG201924), University Research Development Fund (RDF-17-01-13), and the Key Program Special Fund in XJTLU (KSF-P-02, KSF-T-03, KSF-A-04, KSF-A-05, KSF-A-07, KSF-A-18).

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Footnotes

† Electronic supplementary information (ESI) available. See DOI: 10.1039/d1tc04827a

‡ These authors contributed equally to this work.

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