Low-voltage polymer monolayer transistors for high-gain unipolar and complementary logic inverters

Abstract

Cutting-edge integrated circuits based on organic transistors, though promising, encounter a notable obstacle due to their tendency for high power consumption, thereby constraining their broader practical applications. This study demonstrates low-voltage polymer monolayer thin-film transistors (TFTs) and high-gain logic inverters, wherein the utilization of thin films of AlO_x as gate dielectrics effectively enhances the gate controllability of TFTs. A photolithography-compatible method using a sacrificial layer is proposed to pattern the polymer monolayer, which significantly reduces off-state and gate leakage currents to 10⁻¹² A and achieves a steep subthreshold swing of 86 mV dec⁻¹. These device performances generate a maximum intrinsic gain of 10⁴ V/V, enabling the development of zero-V_GS-load logic inverters with voltage gains up to 251 V/V at a −3 V operation voltage (V_DD). Additionally, hybrid complementary inverters by integrating with amorphous indium gallium zinc oxide (IGZO) exhibit ultra-high voltage gains of 841 V/V at a V_DD of 5 V and 7436 V/V at a V_DD of 30 V, potentially setting a new benchmark for logic inverters across various semiconductor systems. These results open new avenues for advancements in low-voltage organic and hybrid logics tailored for portable and wearable electronics.