V-PCMixer: incorporating 3D vertical phase-change memory based analog in-memory computing in mixer architecture

Abstract

Analog in-memory computing (AIMC), which enables massive parallel computation, is gaining attention as a way to overcome the limitations of the von Neumann architecture. Among various devices, phase-change memory stands out due to its non-volatile, analog characteristics, and high technological maturity. Recently, MLP-based Mixers have emerged as an alternative to transformers, offering a simpler architecture that reduces operational complexity while maintaining excellent performance. We propose the V-PCMixer, an efficient AIMC architecture for MLP-based Mixers with high-areal-density vertically stacked synaptic weights. To enable this, we utilize a 3D Vertical Phase-change Memory (V-PCM) that leverages an efficient fabrication approach similar to that of 3D V-NAND while adopting a logical configuration of a cross-point array. The device is fabricated with improved etch and deposition processes, ensuring small variance and low read noise across layers, which are essential for AIMC applications. Additionally, the 3D V-PCM array structure inherently facilitates efficient matrix transposition required for the V-PCMixer, further reducing complexity and computational load. The V-PCMixer demonstrates approximately 90% accuracy on Cifar-10 classification. A 3–4%p drop in accuracy is observed when converting the trained model to analog. This approach can be seen as an example of system-technology co-optimization that incorporates computational flows into a 3D structure, rather than merely extending a 2D array.