Youna
Huang
abc,
Wei
Wang
b,
Yang
Li
b and
Changjian
Li
*ac
aDepartment of Materials Science and Engineering, Southern University of Science and Technology, Shenzhen, Guangdong 518105, China. E-mail: licj@sustech.edu.cn
bPengcheng Laboratory, Shenzhen 518000, Guangdong, China
cGuangdong Provincial Key Laboratory of Functional Oxide Materials and Devices, Southern University of Science and Technology, Shenzhen, Guangdong 518055, China
First published on 19th September 2025
Two-dimensional (2D) van der Waals (vdW) ferroelectric (FE) materials have recently emerged as promising candidates for advanced synaptic devices in brain-inspired neuromorphic computing systems. These materials retain ferroelectricity down to a few atomic layers, including the monolayer limit. Their unique properties–such as atomically clean surface/interface, mechanical flexibility, and LEGO®-like stacking capability–offer significant advantages for complementary metal–oxide-semiconductor (CMOS)-compatible fabrication, enabling high integration density, energy-efficient operation, and fast switching speed. Importantly, the intrinsic polarization in 2D ferroelectrics can couple with various physical phenomena, enabling the emulation of complex biological synaptic behaviors. This review provides a comprehensive overview of recent advances in 2D ferroelectric-based synaptic devices, with a particular focus on the role of coupling mechanisms within these materials. Firstly, we introduce the principles of neuromorphic computing, and advantages of 2D ferroelectric materials. Next, we classify 2D ferroelectric materials according to five key types of coupling mechanisms. We then review representative studies on 2D FE-based synaptic devices by analyzing how each coupling mechanism is utilized to achieve synaptic functionality. Finally, we discuss current challenges and prospects for leveraging these coupling mechanisms in synaptic applications. The purpose of this review is to provide a structured understanding of how intrinsic coupling in 2D ferroelectric materials can be utilized for the design of high-performance and biologically inspired synaptic devices.
000 kWh of energy.7 Overcoming this challenge requires new computing paradigms that reduce data movement and improve energy efficiency.
Neuromorphic computing seeks to emulate the architecture and functional principles of the human brain—spanning sensing, processing, and learning—by transmitting and processing only the changes in information, analogous to neural spikes in biological systems. As an inherently event- or data-driven paradigm, it enables ultra-low power operation. Fully CMOS-based neuromorphic hardware,8–10 such as IBM TrueNorth,11 Intel Loihi,12 Tianjic,13 and ODIN,14 has demonstrated the feasibility of this approach by implementing neuron and synapse functionalities with CMOS transistors, capacitors, and SRAM-based circuits.15,16 For instance, Loihi has achieved adaptive robotic arm control with 40x lower energy consumption and 50% faster processing compared to GPU.17 However, the scalability of CMOS-based neuromorphic hardware is hindered by circuit complexity and area cost. In contrast, non-volatile memory (NVM) technologies—such as resistive random-access memory (RRAM), phase-change memory (PCM), ferroelectric memory (FeRAM) and transistors (FeFET), and magnetoresistive RAM (MRAM)—offer high integration density, low programming energy, and multilevel conductance capabilities, making them promising candidates for next-generation neuromorphic chips.
In parallel, emerging memristive devices based on functional materials—including two-dimensional (2D) materials, perovskites, and organic polymers—exhibit desirable features such as high-density array compatibility, fast switching speeds, and the ability to emulate biological synapses through direct mapping of synaptic weight to device conductance.18,19 Although current demonstrations are largely limited to individual devices or small-scale arrays, and often remain at the simulation level, these technologies hold substantial promise. To bridge the gap between laboratory research and practical circuit-level integration, it is essential to further explore their working mechanisms and intrinsic properties.
Synaptic weight—representing the strength of the connection between pre- and post-synaptic neuron—plays a central role in memory and learning, with synaptic plasticity referring to the modulation of these weights. Two key forms of plasticity are short-term plasticity (STP) and long-term plasticity (LTP), which differ primarily in duration (retention time) of synaptic weight. STP, lasting from milliseconds to minutes, is involved in temporal computational processes, while LTP, which lasts for hours or more, plays a central role in memory and learning.29 The transition from STP to LTP is essential for implementing memory and forgetting mechanisms.
STP includes paired-pulse facilitation (PPF) and paired-pulse depression (PPD), while LTP encompasses spike-timing-dependent plasticity (STDP), spike-rate-dependent plasticity (SRDP), and spike-amplitude-dependent plasticity (SADP).30,31 Each mechanism involves two directions of synaptic weight regulation: potentiation and depression. Both PPF/PPD and STDP are triggered by two identical pulses with a specific time interval (ΔT). In PPF and PPD, paired pulses are applied to the pre-synapse, whereas in STDP, SRDP, and SADP, one pulse is supplied to the pre-synaptic neurons and the other to the post-synaptic neuron. PPF and PPD demonstrate that a reduced or increased interval between paired pulses results in an increased or decreased postsynaptic current, respectively, triggered by the second pulse. Conversely, in STDP, when the pre-synaptic spike precedes the post-synaptic spike (ΔT > 0), the synaptic connection strength is enhanced, with the degree of potentiation increasing as the interval shortens. When the post-synaptic spike occurs before the pre-synaptic spike (ΔT < 0), the synaptic strength is typically suppressed.23,32 This phenomenon is consistent with the Hebbian learning rule.33 The SRDP is characterized by a train of identical pulses, where the synaptic strength is enhanced when the rate of the pulse train is high and is weakened when the rate is low. In SADP, a single pulse modulates synaptic strength depending on its amplitude. Furthermore, the decay behavior of PPF can be described by the equation:
The behavior of individual neurons and synapses forms the foundation of the collective of neural computation, enabling powerful system-level functions such as learning, pattern recognition, and memory formation.18 Recent advances have increasingly focused on replicating these biological neuronal and synaptic behaviors in artificial devices, as accurate emulation of biological plasticity is essential for functional neuromorphic systems.35–42 These systems offer unique advantages over conventional von Neumann architectures, including massive parallelism, high energy efficiency, and adaptive learning, making neuromorphic computing a compelling solution to current computational bottlenecks.43
The fundamental performance requirements for artificial synapses—which rely on direct mapping between synaptic weight and device conductance—include analog resistance modulation, controllable synaptic weight adjustment, and support for practical synaptic plasticity.31 Key evaluation metrics such as memory window, switching ratio, endurance, retention, programming speed, and the number of conductance states are critical for emulating biological synaptic behavior and meeting stringent demands on energy efficiency, scalability, and hardware integration (Fig. 1). For instance, endurance refers to the number of write cycles a device can sustain without significant degradation (typically larger than 109 cycles),44 while retention reflects the duration over which a conductance state remains stable without relaxation, both of which are vital for reliable data storage in computation-intensive applications. Programming speed, or latency, is also crucial—devices should ideally support sub-microsecond or nanosecond-level switching to enable real-time signal processing and high-speed learning.45 Furthermore, artificial synapses should offer multiple stable and clearly distinguishable conductance states, with minimal overlap and strong retention, to ensure precise weight updates and enhanced learning resolution. Energy efficiency is another important metric. State-of-the-art devices aim for energy consumption below the picojoule (pJ) level per synaptic event, approaching or surpassing that of biological synapses (about 10 femtojoules).44,46 In addition, gradual, symmetric, and linear conductance modulation in response to pre- and post-synaptic spikes or external stimuli is essential—high linearity facilitates accurate training, and symmetry between potentiation and depression minimizes cumulative learning errors. For large-scale neuromorphic architectures such as crossbar arrays, minimizing device-to-device (D2D) and cycle-to-cycle (C2C) variability, while ensuring integration compatibility and scalability, is crucial for achieving reproducible learning behavior and manufacturability. Lastly, in artificial neurons, volatile memristors can emulate leaky integrate-and-fire (LIF) behavior, where the primary benchmark is the neuron's ability to accumulate stimuli during input pulse trains and subsequently reset after stimulation ceases.
The phenomenon of ferroelectricity was first discovered by Valasek in 192147 in Rochelle salt—[KNa(C4H4O6)·4H2O], an organic molecular crystal—thus formally establishing the concept of ferroelectricity. However, the material's water solubility and mechanical brittleness hindered its practical applications. A major breakthrough came in the 1950s with the successful deposition of robust thin films of three-dimensional (3D) perovskite oxides ferroelectrics, such as barium titanate (BaTiO3, BTO) and lead zirconate titanate (Pb[ZrxTi1−xO3], PZT).48,49 These materials remain among the most representative 3D ferroelectrics, with applications in ferroelectric random-access memory (FeRAM), microelectromechanical systems (MEMS), and ferroelectric photovoltaics.50–52 In recent years, doped hafnium oxide (HfO2)53–55 and scandium nitride (AlScN)56,57 thin films have emerged as promising candidates for modern ferroelectric devices due to their excellent ferroelectric properties and compatibility with complementary metal–oxide-semiconductor (CMOS) technologies.57,58 These materials enable the development of highly integrated ferroelectric components.
The ability of ferroelectric materials to maintain permanent electrical polarization below certain critical temperatures makes them well-suited as synaptic weight elements for information storage and artificial synapses.46,55,59–61 Moreover, ferroelectric materials support multilevel polarization states, which can be achieved through partial polarization reversal using electrical pulses.62 When integrated with semiconductor materials, polarization-controlled resistance modulation enables the emulation of synaptic plasticity observed in biological systems. For example, researchers have fabricated ferroelectric synaptic transistors using 3D ferroelectric polymers such as P(VDF-TrFE), which not only emulate synaptic behavior but also support in-memory sensing and logic processing.38,41,63–65 Additionally, Du et al. demonstrated a neuromorphic visual sensing application by integrating a BTO ferroelectric film with monolayer MoS2 to fabricate ferroelectric phototransistors.51
However, as the demand for miniaturization and on-chip integration increases in nanoelectronics, conventional bulk ferroelectrics face intrinsic limitations at reduced thicknesses. This include the emergence of strong depolarization fields and structural instabilities, due to surface reconstruction and dangling bonds.66 The depolarization field arises from unscreened polarization bound charges at the interfaces, generating an internal electric field opposite to the polarization direction—its strength increases as film thickness decreases. Moreover, when the thickness drops below a critical value, spontaneous polarization may vanish due to diminished long-range Coulomb interactions, enhanced depolarizing fields, and surface reconstruction. These limits have redirected research efforts toward low-dimensional ferroelectric materials, which exhibit robust polarization behavior down to the atomic limit and hold promise for next generation nanoelectronics and neuromorphic applications.
Field-effect transistors (FETs) based on 2D materials have demonstrated the ability to emulate artificial synapse behavior using a simple structure, where the source and drain act as the pre- and post-synapse, and the gate functions as the neuromodulator.114–116 For example, in 2017, a MoS2 back-gate FET was used to emulate LTP behavior by leveraging the non-ideal threshold voltage and the slow response of interface charge traps.117 A MoS2-based crossbar array was also developed to regulate synaptic weights and applied in spiking neural networks (SNNs),118,119 showing high accuracy, low energy consumption, and low operating voltage. In 2018, a WSe2/graphene Schottky diode demonstrated essential synaptic properties—such as STM, LTP and PPF—enabled by electrostatically controlled modulation of the barrier height.120 However, in 2D semiconductor materials, the realization of the memory and synaptic weight modulation often relies on intrinsic defects. These defects disrupt the periodic atomic structure of 2D materials and hinder their ability to fully leverage their intrinsic advantages. Furthermore, device performance is significantly limited by the poor reliability and limited tunability of ion migration, which occurs at the atomic scale and is typically uncontrollable.
In contrast, 2D ferroelectric materials, as low-dimensional functional materials, are more promising candidates for synaptic weight modulation. Ferroelectric polarization facilitates non-volatile interfacial charge modulation, thereby enabling multi-level memory effects. Recently, various 2D ferroelectrics have been synthesized and applied in neuromorphic devices.74,81,94,101,107,110,121 These devices often have different architectures and mechanisms, posing challenges for understanding their underlying mechanisms and designing the next-generation neuromorphic components. Unlike previous reviews4,24,113,122–124 that are primarily organized by material classification or device architecture, this review focuses on the fundamental physical mechanism of 2D ferroelectric materials in synaptic applications. We highlight 2D ferroelectric-based synaptic devices with diverse functionalities and superior performance, enabled by the coupling between ferroelectric polarization and internal conductive morphology.
In this review, we provide an overview of recent advancements in memory and synaptic device applications utilizing 2D ferroelectric materials. We begin with a brief introduction to the fundamentals of ferroelectricity, followed by a discussion of intrinsic ferroelectric mechanisms and their distinct physical properties. Particular attention is given to ferroelectric coupling phenomena that arise at the material level, including (i) intrinsic polarization, (ii) polarization-ion migration coupling, (iii) polarization-carrier coupling and (iv) the interaction between out-of-plane (OOP) and in-plane (IP) polarization, and polarization coupling between two ferroelectrics, (v) polarization-light coupling (section 2). We then categorize recent developments in high-performance 2D ferroelectric-based neuromorphic devices according to how intra- and inter- material ferroelectric coupling mechanisms are employed to realize device functionalities. This classification results in five distinct categories: (i) ferroelectric (FE)-dominated, (ii) FE-ion migration coupled, (iii) FE-semiconductor coupled, (iv) FE-FE coupled, and (v) FE-light stimulation coupled devices (section 3). Finally, we conclude with a discussion on the current challenges and potential opportunities associated with these coupling mechanisms in both 2D ferroelectric materials and their device-level implementations (section 4). It is worth noting that section 2 focuses on polarization coupling mechanisms within the 2D ferroelectric materials themselves, which is why the term “polarization” is used. In contrast, section 3 discusses device-level implementations, where the term “ferroelectric” is more appropriate.
| Ferroionic | Ferroelectric semiconductor | Ferroelectric superconductor | Ferroelectric metal | ||||
|---|---|---|---|---|---|---|---|
| Material | CuInP2S6 | CuCrP2S6 | α-In2Se3 | Bi2O2Se | SnS, SnTe | MoTe2 | WTe2 |
| Curie temperature | 315 K (ref. 125) | 390 K (ref. 126) | 500 K (ref. 127) | 508 K (ref. 128) | 270 K (ref. 101) | 300 K | 350 K (ref. 107) |
| Spontaneous polarization | 3.7 μC cm−2 (ref. 129) | 16.05 μC cm−2 (ref. 83) | – | 35 μC cm−2 (ref. 97) | 1.81 C m−1 (ref. 130) | – | – |
| Limit thickness | 4 nm (ref. 75) | 2.6 nm (ref. 83) | 1.2 nm (ref. 94) | 6 nm (ref. 131) | – | 0.8 nm | 1.4 nm (ref. 107) |
| Band gap | 2.9 eV (ref. 132) | 1.22 eV (ref. 83) | 1.3 eV (ref. 133) | 2.09 eV (ref. 100) (monolayer) | 1.1 eV (ref. 134) | 1.1 eV (ref. 135) | – |
| Unique properties | Quadruple-well ferroelectricity (ref. 136) | Ferromagnetic, antiferromagnetic | Dipole-locking effect. Layer dependent ferroelectricity. | High mobility (ref. 99) | Purely in-plane ferroelectricity | – | Metallic ferroelectricity |
| Polarization | IP + OOP | OOP | IP + OOP | IP + OOP | IP | OOP | OOP |
| Polarization + ion | ✓ | ✓ | ✗ | ✗ | ✗ | ✗ | ✗ |
| Polarization + carrier | ✗ | ✗ | ✓ | ✓ | ✓ | ✓ | ✓ |
| Polarization coupling | ✓ | – | ✓ | – | ✗ | ✗ | ✗ |
| Polarization + light | ✓ | – | ✓ | ✓ | ✓ | ✓ | – |
This review mainly focuses on experimentally verified 2D ferroelectric materials, particularly van der Waals ferroelectrics such as CuInP2S6, α-In2Se3, Bi2O2Se, SnTe, MoTe2, WTe2. Artificially engineered ferroelectrics137–142 and single-element ferroelectrics143 are excluded from the discussion.
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| Fig. 2 Ferroelectric properties of CuInP2S6 (CIPS) and CuCrP2S6 (CCPS). (a) Crystal structure of CuInP2S6 (CIPS) with the Cu atom positioned in the upper part of the layer, corresponding to upward polarization. Perspective view of two [SCu1/3In1/3(P2)1/3S] layers. The c-lattice parameter is 13.09 Å. (b) Schematic of the sulfur octahedral cage showing the different types of copper sites: Cu atom can occupy the quasi-trigonal Cu1 site (an off-centered site), the octahedral Cu2 site (near the octahedron center), or the tetrahedral Cu3 site (penetrating into the van der Waals (vdW) gap between layers). Each site has upward and downward symmetry-related positions. (c) The P–E hysteresis loops of a 200 nm-thick CIPS parallel-plate capacitor measured at 1 kHz, confirming remanent polarization of 3.7 μC cm−2. (d) PFM phase image of a 4 nm-thick CIPS flake with written box-in-box patterns by reverse DC bias. Scale bar, 1 μm. (e) Corresponding PFM amplitude (black) and phase (blue) hysteresis loops during the switching process, demonstrating switchable ferroelectric behavior. (f) Cross-sectional energy dispersive X-ray spectroscopy (EDS) mapping of Cu+ distribution in a CIPS capacitor after prolonged DC bias stress, providing direct nanoscale evidence of Cu ion migration, indicated by a Cu-rich area. (g) PFM phase mapping by writing box pattern in CCPS nanoflakes with the thickness of 12 nm. (h) Off-field PFM phase and amplitude hysteresis loops measured in a 2.6 nm-thick CCPS nanoflake, confirming switchable ferroelectric behavior. (i) Schematic illustration of the interlayer antiferromagnetic order in CCPS, where only the Cr atomic layers are shown in lower panel. (j) Temperature-dependent I–V characteristics of a CCPS device measured from room temperature (RT) to 250 °C. (a) Reproduced with permission.151 Copyright 2020, Nature Publishing Group. (b) Reproduced with permission.150 Copyright 2021, American Chemical Society. (c) Reproduced with permission.129 Copyright 2021, Nature Publishing Group. (d and e) Reproduced with permission.75 Copyright 2016, Nature Publishing Group. (f) Reproduced with permission.153 Copyright 2020, Royal Society of Chemistry. (g and h) Reproduced with permission.83 Copyright 2023, Nature Publishing Group. (i) Reproduced with permission.86 Copyright 2024, Nature Publishing Group. (j) Reproduced with permission.84 Copyright 2023, Nature Publishing Group. | ||
The polarization-ionic coupling in CIPS stems from the movement of copper cations. There are three distinct crystallographic occupation sites for Cu ions: central octahedral Cu1, off-centered quasi-trigonal Cu2, and nearly tetrahedral Cu3 within the vdW gap (Fig. 2b).43,149–151 At low voltage, the Cu ions oscillate vertically within the octahedron (up and down positions), resulting in the upward and downward ferroelectric polarization (Fig. 2b). The local energy minimum occurs at a Cu ion displacement of 1.53 Å, with a calculated spontaneous polarization P = ±3.7 μC cm−2 (Fig. 2c). When voltage or temperature exceeds a specific threshold, Cu ions may migrate to the vdW gap and form interlayer bonds with S atoms from neighboring layers (displacement of 2.25 Å, which corresponds to P = ±11.26 μC cm−2).152 The velocity of Cu+ ion along the polar is calculated to be 6.4 × 10−7 s m−1, derived from the current evolution.43
CIPS is referred to as “ferroionic” due to the coexistence of dipole order (ferroelectricity) and ionic disorder (ionic conduction).28 Within the framework of Cu activities in CIPS, four primary conductive mechanisms are identified in the Au/CIPS/Gr ferroelectric semimetal junction (FSMJ): frozen-in polarization state, ferroelectric polarization state (where Cu ions exclusively hop between Cu1u and Cu1d without escaping from the sulfur framework), Cu ions hopping state (where Cu ion enter the vdW gaps and perform local hopping), and conductive filament state (where Cu ions migrate throughout the entire layer).152 Furthermore, Cu ions can migrate in the in-plane direction with active energy of 0.23 eV (ref. 154) or 0.61 eV (ref. 150) when T > Tc, which are lower than the migration barriers in the out-of-plane direction of 0.85 eV (ref. 149) or 0.92 eV.150 The migration pattern of Cu+ ions is determined by activation energy. Some studies suggests that when a vertical voltage is supplied, Cu+ ions initially follow an in-plane predominantly migration path before eventually migrating out-of-plane.149 The coupling mechanisms between dipoles and Cu+ ions have not been fully understood yet because the coupling occurs in nanoscale regions, which makes it challenging to clearly study the phenomena inside. Thanks to the rapid progress in in situ high resolution transmission electron microscopy (STEM) and scanning electron microscopy (SEM) with energy dispersive X-ray spectroscopy (EDS), researchers can acquire comprehensive information. In 2020, as reported by Zhou et al. in their EDS data, copper cations were observed to be mobile over the vdW layer and to accumulate near the cathode surface.153 The sample utilized in their experiments is a metal/CIPS/metal capacitor, as shown in Fig. 2f. Since the discovery of ferroelectricity in 4 nm CIPS in 2016 (Fig. 2d and e),75 various architectures of CIPS-based volatile and non-volatile memory devices have been proposed, demonstrating high performance and versatile functionality.
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| Fig. 3 Ferroelectric properties of ferroelectric semiconductor α-In2Se3 and Bi2O2Se. (a) Schematic model of interlocked in-plane (IP) and out-of-plane (OOP) ferroelectric polarization switching in α-In2Se3. (b) Ferroelectric hysteresis loop (right) measured in monolayer (1.2 nm) α-In2Se3 corresponding optical microscope image (left). (c) PFM phase mapping showing the coupling of OOP and IP polarization components. (d) Layer-dependent IP PFM phase images for α-In2Se3 films with thickness ranging from 2 to 6 nm. (e) Statistical analysis of the IP phase contrast as a function of layer number (1L to 6L), demonstrating the persistence and evolution of ferroelectric behavior with thickness. (f) Schematic illustration of the layered crystal structure of Bi2O2Se. (g) PFM phase image of a 7.3 nm-thick Bi2O2Se flake on Au film, deposited on a heavily p-doped silicon substrate. (h) Piezoelectric hysteresis loops conducted by applying DC voltage using DART-PFM, showing amplitude (top panel) and phase (bottom panel) response under DC field OFF, confirming ferroelectric behavior. (a, d and e) Reproduced with permission.92 Copyright 2018, American Chemical Society. (b) Reproduced with permission.94 Copyright 2018, Wiley-VCH. (c) Reproduced with permission.161 Copyright 2022, Nature Publishing Group. (f) Reproduced with permission.95 Copyright 2020, Wiley-VCH. (g and h) Reproduced with permission.96 Copyright 2023, Wiley-VCH. | ||
In 2017, the ferroelectric properties of α-In2Se3 were first predicted, suggesting that α-In2Se3 might exhibit both out-of-plane and in-plane ferroelectricity at room temperature, even at the monolayer scale, with a calculated electric dipole moment of 0.11 eÅ per unit cell.90 The displacement of selenium atoms in the middle Se layer generates spontaneous electric polarization.92 In the same year, Zhou et al. reported the first experimental finding that the 10 nm thick α-In2Se3 demonstrates out-of-plane (OOP) piezoelectricity and ferroelectricity at room temperature.91 Thinner α-In2Se3 materials were under investigation. Researchers subsequently confirmed the intercorrelated out-of-plane (OOP) and in-plane (IP) polarization in α-In2Se3 utilizing the chemical vapor deposition (CVD) method at a thickness of 6 nm (ref. 92 and 93) and exhibited stable ferroelectricity down to a monolayer (1.2 nm)94 thickness in exfoliated α-In2Se3 nanoflakes (Fig. 3b). After that, α-In2Se3, a category of 2D ferroelectric material, has attracted significant attention in various fields related to ferroelectric devices.119,162–166
α-In2Se3 maintains the interlocked IP and OOP dipoles at room temperature (Fig. 3c). Rightward IP polarization is coupled with the downward OOP polarization, while the leftward polarization is coupled with the upward polarization (Fig. 3a). Therefore, unlike conventional ferroelectrics, the in-plane electric field in α-In2Se3 induces out-of-plane polarization switching, and the resulting polarization exhibits enhanced retention time.133 Furthermore, the layer-dependent odd-even effect is observed: a flake with an even number of layers typically exhibits zero polarization, as the opposing polarizations in adjacent layers cancel each other out (Fig. 3e). α-In2Se3 is easy of scalability for large-area growth. The research presents inch-scale monolayer α-In2Se3 single crystals, representing a promising opportunity for the application of In2Se3 ferroelectric devices.167 Vertically stacked α-In2Se3/WSe2 heterostructures are directly synthesized by CVD and employed as photodetector, showcasing their potential uses in integrated optoelectronic devices.168 It is noted that InSe is the same as In2Se3, is ferroelectric semiconductor, has an optical band gap of 1.25 eV.169 A ballistic FET with 2D InSe as channel material exhibited performances that can surpass state-of-the-art silicon FETs.170
000 cm2 V−1 s−1), and low electron effective mass (0.14m0), making it a promising material platform for high-performance ferroelectric semiconducting devices (Fig. 3f–h).171
Bulk SnTe is a narrow-gap semiconductor (∼0.2 eV) with a rock-salt structure and a lattice constant of 6.32 Å at room temperature. It is intrinsically heavily p-type doped, primarily due to the negative formation energy of Sn vacancies. Remarkably, IP polarization has been observed in SnTe down to the scale of just one unit cell,101 attributed to the reduced screening effect of free carriers on dipole–dipole interaction. The carrier density depends on both the density of defects and the size of the band gap. In ultrathin SnTe films, the density of Sn vacancies is 2 to 3 orders of magnitude lower than that of bulk SnTe (Fig. 4b), and the bandgap significantly increases when the film thickness is less than 8 UC. These effects collectively lead to an enhancement in ferroelectric properties at the atomic scale. At the ferroelectric transition temperature Tc, SnTe undergoes a structural phase transition from a centrosymmetric cubic phase to a non-centrosymmetric rhombohedral phase. This transformation involves a relative displacement between Sn and Te sublattices (Fig. 4a), resulting in the spontaneous polarization. In the monolayer limit, this in-plane polarization is oriented along the x-axis.101 Besides, a ferroelectric tunnel junction (FTJ) device based on in-plane polarization of SnTe demonstrates clear polarization-dependent tunneling behavior (Fig. 4c). When an in-plane write pulse is applied to generate an in-plane electric field, it induces two opposite in-plane polarization states, each producing different band bending. Subsequent readout via an OOP pulse to test electron tunneling, a hysteresis window is generated as the tunneling current is swept in opposite directions, achieving an on/off ratio of ∼3000 (Fig. 4c).
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| Fig. 4 In-plane ferroelectric properties of SnTe and SnS. (a) Schematic illustration of top view of the crystal structure of the SnTe monolayer. (b) Thickness-dependence of Sn vacancy density. (c) The tunnelling current exhibits a hysteresis loop, and a large on/off ratio is achieved. Inset: schematic of lateral device based on SnTe with in-plane polarization. (d) Cross-sectional crystal structures of SnS along the armchair direction with two different stacking configurations: non-centrosymmetric AA stacking and centrosymmetric AB stacking. (e) I-V curves of SnS thin film with varying thickness. Thicker SnS film exhibit the higher current levels and a slight shift in coercive field toward higher values. (f) P–E hysteresis loops of SnS thin film with varying thickness. (a) Reproduced with permission.172 Copyright 2024, Springer Nature. (b and c) Reproduced with permission.101 Copyright 2016, AAAS. (d) Reproduced with permission.104 Copyright 2020, Nature Publishing Group. (e and f) Reproduced with permission.105 Copyright 2020, American Chemical Society. | ||
Bulk Tin monosulfide (SnS) is a narrow-bandgap semiconductor (1.1 eV) with an interplanar distance of 3.1 Å, classified under the Pnma space group, and has feasibility for large-area CVD growth (Fig. 4d). Unlike other transition metal chalcogenides (TMCs), which are inherently n-type due to chalcogen vacancies, SnS is an intrinsically p-type semiconductor due to Tin vacancies. The reduced thickness of SnS enhances its ferroelectric properties. Thick SnS exhibits semiconductor characteristics, while thin SnS maintains room-temperature ferroelectric down to atomic scale (Fig. 4f) because of its lower carrier density and large band gap. The peak of thickness-dependent polarization current Fig. 4e indicates that the peak polarization current vanishes at greater thicknesses. The square hysteresis loop vanishes at greater thicknesses in the polarization–electric field (P–E) analysis (Fig. 4e). Some literature reports the remanent polarization to be about 17.5 μC cm−2 in more than one layer film,105 while other suggest it to be slightly higher in monolayer SnS. The one reason is that the higher concentration of charge carriers in thick SnS obstructs the ferroelectric response due to the screening effect.105 The other reason is that a thin structure breaks the lattice symmetry. Ferroelectricity arises from the breaking of inversion symmetry.
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| Fig. 5 Metallic ferroelectricity in WTe2. (a) Side view of the crystal structure of multilayered Td-WTe2 illustrating up and down OOP ferroelectric polarization (indicated by blue arrows). (b) Electrical conductance G of undoped WTe2 trilayer (left), bilayer (middle) and monolayer (right) devices as a function of sweeping electric field. The plots show bistable conductance states corresponding to upward (red arrows) and downward (green arrows), measured across a temperature from 4 K to 300 K. The undoped trilayer exhibits metallic temperature dependence, whereas the bilayer displays insulating behavior. (c) Schematic of a metal gated WTe2 thin film device. (d) Piezoresponse phase hysteresis loops through the top metal electrode gate on the WTe2 flake. (e) Temperature-dependent resistance of a 50 nm-thick WTe2 sample measured from room temperature down to 10 K. (a) Reproduced with permission.176 Copyright 2025, American Chemical Society. (b) Reproduced with permission.107 Copyright 2018, Nature Publishing Group. (c–e) Reproduced with permission.109 Copyright 2019, AAAS. | ||
The coupling mechanisms between light and ferroelectric polarization can be broadly categorized into three types. First, optical absorption can induce structural modifications in the crystal lattice of ferroelectric material through combined photogalvanic, piezoelectric, or electrostrictive effects, thereby altering the polarization state.132,137,158 Second, when a semiconductor is integrated into a ferroelectric device, photo-excitation in the semiconductor can redistribute screening charges, modulate the depolarization field, and potentially trigger polarization reversal.162,183,184 Third, light absorption at material interfaces can lead to charge trapping, which, in turn, affects the internal electric field distribution and alters the ferroelectric properties of the device.185,186 Collectively, these effects underscore the rich and dynamic interplay between light and ferroelectricity, highlighting the potential of polarization–light coupling for future multifunctional optoelectronic and neuromorphic device applications.187–189
Two-terminal metal/ferroelectric/metal (M/F/M) structure (Fig. 6g–i), such as ferroelectric tunnel junction (FTJs) and ferroelectric diodes, are valued for their compact architecture and scalability. These devices typically exploit polarization-modulated Schottky-like barriers to achieve resistive switching. Among them, FTJs are particularly promising due to their ability to reversibly switch between high and low conductance states, characterized by the tunneling electroresistance (TER) ratio.190 An FTJ typically consists of a nanometer-thick ferroelectric layer (<5 nm) sandwiched between two asymmetric electrodes. This configuration allows for low-voltages operation (several femtojoules per bit),191 fast write/erase speeds (in nanosecond range), and nondestructive readout capabilities,190 making FTJs strong candidates for next-generation, high-density memory and neuromorphic hardware applications.192,193
Among three-terminal devices, ferroelectric field-effect transistors (FeFETs) (Fig. 6b and c) have garnered significant attention due to their nondestructive readout capability, fast operation speed, compact footprint, and energy efficiency.194 In these devices, 2D ferroelectric materials with wide bandgap are commonly employed as gate dielectrics. The Coulomb interaction between the ferroelectric polarization and the carriers in the semiconductor channel modulates the carrier concentration depending on the polarization direction, resulting in hysteretic behavior in the transfer characteristics.195 The resulting channel conductance, which represents the synaptic weight, can be analogously tuned by voltage pulses, allowing for potentiation and depression of synaptic states. From a band structure perspective, polarization switching causes band bending, which is preserved due to the remanent polarization in the absence of gate voltage.196 This intrinsic memory effect allows FeFETs to operate as both memory and synaptic devices, which is essential for in-memory computing architectures.37,116,164,196–199
Despite their potential, FeFETs face two major challenges: depolarization fields and leakage current.194,200 The depolarization field arises because the dielectric constant of the semiconductor channel is often lower than that of the metal electrode, resulting in inadequate screening of ferroelectric polarization field.201 Several strategies have been proposed to address this issue and improve the data retention. One solution is to employ high-k dielectric materials as the insulating layer to reduce the depolarization field.202–204 Another approach is to eliminate the ferroelectric/insulator interface by using a metal-ferroelectric-semiconductor (MFS) structure with an oxide semiconductor channel.53,165,205 Additionally, introducing a ferroelectric capacitor in series with the FET, either integrated with the FET or externally connected (MFMIS structure), can also help mitigate depolarization and degradation.129,206 Selecting ferroelectric materials with better thermal stability, such as HfO2,59,207,208 has also shown to reduce the effects of depolarization, charge injection, and leakage current. Leakage current in FeFETs is often attributed to defects within the ferroelectric layer, poor crystal quality, or the formation of conductive filaments due to ion migration. This issue is particularly pronounced in two-dimensional ferroelectrics due to their ultrathin nature. Enhancing the quality of the ferroelectric film is therefore crucial for minimizing leakage current and ensuring reliable device performance.177,194,196,209
Moreover, the transfer characteristics (the drain current IDversus the gate voltage VG) of FeFET exhibit a clock or anti-clock hysteresis window during the forward and reverse VG sweeps. The hysteresis is critical for memory and synapse operation, enabling multi-level conductance modulation. Clockwise hysteresis may arise from two mechanisms.210,211 One is the tunneling of charge carriers’ through the ferroelectric layer into the trapping layer, effectively screening the electric field and increasing the threshold voltage (VTH). The other is charge trap phenomenon, resulting in charge carrier trapping and de-trapping due to the defect present at the interface between 2D channel layer and dielectric layer. In contrast, anti-clockwise hysteresis is primarily governed by the polarization switching direction, corresponding to the intrinsic counter-clockwise P–E loop of the ferroelectric material.196,212,213
This section reviews several neuromorphic devices at the individual device level and highlights their significant contributions. Table 2 summarizes different coupling mechanisms in synaptic devices based on 2D ferroelectrics, along with their key merit, highlighting the distinctive properties and operational characteristics associated with each coupling mechanism.
| Coupling type | 2D FE material | Structure | Memory window | On/off ratio | Endurance [cycles] | Retention [s] | Pulse width | LTP pulse number | Synaptic behavior | Other behavior | Ref. |
|---|---|---|---|---|---|---|---|---|---|---|---|
| FE-only | CuInP2S6 | MoS2/CIPS | 2 V | 105 | 103 | 103 | 1 ms | 197 | |||
| CuInP2S6 | CIPS/WS2 | 3 V | 107 | — | — | — | SS = 53.9 mV dec−1 | 214 | |||
| CuInP2S6 | CIPS/GaN | 0.8 V | 108 | — | — | 2 ms | STP, artificial neuromuscular; | Output current = 200 mA mm−1 | 215 | ||
| CuInP2S6 | CIPS/WS2/Al2O3 | 0.3 V | 109 | — | — | — | SS = 14 mV dec−1. Low driven voltage of 0.3 V | 216 | |||
| CuInP2S6 | BN/MoS2/CIPS/FLG | 10 ms | EPSC, PPF, SADP | 100 | |||||||
| CuInP2S6 | CIPS/BN/InSe | 4.6 V (clockwise) | 104 | 103 | 104 | 40 ms | 217 | ||||
| CuInP2S6 | CIPS/Gr/BN/MoS2 | 3.8 V | 107 | 104 | 4 × 103 | 100 ns | 129 | ||||
| CuInP2S6 | CIPS/WSe2 | 4.2 V | 105 | 100 | 50 | Memory ternary inverter. | 218 | ||||
| CuInP2S6 | Gr/CIPS/Cr (FTJ) | — | 106 | 104 | 104 | 219 | |||||
| CuInP2S6 | CIPS/GaN | 0.5 V | 108 | — | — | 1 ms | 50 | LTP, STP, artificial NMJ, artificial oculomotor dynamics | Normalized output current of 200 mA mm−1 | 215 | |
| CuCrP2S6 | Au/CCPS/Au | — | 103 | 103 | 103 | 30 | LTP/LTD, SADP | Antiferroelectric. | 84 | ||
| CuCrP2S6 | CCPS/MoS2 | — | 106 | — | — | — | SS = 12 mV dec−1 | 87 | |||
| α-In2Se3 | In2Se3/GaN | 2 V | 1010 | 103 | — | 1 ms | STP, RC | SS = 10 mV dec−1 | 220 | ||
| α-In2Se3 | Ti/In2Se3/Au | — | 102 | 100 | 103 | 60 | PSC, LTP/LTD, STDP. ANN. | 221 | |||
| SnS | Pt/SnS/Pt | — | — | 104 | 103 | 20 ms | 100 | EPSC, PPF, LTP/LTD, STDP, ANN | 105 | ||
| FE–ion coupling | CuInP2S6 | Au/CIPS/Au | — | 108 | 2 × 104 | 5 ms | LTP/LTD, SNDP, SRDP, PPF/PPD, potentiation following depression. | 28 | |||
| CuInP2S6 | Ni/CIPS/Ni | — | 102 | 90 | < 1 | 10 ms | LTP/LTD, PPF, reservoir Computing. | 149 | |||
| CuInP2S6 | Ag/CIPS/Au | — | 103 | 500 | 104 | 30 ms | EPSC, PPF, LTP/LTD. | 144 | |||
| CuInP2S6 | Gr/CIPS/Gr | — | — | — | 103 | 222 | |||||
| CuInP2S6 | Gr/CIPS/Cu | — | 104 | 350 | 104 | 5 ms | SS = 1.8 mV dec−1 | 223 | |||
| CuInP2S6 | Au/CIPS/SLG | — | 102 | 5 ms | EPSC, PPF, STP. | 152 | |||||
| CuInP2S6 | Au-CIPS-Au | PPF, STDP, Pavlov's dog, ADSP | 43 | ||||||||
| CuCrP2S6 | Au-CCPS-Au | — | — | 32 | — | 1 s | 8000 | LTP/LTD, CNN | Low power: 45 pJ per pulse | 224 | |
| α-In2Se3 | Ti/In2Se3/Au | — | 103 | 100 | 104 | 20 ns | — | 221 | |||
| FE–carrier coupling | α-In2Se3 | In2Se3/SiO2 (3 nm) | 16 V | 108 | 100 | PPF, LTP/LTD, CNN. | On-state power consumption = 10−5 W | 225 | |||
| α-In2Se3 | In2Se3/Al2O3/Si | 12.4 V | 106 | 103 | 104 | 10 ms | 100 | LTP/LTD, ANN | High linearity and symmetry. | 226 | |
| α-In2Se3 | Al2O3/In2Se3/SiO2 | 35 V | 104 | 20 ms | STP (EPSC/IPSC. PPF.) LTP (STDP, SRDP.) STP-LTP transition. | Power consumption = 1 pJ. | 34 | ||||
| α-In2Se3 | BN/In2Se3/BN/Al2O3 | 6 V | 103 | 500 | 500 | 40 ns | 30 | PSC, SRDP, LTP/LTD. Iris recognition and classification. | Write speed = 40 ns. Energy consumption = 234/40 fJ. | 155 | |
| α-In2Se3 | In2Se3/Ta2O5/Si | 10 V | 105 | 100 | 103 | 40 ms | 100 | PSC, PPF, ANN. | Nonlinearity = 0.12. Energy consumption = 10 pJ. | 227 | |
| α-In2Se3 | Al2O3/In2Se3/Al2O3 | 13.5 V | 105 | 250 | 150 | 100 μs | 100 | PSC, LTP/LTD, STDP. ANN. | 228 | ||
| α-In2Se3 | Al2O3/In2Se3/SiO2 | 30 V | 108 | — | — | — | 229 | ||||
| α-In2Se3 | Al2O3/In2Se3/HfO2 | 2 V | 108 | — | — | — | 229 | ||||
| Bi2O2Se | Al2O3/Bi2O2Se/Mica | 4 V | 104 | — | — | — | — | 96 | |||
| FE–FE coupling | CuInP2S6, α-In2Se3 | CIPS/BN/In2Se3 | 14.5 V | 106 | 104 | 104 | 5 ms | 64 | EPSC/IPSC. LTP. CNN. | 230 | |
| SnS, CIPS | SnS/BN/CIPS | 70 V | 105 | 104 | 104 | — | — | Four resistance states (two-bit storage) | 231 | ||
| WTe2, α-In2Se3 | WTe2/In2Se3/Au | — | 105 | — | — | 176 | |||||
| α-In2Se3 (OOP & IP) | MoS2/BN/In2Se3 | 7.8 V | 105 | 104 | 1 ms | 100 | LTP/LTD, CNN. | 133 | |||
| FE–optoelectronic coupling | CuInP2S6 | Gr/CIPS/Au | — | — | — | 50 ms | 189 | ||||
| CuInP2S6 | SnS2/hBN/CIPS | 18.4 V | 105 | 350 | 104 | 100 ms | PPF, STP, LTP/LTD. Reservoir computing. Retina-like adaptation. Pavlovian conditioning. | 183 | |||
| CuInP2S6 | ReS2/hBN/CIPS | 7 V | 107 | — | 103 | LTP; SRDP; | 232 | ||||
| α-In2Se3 | Gr/In2Se3/Gr | — | 102 | 60 | 60 | 166 | |||||
| α-In2Se3 | Au-In2Se3-Au | — | 104 | 800 | 103 | 30 | Optical PO + Electrical DE | 233 |
In the Au/CIPS/Ti device (Fig. 7a–f), ferroelectric polarization switching modulates the band alignment at the metal/CIPS interface. The device demonstrated a small set and reset voltage variation (σ/μ) of 5.3% and 9.1% compared to filamentary RRAM, with a low power consumption of 31 pW (standby) and 224 nW (set transition). It successfully emulated key synaptic behaviors, including PPF/PPD and STDP. The measured time constants for PPF (τa) and PPD (τb) were 12.2 and 10.8 ms, respectively (Fig. 7e), while STDP time constant are 8.3 ms (ΔT > 0) and 20 ms (ΔT < 0) (Fig. 7f), comparable to those observed in biological synapse. These findings validate the potential of the CIPS diodes employed in neuromorphic computing systems.
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| Fig. 7 Two-terminal ferroelectric synaptic device operating solely via the intrinsic ferroelectric mechanism. (a) Schematic illustration of a vertical Au/CIPS/Ti device. (b) Energy band diagrams corresponding to two opposite polarization directions in the CIPS diode. (c) Measured I–V characteristics under varying voltage sweep ranges. (d) The PSC subject to trains of 70 positive (+3 V) and 70 negative (−3 V) pulse, pulse width is 10 ms, and pulse period is varied from 50 to 90 ms. (e) PPF and PPD results showing synaptic weight changes as a function of the inter-pulse interval. (f) STDP measurement of synaptic weight change as a function of the time interval between pre- and postsynaptic spikes. (g) Schematic of a planar Pt/SnS/Pt ferroelectric artificial synapse. (h) PPF index extracted from short-term plasticity enhancement with varying time intervals between two consecutive pre-synaptic spikes (3 V, 20 ms). (i) STDP behavior of the SnS-based ferroelectric synapse, demonstrating Hebbian learning rule with synaptic weight modulation dependent on relative timing of pre- and post-synaptic spikes. (a–f) Reproduced with permission.147 Copyright 2020, Wiley-VCH. (g–i) Reproduced with permission.105 Copyright 2020, American Chemical Society. | ||
Although FTJ typically require asymmetric electrodes, ferroelectric materials can enhance the Schottky barrier at one interface while reducing it at the other, inherently inducing asymmetric transport behavior. Thus, symmetric electrodes can also achieve FTJ-like functionality if a ferroelectric layer is centrally positioned. For instance, Kwon et al. presented a lateral Pt/SnS/Pt analogue synaptic device that employs the IP ferroelectricity of 6 nm-thick SnS (Fig. 7g). This device demonstrated key synaptic functionalities including PPF, LTP, and STDP (Fig. 7h and i), with robust endurance over 104 cycles, high linearity in potentiation/depression, multi-level conductance states, strong retention, and minimal variability across cycles and devices.105 When evaluated using an artificial neural network (ANN), the system achieved a pattern recognition accuracy of 92.1% on the MNIST classification.
For three-terminal devices, CIPS is frequently used as a ferroelectric gate dielectric in FeFETs due to its relatively large bandgap among 2D ferroelectric materials. Numerous studies have demonstrated CIPS-based FeFETs with various 2D semiconductor, such as MoS2
129,197,234–239 and WS2.214,216 Park et al. fabricated a high-electron mobility transistor (HEMT)215 utilizing CIPS as the gate dielectric and AlGaN/GaN as electron gas channel (Fig. 8a), emulating the biological neuromuscular junction (NMJ) and biological oculomotor dynamics. After enhancement, the device required fewer gate pulses to achieve higher EPSC, analogous to increased NMJ connectivity. A faster response time of 152 μs (Fig. 8b) was achieved compared to 297 μs without enhancement (Fig. 8c), demonstrating potential for neuromorphic vision and bioinspired robotics.
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| Fig. 8 FeFET-based artificial neural devices. (a) Schematic of a CIPS/GaN FeHEMT device. The polarization state in the CIPS can be modulated to emulate synaptic plasticity, while the resulting current in GaN channel serves as an artificial EPSC. (b) Output spike before programming and (c) after programming (enhanced). After the enhancement process, a nearly two times faster response (output spike) speed is observed. (d) IDS–VGS curve of GaN/In2Se3 MOS-HEMT. The inset shows the linear scale curve. (e) Cumulative EPSC response to sequential pulses with 100 μs interval. (f) Experimental EPSC response to the input pattern of the letter ‘A’, demonstrating the potential for neuromorphic classification tasks. (a–c) Reproduced with permission.215 Copyright 2023, AAAS. (d–f) Reproduced with permission.220 Copyright 2023, American Chemical Society. | ||
A similar structure incorporating α-In2Se3/GaN HEMT220 (counterclockwise transfer curve is shown in Fig. 8d) was reported by Yang et al. The EPSC response to two pulses with a 100 μs interval showed clear temporal summation (Fig. 8e), enabling the implementation of reservoir computing (RC). When stimulated with a 3 × 5 binary image of the letter “A” (column-wise input: ‘01111’, ‘10100’, ‘01111’), the device generated distinguishable current patterns (Fig. 8f), which can be used as inputs for RC models for fast and efficient image classification.
Two-terminal devices that rely on ion migration can be categorized into vertical and lateral structures. Similar to metal-filament-based memristors—commonly known as ReRAM—these devices generally adopt a metal/ferroelectric/metal configuration.243 The internal ferroelectric layer facilitates ionic conduction and resistance switching (RS) functionality. Notably, CIPS is a prototypical 2D ferroionic material, exhibiting both robust ferroelectricity and active Cu+ ionic transport (Fig. 9a). In α-In2Se3, selenium vacancies (Fig. 9d) play a role analogous to oxygen vacancies in metal oxides, modulating the materials’ valence state and resistance. Such devices are classified as valence change memories (VCM).221 The coupling between ionic conductivity and ferroelectric switching can also give rise to novel phenomena, giving emerging applications in artificial synapses.
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| Fig. 9 Schematic illustrations and electrical characteristics of 2D ferroelectric device based on ion migration mechanism, demonstrating representative synaptic behaviors. (a) Schematic illustration of a lateral Au–CIPS–Au device, showing Cu+ ion migration under an applied electric field. (b) EPSC responses under different stimulation protocols: the upper panel shows the EPSC induced by a single 10 V presynaptic spike; the lower panel shows enhanced EPSC when a 4 V priming spike precedes the 10 V presynaptic spike, demonstrating ADSP. (c) Schematic illustration of comparison between Se2+ vacancy migration in α-In2Se3 device and biological synapse. (d) 20 stable cycles of DC sweep of Au/In2Se3/Ti device after electroforming, attributed to filament-based switching. (e) High-speed switching characteristics during programming operations shows the device can be switched on within 10 ns. (f) Schematic of Cu+ migration in vertical Ni/CIPS/Ni device. (g) Current response of a CIPS-based memory with a different pulse stream. (h) Current response to 16 different input states for reservoir computing. (a and b) Reproduced with permission.43 Copyright 2022, Wiley-VCH. (c–e) Reproduced with permission.221 Copyright 2021, Wiley-VCH. (f–h) Reproduced with permission.149 Copyright 2024, Wiley-VCH. | ||
Experimental studies have demonstrated that CIPS-based devices driven by Cu+ ion migration can emulate a wide range of neural functionalities.28,144,147,149,152,222 For instance, in a lateral Au–CIPS–Au device (Fig. 9a),43 several key synaptic functions have been successfully achieved, including STP, LTP, transition from STP to LTP, PPF, STDP, Pavlovian conditioning, and activity-dependent synaptic plasticity (ADSP). These functions arise from in-plane electric field-tunable ionic transport within CIPS. ADSP was demonstrated as follows: when a weak priming spike (4 V, 1 s) is applied, which alone does not induce any immediate variation in the device current, the subsequent application of a stronger voltage pulse (10 V, 1 s) leads to a PSC significantly higher than that induced by 10 V pulse alone. This prior-state-dependent plasticity arises from the partial migration of Cu+ ions under initial weak electric field. Although the 4 V pulse does not significantly change the overall conductivity, it causes some Cu+ ions to drift toward the cathode. These ions do not immediately return to their original positions, creating a metastable preconditioned state. As a result, the following high voltage pulse (10 V) drives more substantial ion migration, enhancing the EPSC amplitude (Fig. 9b). This mechanism can effectively mimic biological perception. For instance, a person transitioning from a cold to a hot environment may perceive the heat more intensely than someone already in a warm environment. Conversely, moving from a hot to a cold environment may induce a sharper sensation of coldness than a transition between moderately cool environments. This analogy illustrates how ion migration-based synaptic devices can mimic perception in neuromorphic systems.
For vertical device architectures, Zhang et al. reported a crossbar-type Au/In2Se3/Ti device (Fig. 9c),221 in which the memristive behavior is governed by the formation and rupture (set/reset processes) of conductive filaments originating from selenium vacancies. Following an initial electroforming step under a high voltage, the device exhibits abrupt and reversible switching behavior (Fig. 9d). Notably, the digital memory mode can be set or reset by ultrafast electrical pulse with width of 20 ns, demonstrating high-speed digital memory performance (Fig. 9e). Furthermore, in a Ni–CIPS–Ni vertical device (Fig. 9f),149 a forward voltage sweep from 0 to +2 V drives Cu+ ions migration toward the cathode, resulting in a low resistance state (LRS). During the reverse sweep, Cu+ ions accumulate at the interface near the cathode, restoring the device to a high resistance state (HRS). The electrical switching is attributed to the formation of an interfacial barrier and a build-in electric field, resembling the characteristics of a PN junction, enabled by mobile Cu+ ions. The device exhibits short-term memory (STM) with a decay time of approximately 125.3 ms, indicating that its response is governed by both electrical excitation and natural relaxation dynamics. This transient behavior is utilized to simulate reservoir computing. Specifically, migration of Cu+ ions in response to a binary “1” input generates a current spike, increasing conductance, while a “0” input allows the conductance to decay back to baseline (Fig. 9g). Using this mechanism, the system can encode and distinguish 16 different input sequences (Fig. 9h), highlighting its potential for use in neuromorphic computing architectures.
The strong intrinsic coupling between ferroelectric polarization and ion conduction in CIPS enables multi-modal neuromorphic functionalities. This dynamic control of various conductive switching mechanisms within a single device supports high-performance, energy-efficient neuromorphic computing systems. Xu et al. demonstrated a vertical Au/CIPS/Au device capable of tunable operation via both ionic migration and ferroelectric polarization (Fig. 10).28 At high voltages, the device functions as a non-volatile memory driven by ionic effects, whereas at low voltages it operates as an artificial synapse controlled by ferroelectric polarization, exhibiting behaviors such as LTP, PPF/PPD, SNDP/SRDP (Fig. 10d–f). At intermediate voltages, cooperative interaction between ions and polarization produces “potentiation following depression” behaviors, related to pulse frequency. When operating as non-volatile memory, the device exhibits an ultra-high on/off ratio (108), long retention time (2 × 104 s), and multilevel resistance states enabled through current compliance engineering. At intermediate voltages, the interplay between ionic motion and ferroelectric switching mimics the biological Ca2+ ion channel and reproduces key synaptic behaviors of transition from PPF to PPD (Fig. 10c). High-frequency pulses (1 ms interval) induce ferroelectric polarization, mimicking Ca2+ influx and resulting in PPF, whereas low-frequency pulses (100 ms interval) promote Cu+ ion migration, analogous to Ca2+ channel inactivation, resulting in PPD. These results underscore the potential of coupling of polarization and ion migration for modeling biological synaptic dynamics and enabling versatile neuromorphic functionalities.
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| Fig. 10 Synaptic functions based on polarization and ion migration coupling mechanism on Au/CIPS/Au vertical device. (a) Structure schematic of CIPS-based vertical two terminal device. (b) Potentiation and depression characteristics under electrical stimulation. (c) Current response to consecutive electrical pulses with pulse interval of 50 ms and pulse width of 50 ms, demonstration the competition between ferroelectric polarization and Cu+ ion accumulation/diffusion in the channel. An inflection from potentiation (PPF) to the depression (PPD) is observed as the number pulses increases. (d) PPF ratio as a function of time interval with corresponding fitting curve. (e) Spike number-dependent plasticity (SNDP) under varying pulse number. (f) Spike rate-dependent plasticity (SRDP) at different pulse frequency. (a–f) Reproduced with permission.28 Copyright 2024, Wiley-VCH. | ||
In addition, conductive filaments formation or the presence of selenium vacancies in α-In2Se3 and Bi2O2Se also represent ion migration-based mechanism.98,127 When relying solely on intrinsic ferroelectric polarization, ferroelectric semiconductor junctions (FSJs) can be constructed using a 30 nm-thick α-In2Se3 layer embedded between single-layer graphene and few-layer graphene electrodes.127 In this configuration, the ferroelectric polarization modulates the Schottky-like barrier at the graphene/In2Se3 interface. However, under high electric fields, significant defect formation may occur within the 2D ferroelectric, leading to the generation of conductive filaments. Unlike CIPS, where Cu+ ions migration may not disrupt the ferroelectric polarization, α-In2Se3 device cannot fully recover their polarization functionality after electroforming, due to abundant selenium vacancies that facilitate metallic filament formation.221
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| Fig. 11 Influence of hysteresis direction and equivalent oxide thickness (EOT) of dielectric materials on FeS-FET characteristics. (a and d) The clockwise Id–Vg curves observed when using a large-EOT dielectric. (b and e) Anticlockwise Id-Vg transfer curves observed with a small-EOT dielectric. (c) Schematic diagrams of Bi2O2Se-based FeS-FET corresponding to the electrical behaviors in (a) and (b). (f) Schematic diagrams of In2Se3-based FeS-FET corresponding to electric properties in (d) and (e), illustration the correlation between dielectric properties and hysteresis direction. (a–c) Reproduced with permission.96 Copyright 2023, Wiley-VCH. (d–f) Reproduced with permission.229 Copyright 2019, Nature Publishing Group. | ||
The hysteresis direction in the transfer characteristics of FeS-FET depends on the effective oxide thickness (EOT) of dielectric materials (Fig. 11). High-EOT materials (e.g., 270 nm SiO2) (Fig. 11a and d) typically exhibit clockwise hysteresis, whereas low-EOT materials (e.g., 10 nm Al2O3 or 15 nm HfO2) (Fig. 11b and e) show counterclockwise hysteresis.96,229 This behavior arises from the different extents of polarization switching within the ferroelectric semiconductor. In high-EOT devices, the electric field penetrating through the ferroelectric semiconductor cannot reach its top surface, resulting in partial polarization switching near the oxide/semiconductor interface. Consequently, the channel current is dominated by mobile charges at the bottom surface. When the polarization points downward, mobile charges accumulate at the bottom surface, leading to high channel current. This behavior corresponds to a clockwise hysteresis loop. In contrast, in low-EOT devices, the electric field is enough to induce full polarization switching in ferroelectric semiconductor. Here, the channel current is dominated by the charge at the top surface. When the polarization points downward, mobile charges do not exist at the top surface, resulting in high channel resistance, reinforcing the observed counterclockwise hysteresis loop. Additionally, the bottom surface is much easier to be modulated by the gate voltage.
In FeS-FETs using 2D ferroelectric semiconductors, synaptic functionality can be achieved by applying electric pulses either to the drain terminal or the gate terminal, offering versatile modes of synaptic operation. Notably, these devices can operate without an additional semiconductor channel layer. When a negative pulse is applied to the drain terminal (Fig. 12a–c), it induces an abrupt drop in current followed by a rapid recovery, and PPF shows the enhancement of PSC under positive pulse (Fig. 12b). The corresponding Ids–Vds characteristics display a butterfly-like hysteresis loop (Fig. 12a). In contrast, when pulse is applied to the back-gate terminal (Fig. 12d–f), a negative pulse consistently generates an excitatory PSC (Fig. 12e). To compare LTP (Fig. 12c and f) of synaptic learning behavior, Chen et al.226 conducted a study between drain-terminal and gate-terminal pulsing. Pulses applied to the drain terminal achieved superior performance with near-ideal linearity (nonlinearity factors of 0.207 and 0.211) and excellent symmetry (asymmetry value of 0.004), along with the capability of supporting 100-level conductance states, demonstrating superior performance compared to gate terminal pulsing. The underlying mechanism of the drain terminal modulation is attributed to the coupling between in-plane polarization and channel conductivity, whereas gate-terminal modulation relies on the coupling between out-of-plane polarization and conductivity.
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| Fig. 12 Dual-pulse modulation schemes in FeS-FET based on an α-In2Se3 device for emulating synaptic behavior. Electrical characteristics under drain terminal modulation (a, b and c) and gate terminal modulation (d, e and f) are shown. (a) Isd–Vsd curves under increasing range of Vsd from 2.0 to 6.0 V, demonstrating typical drain-terminal modulation behavior. (d) Isd–Vbg curves at different Vsd values, exhibiting the characteristic anticlockwise hysteresis under back-gate modulation. (b) PPF measured under 5 V, 0.1 ms pulse applied to the drain, showing enhancement of PSC under positive pulse. (e) PSC response to a negative pulse at the gate terminal, indicating excitatory synaptic behavior. LTP and LTD characteristics under drain (c) and gate (f) terminal modulation. (a and d) Reproduced with permission.34 Copyright 2021, Wiley-VCH. (b and c) Reproduced with permission.225 Copyright 2025, Wiley-VCH. (e) Reproduced with permission.228 Copyright 2020, Wiley-VCH. (f) Reproduced with permission.155 Copyright 2021, Nature Publishing Group. | ||
FeS-FET have been successfully integrated with various conventional dielectric materials, including h-BN, SiO2,34,225,244 Al2O3,228 HfO2, etc. Therefore, different dielectric choices may lead to different performance of FeS-FET. For example, Mohta et al. employed Ta2O5 as a high-k dielectric to reduce energy consumption and improve tunneling efficiency, using a bottom gate configuration.227 This approach also enhanced the nonlinearity of synaptic weights updates and enabled the demonstration of linear weight modulation and spike time dependent plasticity (STDP) behavior as artificial synapses. Beyond the vertically stacked FeS-FET, planar memristor structures based on α-In2Se3 with an inserted 3nm SiO2 layer has also been demonstrated. These devices exhibit an enhanced memory window (16 V), high on/off ratio (108), and improved linearity. On-chip training of single-layer perception (SLP) and convolutional neural network (CNN) has achieved classification accuracy up to 90%, highlighting their strong potential for neuromorphic computing systems.225
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| Fig. 13 Device based on ferroelectric-ferroelectric coupling mechanism. (a) Schematic of the all-ferroelectric device composed of 52 nm α-In2Se3, 6 nm BN, and 84 nm CIPS. (b) Schematic atomic model illustrating the upward polarization state in the In2Se3/CIPS heterostructure. (c) Transfer characteristics (ID–VG) showing a significantly larger hysteresis window in the CIPS/BN/In2Se3 device compared to the In2Se3/BN device, attributed to the polarization coupling between the two ferroelectrics. (d) Data retention characteristic measured over 104 s following programing/erasing pulse. (e) LTP/LTD behavior under 64/64 excitatory/inhibitory pulses (±0.5 V, 5 ms), demonstrating nonlinearity factors of 1.8/3.6. (f) Schematic of a bottom-gated dual-ferroelectric device with ferroelectric SnS as the channel material and CIPS as the ferroelectric gate dielectric. The schematic illustrates charge density and injection modulation via OOP/IP polarization under two programming condition (T1 and T2). (g) Demonstration of direct transition between multilevel resistance states, using the “10” state to the “11” state as an example. Left: initial state, middle: applied operation, right: final state. (h) Electrical transport characteristics of WTe2/In2Se3/Au FSJ, showing a plateau of an intermediate resistance state. (i) Schematic illustration of the three different ferroelectric polarization states in the WTe2/In2Se3/Au FSJ device, corresponding to three distinct resistance levels. (a–e) Reproduced with permission.230 Copyright 2022, Wiley-VCH. (f and g) Reproduced with permission.231 Copyright 2024, Wiley-VCH. (h and i) Reproduced with permission.176 Copyright 2025, American Chemical Society. | ||
Niu et al. developed a bidirectional polarization integrated FeFET231 by combining IP ferroelectric semiconductor SnS and OOP ferroelectric dielectric CIPS (Fig. 13f), exhibiting excellent endurance (104 cycles) and retention (104 s). The device features four distinct resistance states—HRS, mid-HRS, LRS, and mid-LRS—arising from the combination of the two polarization states in each material. This multi-bit capability is realized without the need for intermediate state transitions, as the OOP and IP polarization states can be independently controlled using vertical and lateral electric fields, respectively (Fig. 13g). Specifically, the vertical gate voltage (VG at terminal T2) modulates the channel carrier density through polarization-induced charge accumulation, while the lateral drain–source voltage (VDS at terminal T1) modifies the band alignment between the channel and electrodes, thereby regulating charge injection and extraction (Fig. 13f).
In related architecture, a ferroelectric semiconductor junction (FSJ) utilizing ferroelectric metal WTe2 as one of the electrodes in a WTe2/In2Se3/Au
176 exhibits three distinct resistance states: on, off, and an intermediate state, within a wider applied voltage range from −3.5 V to 3.5 V (Fig. 13h). Unlike the dual polarization switching CIPS/In2Se3 FeSFET, in situ Kelvin probe force microscopy (KPFM) verified that the WTe2 top layer retains its unchanged upward direction under external voltage (Fig. 13i). The observed multi-resistance behavior arises from the modulation of the Schottky barrier height due to α-In2Se3 polarization switching. Upward polarization in α-In2Se3 results in electrons accumulate at the WTe2/In2Se3 interface, leading to downward band bending in WTe2 and a low resistance on state. Conversely, when a downward external electric field is applied, the band of WTe2 bend upward, the polarization in α-In2Se3 is completely reversed downward, increasing the Schottky barrier by 0.37 eV (calculated as 5.12 eV–4.75 eV) compared to the on state. This increase suppresses thermionic emission, thereby elevating the device resistance and switching it into the off state. Partial polarization reversal and pinning effects contribute to the stable intermediate state, making the device a promising candidate for mimicking analog synaptic behavior.
Additionally, polarization coupling is not limited to interactions between separate materials; it can also occur within a single material system. For example, laterally gated (LG) FeFET based on α-In2Se3
133 and CuInP2S642 demonstrate that coupling between IP and OOP polarization can also enhance retention time and expand memory window, offering an additional pathway to optimize ferroelectric memory performance.
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| Fig. 14 Polarization-light coupling mechanism in 2D FE optoelectronic synapses. (a) Schematic illustration of a biological light-sensitive synapse (a) and its electronic counterpart (b). (c) Schematic diagram of the ML graphene/CIPS/Au electronic/optoelectronic device. (d) Ten consecutive I–V sweeps within ±2 V. The inset shows the linear-scale I–V curves highlighting rectification. (e) Photocurrent responses under light pulses of various power densities; inset plots the peak photocurrent as a function of incident power. (f) Optical “learning-forgetting-relearning” process under sequential light stimulation. (g) Architecture of a three-terminal SnS2/h-BN/CIPS Fe-FET optoelectronic device and schematic illustration of polarization-regulated carrier concentration modulation: (g) Downward polarization states in CIPS, and the channel layer is in the electron depletion state; (h) shows light-induced ferroelectric polarization reversal of CIPS. (i) Synaptic transition from STP to LTP enabled by prolonged the duration of light pulse. (j) Potentiation and depression behavior induced by successive optical and negative gate-voltage spike pulses. (k) Simulation of associative learning and extinction by the light pulse and electric pulse. (a and b) Reproduced with permission.246 Copyright 2023, American Chemical Society. (c–f) Reproduced with permission.189 Copyright 2024, Wiley-VCH. (g–k) Reproduced with permission.183 Copyright 2024, Wiley-VCH. | ||
2D ferroelectric materials with narrow bandgap and high carrier mobility are particularly suitable for next-generation photodetectors that integrate photon capture and information retention within a single device. For example, α-In2Se3 exhibits a bulk photovoltaic effect,89,91,233 and its photodetectors show polarization-dependent responsivity. In the upward polarization state, the responsivity increases by approximately three orders of magnitude compared to the down-state.184 Zhang et al. proposed an optoelectronic nonvolatile memory based on the ferroelectric properties of α-In2Se3.233 Gr-In2Se3 devices can operate in volatile (photodetector) or nonvolatile (optical random-access memory, ORAM) modes, depending on the dipole orientations within the α-In2Se3 stack.246
In addition to narrow bandgap materials, wide-bandgap 2D ferroelectrics such as CIPS (2.7 eV) has been explored for optoelectronic applications with the aid of light-induced migration of Cu+ ions. Liu et al. demonstrated optoelectronic conductance modulation in a CIPS-based device with asymmetric electrodes (Graphene/CIPS/Au) (Fig. 14c).189 When the applied voltage (±2 V) is below the ferroelectric coercive voltage of CIPS (±4 V), current modulation is primarily driven by light-assisted Cu+ ion hopping. The device presents rectification behavior, due to the interfacial Schottky barrier (Fig. 14d). Upon illumination, photogenerated electron–hole pairs are separated by the internal field, triggering a photoconductive response. The resulting current initially spikes, then gradually saturates. Upon cessation of light exposure, a sudden drop followed by slow decay is observed, with the current remaining above baseline (Fig. 14e). This behavior indicates a memory effect. The photocurrent scales linearly with light intensity, affirming that the number of photogenerated carriers is power-dependent. Leveraging this effect, the device mimics synaptic learning and forgetting under optical pulses (Fig. 14f), demonstrating short-term potentiation under weak light and long-term potentiation under prolonged illumination. Furthermore, Shang et al.247 reported a photoelectric synaptic device based on a longitudinal CIPS structure, capable of simulating the basic characteristics of biological visual systems and associative learning behaviors. Owing to its ultrasensitive photodetection properties, the energy consumption per synaptic event is less than 0.36 pJ.
Beyond light-induced Cu+ migration mechanism, light-induced depolarization field mechanism has also been demonstrated. In an all-VdW SnS2/BN/CIPS Fe-FET (Fig. 14g),183 the device exhibits high-performance memory functionality and supports neuromorphic vision system applications. Initially, CIPS possesses a downward polarization, which gradually reverses under illumination (Fig. 14g and h). This switching is facilitated by the compensation of ferroelectric polarization charges in CIPS by photogenerated carriers in SnS2, which modulate the built-in electric field. By varying light pulse duration (Fig. 14i), frequency, and intensity, the retention time and synaptic weights can be tuned, analogous to the STP-to-LTP transition observed in biological systems. The device also supports photonic potentiation and electrical depression operations (Fig. 14j), with a high on/off current ratio of over 105, a long retention time over 104 s, stable cyclic endurance of over 350 switching cycles, and 128 multilevel current states. These features enable advanced memory storage and retrieval, while also supporting neuromorphic functions such as retina-like light adaptation and Pavlovian conditioning (Fig. 14k).
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| Fig. 15 Schematic illustration of summarized characteristics of 2D FE synaptic device corresponding to each coupling mechanism. | ||
Devices based on the polarization-only mechanism can be structurally classified into two-terminal and three-terminal synaptic structures. Two-terminal memristors rely on switching internal polarization states or modulating interface potential barriers to emulate synaptic weight variation. Owing to their compact structure, they are well-suited for high-density integration in crossbar arrays. However, they are vulnerable to current interference and sneak path issues, which can degrade the accuracy and hinder precise signal transmission and weight updates. Moreover, the stochastic formation of conductive filaments reduces reliability, and the learning function and signal transmission process cannot be realized simultaneously due to the single tunable conducting channel between two electrodes.3 In contrast, three-terminal synaptic devices overcome these limitations by decoupling the conductance modulation path from the signal transmission path. This separation enhances functional modularity, allows more reliable weight updating, and improves operational stability. For functional layer, employing high-k 2D dielectric (e.g. HfO2, Al2O3) in FeFETs may enhance the carrier mobility by suppressing the coulombic impurity scattering effect and preventing the interfacial chemical reaction.248 While for channel layer, oxide channel materials such as ZnO, IGZO, and In2O3 may deal with the reliability concerns in FeFET.194 Additionally, floating gate (FG) FeFETs that utilize charge trapping and de-trapping in the floating layer to achieve nonvolatile behavior also represent a promising research direction.3
Ferroionic neuromorphic devices that couple ionic migration with ferroelectric switching are particularly capable of emulating various neuroplasticity functions, as ion movement within the device closely resembles neurotransmitter dynamics in biological synapses. However, this coupling mechanism often suffers from performance variability and limited data retention due to the high sensitivity of ionic conductivity, leading to reliability issues.195 Achieving stable resistive switching (RS) remains a significant challenge within this coupling mechanism. To address these issues, electrochemically active electrodes, such as silver (Ag) and copper (Cu), have been introduced to enhance the stability and performance of RS devices based on ionic conduction. Cu electrodes promote a stronger concentration gradient and facilitate faster ion diffusion, enabling more stable RS characteristics with low variation in threshold and hold voltages.223 Ag electrodes, in contrast, operate based on the formation and rupture of metallic filaments. Devices with higher compliance currents produce thicker and more robust filaments, thereby improving retention.144 Furthermore, utilizing advanced methods to confine the active region to a 1D channel may mitigate variability issues.195 Additionally, coupling of ion migration behavior with multiple ferroic orders, such as ferroelectricity and ferromagnetism, could enable novel physical properties,84,86 opening new avenues for future research.
Polarization-carrier coupling mechanism, realized in FeS-FET, effectively mitigates depolarization effects through mobile charge screening, thereby reducing interfacial charge trapping, gate leakage and short retention times. As a result, these devices demonstrate enhanced non-volatility and low power consumption. Moreover, the coexistence of intercorrelated IP and OOP polarization allows multi-terminal modulation (via both drain and gate terminals), supporting more complex operational modes.34,226 Since ferroelectric semiconductors serve as the channel material in FeS-FETs, the dielectric layer can be independently optimized; for example, integrating a high-k dielectric enables lower-voltage operation,227 making this a promising path for practical device design.
Polarization-polarization coupling mechanism benefits from enhanced retention time due to dipole–dipole interactions between stacked ferroelectric layers.133,176,230,231 However, this mechanism is currently limited by material availability, as it requires ferroelectric semiconductors as channel that possess both switchable polarization and semiconducting properties. Despite some promising examples such as α-In2Se3, the number of experimentally verified 2D ferroelectric semiconductors remains limited. Additionally, a major drawback of this coupling mechanism is its typically large hysteresis window (often exceeding 10 V), which poses challenges for low-power operation. Research based on this coupling mechanism is still in its early stage, and future efforts will be needed to address high operating voltage and expand material availability.
Polarization–light stimulation coupling introduces an additional sensory modality that is not present in other mechanisms. This enables the integration of sensing, memory, and computation within a single device, mimicking retina-like functionality found in biological visual systems.162,183,245 Furthermore, optoelectronic–ferroelectric effects can be explored by synergistically combining light stimulation with other coupling mechanisms, offering new opportunities for multifunctional device design.
Despite the considerable progress, several challenges remain before 2D ferroelectric materials can be adopted in practical neuromorphic hardware. At the material level, issues such as environmental instability, polarization fatigue, and low Curie temperatures limit device reliability and thermal operating range. Scalable growth methods like chemical vapor deposition (CVD) still face difficulties in producing large-scale, uniform, and high-quality films. Promising strategies include alloy engineering, encapsulation, and computationally guided material discovery to identify new 2D ferroelectrics with higher Curie temperatures and improved stability. At the device level, integration into van der Waals heterostructures often suffers from interface defects that trap charges and degrade performance. Achieving CMOS compatibility requires low-temperature fabrication processes and careful mitigation of parasitic capacitance. Additionally, stacking multiple layers introduces strain and thermal mismatch, affecting polarization alignment and retention time. Solutions such as atomic-layer passivation, monolithic stacking on flexible substrates, and the use of solid electrolytes for ferroionic gating may improve device integrity and integration feasibility.30,63,239
Functional challenges also remain. Ferroelectric-based synaptic devices often suffer from nonlinear and asymmetric weight updates due to domain wall pinning, which reduces training accuracy.233,249 The energy consumption of ferroelectric spiking neurons remains substantially higher than biological counterparts. Furthermore, polarization noise in quantum ferroelectric devices limits coherence and stability. Future opportunities lie in the development of moiré ferroelectrics for fault-tolerant states, light-responsive synapses for ultra-fast plasticity, and analog in-memory computing using multi-domain FeFETs.137,139,142 Continued interdisciplinary research across materials science, electronics, and neuroscience will be essential to overcome these challenges and fully realize the potential of 2D ferroelectric materials in neuromorphic and quantum technologies.
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