Our Emerging Investigator Series features exceptional work by early-career researchers working in the field of materials science.
He received his PhD in Mechanical Engineering with a Designated Emphasis in Nanoscale Science and Engineering from the University of California, Berkeley, in 2015. He earned his MS in Mechanical Engineering from KAIST in 2009 and his BS in Mechanical Engineering from Korea University in 2007. Prior to joining DGIST, he worked at Lam Research (Fremont, CA, USA) from 2016 to 2017 and served as R&D staff at the Samsung Advanced Institute of Technology (SAIT) in Yongin, South Korea, from 2009 to 2011.
He has expertise in site-selective laser processing, semiconductor device physics, low-resistance electrical contacts, and defect engineering. His research focuses on semiconductor fabrication technologies for next-generation monolithic 3D (M3D) architectures and advanced nodes. His work also explores micro/nanoscale thermal transport and emerging nanomaterials—such as 2D materials, ferroelectrics, metal–organic frameworks (MOFs), and sol–gel systems—for disruptive electronic device applications, as well as flexible and wearable electronic platforms for future integrated systems.
Read Hyuk-Jun Kwon's Emerging Investigator Series article ‘Achieving wide-range steep slopes in SnS2 negative capacitance transistors through an isolated band structure and thermionic emission enhancement via Bi contacts’ (https://doi.org/10.1039/D5MH01520K) and read more about him in the interview below:
MH: Your recent Materials Horizons Communication demonstrates negative-capacitance field-effect transistors in which a two-dimensional semiconductor with an intrinsically isolated conduction band (SnS2) is capacitively coupled to an La:HfO2/HfO2 ferroelectric–dielectric stack and contacted by semimetal Bi. How has your research evolved from your first article to this most recent article and where do you see your research going in future?
HK: This research gradually began around 2020 with the goal of realizing ultra-low-power electronic devices. Among the various channel materials being explored, two-dimensional (2D) materials had already attracted significant attention for future switching devices because of their atomically thin structure and high-quality single-crystalline nature in the lateral direction. Within this field, many studies have aimed to develop devices that minimize power consumption. I became particularly interested in SnS2, which exhibits both attractive electrical characteristics and promising material properties, and I started focusing on it more intensively. With its 2.2 eV bandgap and high electron mobility, SnS2 is an excellent candidate for negative-capacitance field-effect transistors (NCFETs). Moreover, its isolated band structure (IBS) creates a stair-like density of states (DOS), enabling steep-slope switching and overcoming the band overlap issues commonly observed in materials such as MoS2 or WSe2.
I also became particularly interested in HfO2 as a high-k material. One of the main reasons is that HfO2 has already been widely adopted in high-k metal gate (HKMG) technology for logic transistors, which makes it highly compatible with existing semiconductor processes. Moreover, the discovery of ferroelectricity in ultrathin HfO2 films, even at very small thicknesses, has reignited interest in ferroelectric memory and/or logic devices as promising next-generation architectures.
At first, I focused on HfO2, particularly on achieving the orthorhombic phase, which is the key phase responsible for ferroelectricity. To lower the conventional phase transition temperature (typically above 500 °C) and enhance the phase stability, I introduced zirconium (Zr) doping, forming Hf1−xZrxO2 (HZO) films. Using this material, we successfully demonstrated a 2D analog synaptic ferroelectric field-effect transistor (2D FeFET) that exhibited multi-level data storage capability and ferroelectric hysteresis with excellent data retention.1
To further improve the interface characteristics between SnS2 and HfO2, I investigated yttrium-doped hafnium dioxide (Y:HfO2) films. This approach enabled the formation of a semiconductor–dielectric interface with an efficient metal–oxygen framework and an extremely smooth surface (root mean square roughness ≈ 0.29 nm), leading to the realization of a high-performance 2D SnS2 field-effect transistor (FET).2
Building on these findings, I later combined SnS2 with a La:HfO2/HfO2 ferroelectric–dielectric stack, which ultimately led to the results presented in our recent work (Materials Horizons, 2025, DOI: https://doi.org/10.1039/D5MH01520K).
MH: What aspect of your work are you most excited about at the moment?
HK: It is fascinating that by modulating the material properties of HfO2 with various dopants, we can tailor its characteristics to achieve the desired phase at lower processing temperatures and to improve its structural stability. This tunability not only deepens the scientific understanding of phase behavior in ferroelectric oxides but also adds significant technological value by enabling the realization of ultra-low-power devices such as negative-capacitance FETs (NCFETs) and ferroelectric FETs (FeFETs), which are essential for future semiconductor technologies. What excites me most is that there are still many research directions I would like to explore further in this field.
MH: In your opinion, what are the most important questions to be asked/answered in this field of research?
HK: I believe the ultimate goal of this research is to bring the technology into practical, real-world applications. To achieve this, it is essential to develop low-temperature processes that are compatible with CMOS technology and suitable for three-dimensional stacked structures, which cannot tolerate high-temperature treatments. Ensuring the stability of the desired phase under these conditions is critical, and I see reliable device implementation as the key challenge that must be addressed. Beyond this, achieving stable, large-scale, and uniform ferroelectric properties for mass production is also crucial. Solving these challenges will open the door to applying this technology directly in the semiconductor industry, where low power consumption and high performance are increasingly demanded.
MH: What do you find most challenging about your research?
HK: I think the most challenging part of conducting this research is dealing with moments of self-doubt—questioning how meaningful or realistic the results can be. It can be discouraging when I compare my work to the published results of other researchers. However, in these moments, I try to focus on the unique strengths of my approach and build my research around them. I’ve learned that while progress may take time, maintaining this belief and persistence often leads to meaningful and valuable results.
MH: In which upcoming conferences or events may our readers meet you?
HK: I actively engage in a variety of fields, including materials, optics, and electronic devices, through participation in conferences and societies such as the Materials Research Society (MRS), IEEE Symposium on VLSI, SPIE Photonics West, the IEEE International Electron Devices Meeting (IEDM), Semicon West, etc. By participating in these academic communities, I aim to broaden my perspective and deepen my understanding. I am particularly looking forward to the opportunity to connect and exchange ideas with researchers from diverse fields.
MH: How do you spend your spare time?
HK: In my spare time, I enjoy traveling with my wife and exploring local cuisine at our destinations. When we’re not traveling, we like watching K-dramas together or taking walks around the neighborhood. I also listen to K-pop while driving to refresh my mind. Additionally, I make a conscious effort to maintain a clear balance between work and personal life.
MH: Can you share one piece of career-related advice or wisdom with other early career scientists?
HK: I’m not in a position to give career advice for early-career scientists, but I can share my own experience. I believe the path of a researcher is never-ending. Each choice along the way can be challenging and sometimes agonizing, yet every experience contributes meaningfully to the future. For example, after completing my master's degree, I gained industry experience at Samsung Research Institute, which gave me a practical perspective on future research. This experience inspired me to pursue a PhD, after which I worked in the industry of semiconductor equipment to apply my research more concretely. Now, I’m back in academia, conducting various research projects.
I like to think of this journey as assembling a puzzle. In the beginning, the picture is vague, but as the pieces gradually fall into place, the path becomes clearer, and new opportunities emerge. Even pieces that seem unrelated at first may eventually connect, forming a larger, coherent picture. From this perspective, I would encourage new researchers to maintain hope and resilience in the face of uncertainty, trusting that persistence will ultimately reveal their path.
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