Symmetric transport in sub-5-nm monolayer Sn2S2-based homogeneous CMOS devices

Abstract

Based on ab initio quantum-transport simulations, we investigate the performance of sub-5-nm monolayer Sn₂S₂ double-gated metal-oxide semiconductor field-effect transistors (MOSFETs). The results reveal that both n- and p-type devices meet the high-performance and low-power requirements of ITRS-2028 even down to L_g = 2 nm. Remarkably, the p-type transistors achieve ultrahigh on-state currents of 1674 and 1785 µA µm⁻¹ at L_g = 2 and 3 nm, respectively, which exceed their n-type counterparts at the same gate lengths, demonstrating superior hole-transport capability. The devices also exhibit excellent switching speed and energy efficiency. Compared with representative 2D channel materials, Sn₂S₂ occupies a highly favorable power delay product (PDP)-effective delay time (τ) regime and shows pronounced n/p symmetry, with the ratios of key performance metrics, i.e., subthreshold swing (SS), on-state current, total gate capacitance (C_t), τ and PDP, between n- and p-type devices remaining within the range of [0.5, 1.5] for L_g = 2–5 nm. These results establish monolayer Sn₂S₂ as an outstanding channel material for homogeneous, low-power, and high-speed 2D CMOS technologies at the sub-5-nm node, offering strong potential for next-generation integrated circuits.