Contact resistance decrease of amorphous In-Ga-Zn-O thin film transistors by interposed atomic-layer-deposited amorphous Zn-Sn-O interlayer †

Abstract

In this study, thin-film transistors were fabricated to examine the effects of interposing a 2-nm-thick amorphous ZnSnO (a-ZTO) interlayer (IL) with two distinct Sn concentrations of 42 at% and 54 at% between the amorphous InGaZnO channel and the source/drain electrodes on the contact resistance (R_C). Adopting a-ZTO ILs significantly decreased the width-normalized R_C from 2.48 Ω•cm to 0.74 Ω•cm. A greater decrease in R_C was observed for the a-ZTO IL with Sn 54 at% compared to that with Sn 42 at%, attributed to the increased electron affinity at higher Sn concentrations, which induced a lower Schottky barrier height. The 2-nm-thick a-ZTO IL enhanced carrier injection by increasing the tunneling probability, further supported by device simulations that identify the current path within the active layer. Under optimal device conditions, mobility degradation was effectively mitigated as the channel length (L) decreased from 50 μm to 2 μm, resulting in a decrease from 21.3% to 5.3%. Technology computer-aided design simulations with L from 2 μm to 0.0625 μm revealed that the insertion of an IL effectively suppressed scaling-induced mobility degradation, even in the submicron regime.