High performance, electroforming-free, thin film memristors using ionic Na0.5Bi0.5TiO3

Interfacial resistive switching and composition-tunable RLRS are realized in ionically conducting Na0.5Bi0.5TiO3 thin films, allowing optimised ON/OFF ratio (>104) to be achieved with low growth temperature (600 °C) and low thickness (<20 nm).


Introduction
Resistive switching (RS) based resistive random access memory (RRAM) devices (or memristors) are promising candidates for nextgeneration non-volatile memory and neuromorphic computing application due to their simplicity, high performance and compatibility with conventional semiconductor processes. [1][2][3] Achieving high uniformity, stability, and large ON/OFF ratios are important goals and are being actively studied. 4,5 Filamentary-type RS devices based on high-k insulating binary oxides (such as HfO x , TiO 2 , TaO x and NiO) can exhibit high ON/OFF ratios and other advantages. [6][7][8][9][10][11] However, an initial high-voltage electroforming process is needed to enable stable resistive switching operations in many insulating-oxide-materials-based memristors. It is noted that the electroforming process can vary from device to device and/or cell to cell, which limits device scaling and can lead to device failure. 12 Even in materials systems without the requirement of high forming voltages, local filament formation is often needed, leading to non-uniformity due to their stochastic nature. 13 Compared to RS which relies on filamentary processes, tuning the interfacial Schottky barrier height to control the switching usually excels in [13][14][15][16] better uniformity, endurance and scaling. However, they are not without problems. For instance, in the well-studied TiO 2 system, interfacial-type switching using TiO 2 /TiO 2-x bilayer structures grown by atomic layer deposition 17 gives reasonable ON/OFF ratios of 10 3 , but has poor data retention. An amorphous TiO 2 layer between the top and bottom metal electrodes has been shown to improve the interface to improve the retention, but the ON/OFF ratio is sacrificed a lot. 18,19 Indeed, low ON/OFF ratios are often observed in amorphous thin films of many binary oxides. 20,21 While a low (≤ 10 2 ) ON/OFF ratio is less problematic for neuromorphic computing applications, much higher ratios (≥10 4 ) are required for digital RRAM. To achieve both uniform RS and high ON/OFF ratio, many methods have been tried such as surface modification, 22 insertion of oxygen reservoirs, 23 and complex layout design such as multilayer/heterostructures 24,25 or There are some systems which exhibit RS resulting from nonelectrochemical mechanisms of the memristors. Many of these systems use ABO 3 perovskites or binary oxides owing to their wide range of functional effects which are voltage-tunable (e.g. ferroic ordering, anion migration, cation valence change and electron correlation effects). 13 While they can show intrinsically high ON/OFF ratio (≥10 4 ), and stable endurance or retention without degradation, a range of challenges still remain for these systems, e.g. the need for relatively large (50 nm and above) thickness of films, 29,30 high growth temperatures (700°C and above 31,32 ), and often poor uniformity owing to uncontrolled defects. 13,33,34 In this report, we demonstrate the key materials parameters necessary to achieve high performance memristors. We use Na 0.5 Bi 0.5 TiO 3 (NBT) as a model system to determine the optimum parameters because it is an ionic conductor with a controllable and tunable concentration of oxygen vacancies (V o ), arising from the charge compensation due to Bi loss. 35 The controllable V o is important for controlling the interfacial barrier height in the switching process. 32 Also, NBT can be grown with good crystallinity at relatively low temperatures compared with other perovskites. 36 While the RS properties of ionic conductors have been studied before, the performance has not been optimum, i.e. they require highvoltage electroforming (>10 V), filaments or high SET voltages (>5 V). [37][38][39][40] Here, we show new understandings about the critical factors for optimising performance, namely control of both oxygen vacancies and electronic conduction in the interfacial switching process. NBT has an low intrinsic electronic conductivity (resulting from the defectinduced charge compensation) on the basis of predominant ionic conductivity. 35,[41][42][43] A low level of electronic conduction is highly beneficial for the resistive switching device operation (by giving a moderate initial resistance or R HRS of several MΩ 44 ), since highly insulating materials in general require filament formation to form a low resistance state, while highly conductive materials cannot achieve sufficiently high resistance values for a high resistance state and also suffer from Joule heating. Furthermore, NBT has potential industrial interest as it can be sputtered at relatively low temperatures. 36 However, while a report in NBT has shown ferroelectric-polarizationcontrolled RS with 10 3 ON/OFF ratio, 45 V o controlled RS has not been demonstrated.
Here, we grow thin (~ 20 nm) NBT films by pulsed laser deposition (PLD) in the temperature range of 600-670 °C. PLD is used due to the better ability to study the structural and compositional parameters of materials. We show that the lowest growth temperature studied, 600 °C, gives the most stoichiometric material, indicative of a high concentration of V o . We obtain RS at room temperature with ON/OFF ratios of >10 4 at low switching voltages (<1.2 V), with long endurance (>10 3 cycles, the longest time tested) and excellent memory cell uniformity (low deviation in triggered resistance states). Overall, the factors for achieving high performance memristive behaviour are demonstrated, namely use of an ionic conductor with high concentration of V o , which also has a low level of electronic conductivity. Fig. 1 shows the influence of the film growth temperature (600 °C, 630 °C and 670 °C) on the RS performance for three Na 0.5 Bi 0.5 TiO 3 RS devices made from ~20 nm films. The measurement configuration, as shown in Fig. 1a, is a standard two-terminal layout with Pt electrodes and a Nb-doped SrTiO 3 (Nb:STO) substrate as the top and bottom contacts, respectively. The Nb:STO substrate is connected to the measurement setup using conductive Ag paint and is grounded. Fig. 1b shows the typical I-V characteristics of samples prepared at different processing temperatures and Fig. S1 (ESI †) also shows the I-V curves under five consecutive cycles for the sample grown at 630 °C: all Pt/NBT/Nb:STO/Ag devices tested under a DC sweeping cycle (from -8 V to +8 V) exhibit hysteretic I-V curves without the need of a high-voltage electroforming process. The devices are SET to the low resistance state (LRS) at a positive voltage of less than 1.2 V, and then RESET back to the high resistance state (HRS) when the voltage is swept to negative values. The SET voltage is defined at the voltage where the largest current jump occurs. The inset of Fig. 1b shows endurance tests on the same memory cell of each sample for over 1000 cycles. The cell was 'written' to LRS and HRS at -8 V, and a 'read' voltage of -0.5 V was used. The sample grown at 600 ℃ not only shows a large ON/OFF ratio (up to 10 4 ) but also exhibits uniform ON and OFF states without degradation in >10 3 cycles in the measurement range. The sample grown at 630 ℃ (second graph of Fig. 1b plus inset) shows an ON/OFF ratio of ~10 2 -10 3 and the distribution of resistance states is less uniform. The sample grown at 670 ℃ (third graph of Fig. 1b plus inset) shows an ON/OFF ratio < 10 2 and the endurance cannot be well maintained over ~200 cycles.

Results and discussion
The endurance on the same samples were measured (for 200 cycles) over many different cells (>10) using the same voltage as in Fig. 1b. The results are shown in Fig. 1c. First, we notice that the number of memory cells where uniform readout resistance states are observed without any failure, decreases from 9 to 7 to 3 with increasing growth temperature from 600 to 670 ℃. We observe that the absolute resistance values are spaced much more tightly for each memory cell for the lower growth temperatures. Furthermore, they show less variation between different cells. Hence, the films grown at lower temperatures show much more uniform resistive switching. This is confirmed by Fig. S2 (ESI †), which shows the increased standard deviation in the statistical average of the HRS and LRS values with increasing growth temperature. Also, the average ON/OFF ratio decreases from 5000 to 3000 and then to 20 (the largest ON/OFF ratio decreases from 11000 to 6000 and then to 100) in these three samples with the increase of the growth temperature.
The retention properties of the films grown at 600 and 630 ℃ are shown in Fig. S3A and S3B (ESI †). An ON/OFF ratio of >10 3 is maintained even after 2000 s (20000 read cycles), despite a slight degradation of the triggered HRS and LRS. Fig. S4 (ESI †) shows the current response of the NBT sample grown at 630 ℃ to voltage pulses, where the instantaneous current responds fast to the applied voltage pulse and a fast switching speed is exhibited (butterfly I-V curve still appears for pulse width down to 20 ns and rise time down to 200 ns).
R HRS changes little with deposition temperature of the resistive NBT layer (Fig. 1c) with values of around 10 8 -10 9 Ω. However, R LRS changes drastically with deposition temperature (from 10 4 to 10 7 Ω when the growth temperature increases from 600 to 670 ℃) which therefore controls the magnitude of the ON/OFF ratio. The reason for this strong influence of the deposition temperature on R LRS is explored more later.  Fig. 1e. The average R HRS and R LRS values of the 300 μm electrodes are around nine times as high as those of the 100 μm electrodes, which is consistent with the area ratio of the two electrodes. These observations all suggest that the current conduction of the Pt/NBT/Nb:STO/Ag device does not rely on the formation of local conduction filaments but instead on an interfacial effect or a uniform bulk effect. The electrode area dependence of the HRS indicates also that there is a homogeneous electronic conduction background inside the NBT for the HRS or pristine state. The room temperature resistivity of the NBT film measured using a standard inline four-probe configuration is ≥10 6 Ω.cm, which is at the boundary between semiconductor and insulator behaviour. As discussed above, this low but non-zero level of electronic conduction is important for bringing the pristine resistance of the NBT-based RS device to a suitable range (~MΩ) 53 and to prevent the need of a high-voltage forming process of very high resistance films, while also preventing current losses of low resistance films. As extrapolated from the lowvoltage I-V curves in Fig. S5 (ESI †), we have a device resistance ≈10 6 Ω (film+contact) in the initial state, which is within the suitable resistance range mentioned above. This value eliminates the need to apply a large voltage to 'electroform' conducting filaments. Details of the conduction mechanism will be discussed later when we show fitting of the I-V curves with typical conduction mechanisms.  shows the results for one treated at 630 °C as an example. We also measured energy-dispersive X-ray (EDX) spectra for Ag in multiple areas on the samples (including substrates) that had undergone electrical measurements and found no evidence of Ag diffusion into the films or the substrates (Fig. S7 (ESI †)). Therefore, although it has been reported that Ag could diffuse into Nb:STO 46 or that Ag/Nb:STO could show RS effects under certain circumstances, 47 none of them occur or are relevant to the results observed here and hence the Ag/Nb:STO interface itself has a negligible contribution to the results of Fig. 1 for our growth and measurement conditions. Also, it is noted that our previous work showed an Ohmic contact nature between the Pt and the NBT interface. 48 Hence, the contribution from the Pt/NBT top interface to the RS properties of the device can also be excluded and we can conclude that the NBT/Nb:STO interface controls the overall device performance (we review this in more detail later). Since the Nb:STO substrate has a stable structure and composition, it is the variation of the composition and structure of NBT with growth temperature that most likely influence the performance of NBT/Nb:STO junction and therefore dominates the RS behaviour.
As the NBT composition is quite sensitive to the growth temperature (because of the relatively volatile elements Na and Bi 49-51 ), we therefore next study the compositional change of the NBT films with growth temperature. We used X-ray Photoelectron Spectroscopy (XPS) to assess the stoichiometry change of the NBT films as a function of the growth temperature. The ratio of the XPS spectra area between respective elements can qualitatively reflect the relative elemental ratio between different samples. [52][53][54] The detailed plots and fitting of the Na, Bi, Ti and O XPS spectra are shown in Fig. S8 (ESI †). Fig. 2a,b show the Ti 2p 3/2 vs. Bi 4f 7/2 and Na 1s vs. Bi 4f 7/2 spectra with normalizing the Ti 2p 3/2 and Na 1s spectra intensity to be the same value, respectively. The relative Bi/Ti and Bi/Na ratios show similar decreasing trends with an increase in growth temperature, as plotted in Fig. 2c. This is understandable by considering that Bi is more volatile than Na and Ti. For instance, the volatilization temperature of Na 2 O is 1132 ℃ whereas 825 ℃ for Bi 2 O 3. 55 The volatilization of Bi is well known in the growth of films containing Bi, and for BiFeO 3 it has been reported that lower growth temperatures (≤700 ℃) are important for optimising the Bi stoichiometry. 56 As shown in Fig. 2d, the relative spectra area of the Bi 4f 7/2 vs. Ti 2p 3/2 (which qualitatively indicates the relative Bi content, assuming negligible Ti loss with increasing growth temperature) shows an inverse relationship with the R LRS and a direct correlation with the ON/OFF ratio. This indicates that the lower the Bi content (i.e. the more loss of Bi) in the film, the worse is the RS performance. The question is how and why the RS performance is related to the Bi content. In fact, it has been reported that slightly Bi-deficient (with x≤0.01 in Na 0.5 Bi 0.5-x TiO 3 ) NBT leads to a fast migration of V o 35,43 whereas more Bi-deficient films result in defect association of Bi vacancies, V Bi and V o , which reduces the concentration of mobile V o . 57, 58 We will return to this point later.
Structural analysis was conducted to find out if there is any drastic structural change with varying growth temperature. Fig. 3a shows the XRD 2θ-ω diffraction patterns. All films show clear NBT (00l) peaks with no noticeable peak shift, indicating no obvious structural change with change in growth temperature. Laue fringes are also observed in the film grown at 600 ℃, indicating good crystal quality and smooth Please do not adjust margins Please do not adjust margins surfaces. It is also noted that the Laue fringes of Fig. 3a become less clear with an increase of the growth temperature. This indicates that the NBT film is more homogeneous and uniform when the growth temperature is lower. This is very important for potential applications, where the use of low growth temperatures is necessary. Furthermore, the reciprocal space maps (RSMs) of Fig. 3b clearly indicate that the NBT film is fully strained to the STO substrate. The out-of-plane lattice constant is determined to be c NBT = 3.883±0.003 to 3.889±0.003 Å from 2θ-ω scans when the growth temperature increases from 600 to 670 ℃, corresponding to 0.56% to 0.41% out-of-plane compressive strain. The slight increase in the lattice constants is consistent with the increase in the off-stoichiometry in perovskite films. 59 The out-ofplane compressive strain is consistent with the fact that the bulk lattice constant of NBT (a NBT =3.886 Å) is smaller than that of STO (a STO =3.905 Å), hence the NBT is tensed in-plane by the STO, leading to the out-of-plane compression to conserve the unit-cell volume.
Atomic Force Microscopy (AFM) images shown in Fig. 3c indicate that the surface feature sizes (as measured by the distance between the surface indentations where more than 2 grains meet at a junction) increase rapidly when the growth temperature increases from 600°C to 630°C to 670°C (from ~100 nm to 200 nm to 500 nm). The increasing grain size is likely related not only to growth temperature, 60 but also to the changing film stoichiometry. Indeed, a previous report showed that the grain size in NBT increases with increasing Na/Bi ratio 53 . This is consistent with the XPS results (Fig. 2b) showing the increase of Na/Bi ratio with increasing growth temperature. Fig. 3e shows a high-resolution cross-sectional transmission electron microscopy (TEM) image of the NBT film grown at 630 ℃, confirming a high-quality epitaxial NBT film on the Nb:STO substrate with a very smooth surface, uniform structure and atomically sharp interface between the film and the substrate. The Fast Fourier Transform (FFT) diffraction patterns shown in Fig. 3d confirm the high-quality epitaxial nature of the film. The STEM image in Fig. 3f further illustrates the overall high film quality.
The above results clearly indicate that the growth temperature in our investigated region strongly influences the stoichiometry of the NBT films without any obvious structural change, except for improved film perfection and homogeneity for the growth at a lower temperature. This is opposite to most perovskite metal oxides which have improved film perfection with an increased growth temperature. The better film perfection at low growth temperatures is linked to the high volatilisation of Na and Bi at high temperatures. With increased growth temperature, on the other hand, the volatility of these elements will lead to cation non-stoichiometry. The 600 ℃ (the lowest growth temperature in this work) films show the highest ON/OFF ratio with the best device uniformity. The minimum growth temperature of 600°C that we tried in our work is within the optimum growth temperature (600-650 ℃) reported in many works for PLD growth of NBT films 48,61,62 (although one study reported a substrate temperature of 550 ℃, where they used a lower oxygen pressure during deposition 36 ).
To gain a fundamental understanding of the optimisation of these two properties (ON/OFF ratio and uniformity), it is crucial to first understand the conduction mechanism and then its influence on the RS. Pt is a metal with a high work function (≥5.3 eV 63-65 ). NBT (with Bi loss) has been reported to be a partly compensated p-type semiconductor, 42,48,66,67 while Nb:STO is a degenerately doped, highly conductive n-type semiconductor oxide due to its high carrier concentration of 10 21 cm -3 . [68][69][70] Considering the degenerate semiconductor Nb:STO to be a metal, 69,70 the Pt/NBT/Nb:STO sandwich structure consists of two Schottky diodes connected to each other with two Schottky barriers. In the low-bias regime (-1 V to 1 V), the devices show forward rectification (Fig. S6 (ESI †)), which indicates that the bottom p-type NBT/metal Nb:STO interface has a larger and hence more dominant Schottky barrier height. 29,[68][69][70][71] Therefore, the RS behavior of the device is mainly controlled by the NBT/Nb:STO interface with a simplified band diagram as illustrated in Fig. 4. The depletion layer will be located mainly inside the NBT due to the very high carrier concentration of Nb:STO. 72 Considering that the work function of Bi-or Ti-perovskite oxides are usually ≤4.7 eV 63,64 while the work function of Nb: STO is around 4.2 eV, 73 here the Schottky barrier height should be less than 0.5 eV.
Current conduction mechanisms in a metal/semiconductor Schottky contact include emission, tunneling, and/or space charge limited conduction, each with a specified relationship between current density and voltage (electric field). 74 We divide the obtained I-V curves into four segments -1. HRS+: from 0 to +8 V; 2. LRS+: from +8 to 0 V; 3. LRS-: from 0 to -8 V and 4. HRS-: from -8 to 0 V -and fit into different conduction models.
For memristor devices, we are most concerned with low bias regimes. We therefore consider sweeping up from 0 to 0.5 V in segment 1, sweeping down from 1 to 0 V in segment 2, and then sweeping up from 0 to -1 V in segment 3 (in Fig. S9a (ESI †)). A linear fit of log(I)~V 1/2 is obtained indicating that interface-limited Schottky emission controls the current conduction in the pristine state. Hence, the intrinsic conduction mechanism is controlled by injection of thermally activated carriers from the electrodes into the conduction band of NBT after overcoming the Schottky barrier by the applied electric field. This is shown in Fig. 4 and discussed below.
Having obtained information about the intrinsic conduction mechanism, we now aim to achieve a clearer picture of the RS process and by doing so, reveal the origin of the switching process and high ON/OFF ratios shown in Fig. 1. As already mentioned, Bi vacancies in the NBT film will give rise to V o , which is for reasons of charge compensation. 35,43,75 The existence of mobile V o enables the high ionic conductivity in NBT. Fig. S10 (ESI †) shows the normalized ionic conductivity as a function of temperature for the NBT film grown at 600 ℃, where a typical Arrhenius-type behaviour is exhibited, indicating that the conductivity of the film is thermally activated with an activation energy E a = 0.51 eV, consistent with the E a of optimised ionic conductivity in NBT. 35 In the band diagram in Fig. 4a in the non-bias state, for the NBT-Nb:STO junction there is a potential barrier for the majority carriers in NBT (holes) right at the interface between the semiconductor film (NBT) and the metallic substrate (Nb:STO). The barrier height 32 can be reduced/increased by an external applied bias, resulting in high/low conduction current. V o s accumulate and/or are depleted near the NBT/Nb:STO interface under an external field. To explain the RS mechanism and the influence of the growth temperature, we consider the migration of mobile V o near and away from the NBT/Nb:STO interface for controlling the Schottky barrier height and hence the overall R LRS . 32 With a positive bias applied to the Pt top electrode (and the Nb:STO is grounded), positively charged V o in the NBT drift to and accumulate near the NBT/Nb:STO interface, forming a highly positive charge region (Fig. 4b). A negatively charged region is also formed on the Nb:STO side at the same time due to the accumulation of O 2ions. 76,77  The increase in V o concentration near the interface under positive bias, which results in a modified band structure, 71 can further reduce the Schottky barrier height/width. This will thus result in a high electronic conduction current and a low R LRS . 32 Here, R LRS is highly dependent on the film growth temperature since the concentration of mobile V o will change with the film composition. A small amount of Bi deficiency (x≈-0.01) gives a high V o concentration (consistent with the NBT film grown at 600 °C). 35 As already mentioned, as the growth temperature increases, the Bi vacancy (V Bi ) concentration increases (Fig. 2). At the same time, the amount of V o -V Bi defect association will increase leading to a reduction in mobile V o . 57,58 This means there will be less migration of V o to and away from the electrodes, and thus a less effective lowering of the barrier height/width. This then explains why R LRS increases as the film growth temperature increases, and consequently, the ON/OFF ratio decreases.
When the positive SET bias is switched off, the LRS is maintained (Fig. 1b), indicating that the V o concentration near the interface remains high. When a negative bias is applied, the V o concentration near the interface is reduced. This V o depletion near the NBT/Nb:STO interface causes an increase in the Schottky barrier height/width, which leads to a much lower conduction current under negative bias, driving the memory cell to the HRS (Fig. 4c).
As shown in Fig. 4b, R LRS is lower for the 600 °C sample, where the V o concentration at the interface is higher than for the 670 °C sample (ii), while R HRS is almost the same for the NBT films grown at different temperatures (Fig. 4c) because under negative bias, the V o are fully depleted from the interface (regardless of the initial V o concentration, i.e., high for the 600 °C sample (i) and low for the 670°C sample (ii). Hence, the ON/OFF ratio will be controlled only by the R LRS in our system, which depends highly on the mobile V o concentration.
The larger hysteresis of the I-V curves of Fig. 1b under negative bias compared to positive bias can be explained by the different influences of the SET and RESET processes on V o concentration: Under a positive bias, V o contributes to the shrinkage of the depletion layer width which dominates the current conduction. After the SET process, the current drop generates a small hysteresis due to the remaining accumulation of the V o near the NBT/Nb:STO interface. On the other hand, under negative bias after the RESET process, the V o are fully depleted and hence the V o cannot modulate the depletion layer width and so the change in the Schottky barrier height takes over to dominate the current conduction. Hence, the resistive behavior will be quite different compared to the positive bias region. Also, the whole system should now become quite insulating due to the depletion of V o which is reflected by the self-compliance or deep RESET of the current 78 (with nearly negative differential current dI/dV on negative side of Fig. 1b at 600℃). Thus, the current will drop dramatically when the negative bias is decreasing, generating a larger hysteresis.
To prove the role of Schottky barrier height on the RS behaviour, from Fig. S10 (ESI †) and with relevant parameters listed in Table S1, we study the zero-bias barrier heights at different resistance states. The zero-bias Schottky barrier height in the initial state or HRS (eφ B0H ) has almost the same value regardless of growth temperature of the film, while the non-bias Schottky barrier height in the LRS (eφ B0L ) decreases with decreasing growth temperature and is closely linked with the R LRS . These results are consistent with the R HRS (V o depleted state near the NBT/Nb:STO interface) being high and almost constant with growth temperature and R LRS (V o accumulated after the SET process) decreasing with decreasing growth temperature when a higher concentration of mobile V o accumulates near the NBT/Nb:STO interface at positive bias, causing a lower Schottky barrier height.

Conclusions
Single-phase epitaxial ionic Na 0.5 Bi 0.5 TiO 3 (NBT) films grown under different conditions were used to demonstrate that high V o concentration and a low-level electronic conduction are critical features for forming-free memristors with a high ON/OFF ratio, stable switching, and good endurance/retention via interfacial Schottky barrier-controlled switching. This material system is unique among perovskites in that low growth temperatures can be used to grow very thin films with high homogeneity, high uniformity and low leakage. This is very different to other widely studied perovskites for memristors. Since NBT can be grown by a variety of physical vapour deposition processes at relatively low temperatures, this makes it a promising, industry-relevant material system for memristors and neuromorphic computing applications.

Experimental Section
Sample preparation: Na 0.5 Bi 0.5 TiO 3 films were grown on single crystalline 0.5 % wt Nb-doped SrTiO 3 (001) substrates using pulsed laser deposition (PLD). The composite PLD target was prepared using a conventional solid-state sintering: stoichiometric and high-purity Na 2 CO 3 (99.99%), Bi 2 O 3 (99.99%, 10% excess), TiO 2 (99.99%) powders were mixed, ground, and then being sintered at 850 ℃ for 2 h, then re-ground again and pelletized, followed by additional sintering at 1100 ℃ for 3 h. During PLD, the oxygen partial pressure was maintained at 0.3 mbar and the growth temperature was varied from 600 to 670 ℃. The substrate temperature was measured using an infrared pyrometer. A KrF excimer laser with a 248 nm wavelength was used. The repetition rate and laser fluency were 1 Hz and 1.5 J/cm 2 , respectively.
Sample Characterization: The phase and crystallinity of the films were characterized with a Panalytical Empyrean high-resolution Xray diffraction (XRD) system using Cu-Kα radiation (λ=1.5405 Å). Cross-sectional images of the film were obtained by high-resolution transmission electron microscopy (HRTEM) FEI TALOS F200X at 200 kV equipped with ultrahigh-resolution high angle annular dark field detectors and Super-X TM electron-dispersive X-ray spectroscopy. Both cross-sectional TEM and scanning TEM (STEM) were undertaken. The samples for the TEM analyses were obtained through mechanical grinding, dimpling, and a final ion milling step. For characterization of the electrical properties, platinum electrodes were deposited by DC sputtering or e-beam evaporation. We measured the resistances using a Signatone two-probe station with a Tungsten tip (25 μm) and a Keithley 2400 source-meter. To measure ionic transport characteristics, we used an HP 4294A Precision Impedance Analyser. For all measurements, Nb-doped STO substrates were grounded and the voltage was applied to the Pt electrodes. X-ray photoelectron spectroscopy (XPS) was used to study the valence band of the films by a monochromatic Al K α1 X-ray source (hν= 1486.6 eV) using a SPECS PHOIBOS 150 electron energy analyzer with a total energy resolution of 500 meV. The Fermi level of the films was calibrated by a polycrystalline Au foil.