Manipulating resistive states in oxide based resistive memories through defective layers design

In this work, multilevel switching was achieved by a strategically designed alternative multi-layer structure with pure and Mn-doped SnO2. In this multilayer structure, by utilizing the pure SnO2 layer as an ionic defect diffusion barrier, the migration of ionic defects from the doped layers can be controlled and the intermediate resistance states were stabilized. The multilevel devices exhibit superior performances with a high ON/OFF ratio, low operation voltage and excellent retention. Such an alternative multi-layer structure could be a potential strategy for achieving high-density memories.


Introduction
Recently, resistive random access memories (RRAM) have attracted great interest for potential applications in highdensity memories and biological synapses, etc. 1-3 RRAMs have distinct advantages over conventional Si based non-volatile memories such as faster response rates, lower power consumption, smaller cell size, mechanical exibility, transparency, and printablility. [4][5][6][7] For RRAMs, the gure of merit includes a high ON/OFF ratio, [8][9][10] high-density storage [11][12][13] and long retention time. They are mainly determined by defect migration behaviours driven by applied electrical eld, which is associated with the type and concentration of defects. 9,14 The high storage density can be achieved either by reducing cell size or increasing storage level. However, the scaling down technology of single cell has approaching their scaling limits. 15 Thus, multilevel resistance storage is considered as an important method in developing high-density memories by manipulating ionic defects, and can improve information storage density without decreasing memory cell size.
To date, the multilevel resistance states have been achieved by manipulating the applied voltage, such as pulse sequences. [16][17][18][19] More oen, these techniques are too complex or require sophisticated instrumentations that hinder their practical applications. On the other hand, engineering the device structures is another alternative approach to manipulate ionic defects and their kinetics in oxide based lms. 20 However, to explore engineered design memories for achieving multi-level resistance states in metal oxides is still in its infancy. Controlling the cationic or anionic defects distribution can regulate the ON/OFF ratio and multilevel resistive switching.
In this work, we strategically engineer alternative layered structures to manipulate the defect migration, thus enhancing the ON/OFF ratio and achieving multilevel resistance states. The alternative layer structure has been built by the pristine and doped metal oxides. In the structure, the pristine layer which has less defects acts as diffusion barriers to control the ionic migration in the doped layer. The abundant nature of SnO 2 makes this material to be a good representative of wide bandgap metal oxides for the applications of transparent devices, including RRAMs. 21,22 The nature defects in SnO 2 is known as oxygen vacancies, 22,23 which claims as the main factor that contributing the switching behaviour in SnO 2 . However, due to the limited concentration of oxygen defects, a further improvement in ON/OFF ratio of SnO 2 is always desired. 24 According to our calculations, 25 Mn interstitials (Mn int ) with Mn substitutions (Mn sub ) is a favourable cation defect in Mn-doped SnO 2 . Its concentration strongly affects mobility in SnO 2 . Thus, in this work, pure and Mn-doped SnO 2 were utilized as ionic migration barriers and ionic defect providers, respectively.

Experimental
The pure and Mn-doped SnO 2 nanocrystals were synthesized through hydrothermal methods and details of synthesis process can be found in our previous report. 25 The metal oxide thin lm were coated on the silicon substrates by drop coating technique and subsequently dried with ultraviolet irradiation for 4 hours prior to another layer coating as shown in Fig. 1. To fabricate memory cells, gold is used as bottom and top electrodes and deposited by sputtering method.
with SnO 2 (JCPDS #41-1445) without any peaks of the secondary phase. It implies the doped Mn ion is incorporated well in the Sn lattice site, which agrees well with the reported results. 26 In the inset of Fig. 2(a), the slight shi in the (110) peak was because of the internal stresses due to the Mn-doping. According to the HRTEM insets in Fig. 2(b) and (c), aer Mndoped, the lattice of SnO 2 decreased from 3.38Å to 3.35Å, which agrees with the peak shi in XRD. Interestingly, compared to pure SnO 2 in Fig. 2(b), the Mn-doped SnO 2 nanoparticles in Fig. 2(c) are better self-assembled, which is ideal for thin lm deposition. 27 Resistive switching in single layer thin lms Resistive switching characteristics of the as-fabricated devices composed of single layered metal oxide were studied rst through the current-voltage (I-V) tests with DC voltage sweeping mode. There are three single layer thin lm devices being tested here, which are devices composed of pure SnO 2 (pure-layer), Mn-doped SnO 2 (1-layer) and the mixture of the pure and Mn-doped SnO 2 one (mix-layer). During the tests, the bias voltages were applied to the top electrode while keeping the bottom electrode grounded as shown in Fig. 1.
The I-V curves of pure-layer is provided in Fig. 3(a). Purelayer has been switched to ON state. In the testing cycle, the cell was switched from low resistance state (LRS) to high resistance state (HRS) at 4.4 V and then switched back to ON state at a reverse polarity of À2.3 V. It has been reported that oxygen vacancies are the intrinsic defects in SnO 2 nanocrystals. 22,23 This resistance switching behaviour could be attributed to the migration of oxygen vacancies within two electrodes in the presence of electric potential. 28 However, it is hard to distinguish between two states (HRS/LRS ¼ 3.8) during IV curves.
To compare the IV characteristics of Mn-doped SnO 2 , a device was fabricated with single Mn-doped layer (1-layer) by keeping all other parameters as same. The current-voltage characteristics of the 1-layer device expressed superior resistive switching characteristics over pure layer device as shown in Fig. 3(b). The separation between both resistance states was quite high (HRS/LRS ¼ 243.4) than that of pure-layer. Moreover, the device switches itself to LRS at 1.9 V and then RESET back to HRS at À4.0 V. For 1-layer device, an additional intermediate state was also detected between the ON and OFF states as in Fig. 3(b).
The switching mechanism of the as-fabricated 1-layer device was illustrated in Fig. 3(d). As reported, Mn interstitials with Mn substitutions pair are the most favourite point defects in Mndoped SnO 2 , and 6.25% Mn-doping concentration is enough to forming Mn int . 25 Thus, Mn int should be the main factor contributing the switching behaviour. Initially, the defects -Mn int were distributed in the lm, and the device is in the HRS state. When a voltage applied to the top electrode, the positive charged Mn int generally migrated towards the cathode electrodes, leaving the original interstitial sites as negative charged traps, forming the lament-like conductive paths and switched the thin lm to ON state. While the negative voltage is applied, the Mn int ions were pushed back to the surrounding traps, rupturing the migration path ways, which switched the lm to OFF state. The intermediate states are associated with lags in formation and blockage process of the Mn int laments between being switched ON or OFF. The Mn int migration driven by the applied electric eld forms laments to conduct the charge throughout the lm. Due to the low Mn int concentration, the energy barrier for the cation migration is relatively high, thus introducing the intermediate states between ON and OFF states. To further investigate the retention property of this intermediate state, data retention test was conducted, and surprisingly, the intermediate state failed to retain its state for longer time, and within 100 seconds, it merged with the more stable LRS as shown in Fig. S-1. † The unstable intermediate states indicate  that the device can be switched between ON or OFF within relatively small voltages, therefore, the energy barrier of resistive switching is insufficient to maintain an intermediate state.
To increase the ionic migration barriers, pure SnO 2 was introduced as a diffusion barrier to control the ionic migration.
To further examine the role of defects and doped layer, another sample was made, in which pure and Mn doped SnO 2 nanoparticles were physically mixed together to form a suspension solution. This solution was further used to fabricate a single layer device by following similar method as for previous two devices, attempting to increase the Mn int diffusion barrier by introducing pure SnO 2 nanoparticles. The I-V curves are shown in Fig. 3(c). The resistive switching performance of the mixed-layer sample did not show much improvement than both samples. A smaller ON/OFF ratio, and higher SET/RESET voltages were observed (À4.82 V and 4.83 V respectively). In addition, the intermediate states were not observed any more. This may be because by mixing the doped and pure SnO 2 nanoparticles, the defect concentration is not high enough to trigger multilevel switching, as illustrated in Fig. 3(e). Therefore, by simply mixing these two nanoparticles, the dispersion of pure SnO 2 nanoparticles cannot obstruct the defect diffusion effectively. It indicates that reducing the Mn int concentration cannot effectively control the transportation behaviour and an optimal concentration of Mn int is critical to introduce the intermediate states.

Resistive switching in multi-layer thin lms
Since the mix-layer device can hardly form an effective Mn int diffusion barrier as shown in Fig. 2(c), multi-layer structures by having layer by layer design of pure SnO 2 and Mn-doped SnO 2 layers were fabricated. For convenience, samples are named as 2-layer, 3-layer and 4-layer, respectively. To add articial Mn int traps between Mn-doped SnO 2 layer and top electrodes, a pure SnO 2 layer was coated on top of the Mn-doped SnO 2 formed 2layer device, aiming to form a defects diffusion barrier layer by employing pure SnO 2 , as inset in Fig. 4(a). As aforementioned, the unstable intermediate states in 1-layer sample were mainly introduced by the migration lags of the formation and breaking of the Mn int migration pathway in the DC sweep. Ideally, the pure SnO 2 layer may further increase the lags of forming and breaking the Mn int laments between top and bottom electrodes, as in pure SnO 2 , there are less interstitial sites for Mn int . Thus, to migrate through the pure layer, more energy is needed for Mn int . In Fig. 4(a), typical resistive switching curves are plotted, and intermediate state was observed. However, compared to the 1-layer, the intermediate is not signicantly enhanced. Thus, we assume that although the pure SnO 2 layer can obstruct Mn int migration and act as the diffusion barrier layer, the effect is limited. As illustrated in the proposed resistance switching model in Fig. 4(d), Mn int can still be driven through the pure SnO 2 layer by a relatively small operation voltage.
Interestingly, by depositing another Mn-doped SnO 2 layer on 2-layer thin lm, the 3-layer sample demonstrates much better performance, which shows very large ON/OFF ratio ($10 3 ), small SET/RESET voltage (1.93 V and À3.42 V respectively). Meanwhile, signicant intermediate states were also observed. To better analyse the intermediate states, the I-V curves of 1layer and 3-layer structure were replotted in log-log scale as compared in Fig. S-2. † Both I-V curves have linear relationship in the low voltage range. The slopes of linear curves were calculated and found close to 1 (marked as I f V region), which represents ohmic behaviour at low voltages. At higher potentials, The IV curves were found to obey the Child's law (marked as I f V 2 region). The intermediate states are the regions marked as I f V a , known as the steep current increase region. It can be well explained by the trap-controlled space charge limited conduction (SCLC). 15 For the 3-layer device, signicantly high intermediate states were found as compared to the 1-layer as shown in Fig. S-2. † To explain such positive transition, a purposed model for the switching in 3-layer is illustrated in Fig. 4(e). In the pristine state, the Mn int defects are dispersed randomly in the bottom and top Mn-doped SnO 2 layers. When a small negative voltage is applied, the Mn int starts to migrate towards top electrodes, attempting to form laments. However, due to the diffusion barrier from pure SnO 2 in between, the Mn int from the bottom layer cannot completely break through the middle layer. In this stage, the 3-layer thin lm is not fully switched ON, thus, achieving an intermediate state. When increasing the applied voltage, Mn int from bottom layer may further diffuse to the middle layer, and nally connect with the top layer. At this stage, the 3-layer device is fully switched to ON state. Similarly, as in Fig. 4(c), when another pristine SnO 2 layer added on top of the 3-layer structure, the intermediate state was also detected. This additional layer can further increase the Mn int diffusion barrier that results in even higher SET/RESET voltages and higher ON/OFF ratio. Thus, design of alternate layered device structures can lead to superior resistive switching performance with sustainable intermediate states.

Stability of multi-layer thin lms
To further evaluate the memory performance of the 3-layer and 4-layer memories, retention tests of each state were characterized at room temperature and shown in Fig. 5. Non-destructive and stable readout of all the states appeared in both lms over 7200 seconds. The ON and intermediate states of both lms were maintained at almost same level. However, by adding another SnO 2 layer in the device (4-layer), the OFF-state resistance shied to higher values, resulting in a relative large ON/ OFF window, which is highly desirable for high performance memories. To evaluate the cycle to cycle stability, endurance tests were performed and provided in Fig. 5(c)  In addition, to understand the mechanism of resistive switching in the multi-layer structure, the cell size effect has been analyzed on the 4-layer sample with different top electrode diameters of 250 mm and 150 mm. The retention tests are provided in ESI Fig. S-3. † The resistance levels of 150 mm are only slightly higher than that of 250 mm, suggesting that the resistive switching is mainly because of local phenomenon. 29 The temperature dependence of resistance level were tested by heating up the 4-layer on a hot plate from 20 C to 100 C. Compared to the change in ON state, there is an obvious decrease in the resistance of OFF states and a slight decrease in that of intermediate states as shown in ESI Fig. S-4. † Such results agrees with previous report, which was ascribed to a typical semiconductor behavior with temperature dependence. 30

Conclusion
In conclusion, thin lms composed of repetition un-doped and doped SnO 2 layers were fabricated. Such structure demonstrated stable multiple resistance states controlled by Mn interstitials migration in the presence of applied electric eld. For this structure, the formation and elimination of the Mn int migration pathway can be manipulated by external eld to realize more stable intermediate state with over 7200 seconds retention time, low set potential ($2 V) and higher ON/OFF ratio (over 10 3 ). This approach can be potentially extended to other functional materials with cationic or anionic defects to achieve multifunctionalities.

Conflicts of interest
There are no conicts to declare.