RRAM-enabled reservoir computing: from interfacial switching dynamics to scalable and hybrid architectures

Abstract

Reservoir computing (RC) processes temporal and high-dimensional data by training only a readout layer while exploiting rich, intrinsic dynamics in a physical reservoir. Yet CMOS-only implementations can suffer from considerable area and power overhead when scaling continuous-time dynamics. Resistive random-access memory (RRAM) is a compact hardware substrate for RC because resistive switching naturally provides nonlinear state updates, short-term fading memory, and crossbar compatibility. Here, RRAM-based RC is reviewed from a device-to-system perspective. Interface-type and selector-like switching mechanisms, including rectifying and threshold-switching behaviors, are summarized with emphasis on barrier modulation (Schottky/tunneling) and trap-mediated relaxation that generate transient responses relevant to fading-memory operation, as well as rectification that mitigates sneak-path currents in crossbar reservoirs. Nonvolatile RRAM is then discussed as a readout layer, where filamentary accumulation and saturating dynamics encode slowly varying states. To achieve application performance, practical design considerations for time-scale forecasting (e.g., audio and biomedical sensor signals) and image classification are outlined, highlighting time-scale matching, encoding/pulse protocols, and benchmarking practices. Finally, wide RC and hybrid optical–RRAM architecture are introduced as scalable routes to enhanced expressivity and low-latency edge inference, and remaining challenges and reporting guidelines are proposed to accelerate reproducible memristive RC technologies.