Ultrathin sub-5 nm gate-all-around SiGe nanowire transistors with near-ideal subthreshold swing

Abstract

Conventional gate-all-around (GAA) Si nanowire field-effect transistors (NWFETs) are reaching their fundamental scaling limits as channel length reduction exacerbates short-channel effects (SCEs). In this work, the performance of sub-5 nm gate-length (L_g) GAA SiGe NWFETs is systematically investigated using first-principles quantum transport simulations, revealing superior performance over conventional Si FETs. The results reveal that at L_g = 3 and 5 nm, key performance metrics such as on-state current (I_on), subthreshold swing (SS), delay time(τ), and power dissipation (PDP) meet the International Technology Roadmap for Semiconductors (ITRS) high-performance (HP) standards. At L_g = 5 nm, the n- and p-type devices demonstrate ultra-low SS values of 63 mV dec⁻¹ and 89 mV dec⁻¹, representing 42.2% and 14.4% reductions compared to conventional Si FETs, respectively. Furthermore, applying a −1% compressive strain significantly improves the performance of FETs, increasing the I_on by 41% and reducing the subthreshold swing, delay time, and power dissipation by 10%, 39%, and 14%, respectively. These findings underscore the significant potential of SiGe GAA NWFETs for future high-performance nanoelectronics.