Field-effect transistors based on In 2 Se 3 -graphene vdW ferroelectric heterojunction for high-performance and low-power logic applications

Abstract

In recent years, two-dimensional (2D) ferroelectric materials have garnered significant attention for their applications in non-volatile memory devices due to their ferroelectricity. However, systematic research on the transport mechanisms at ferroelectric polarization modulation interfaces and their applications in logic devices remains limited. In this paper, a 2D ferroelectric heterojunction FET (FeHJ-FET) based on In 2 Se 3 /graphene (Gr) vdW ferroelectric heterojunction is proposed. We reveal the potential of α-In 2 Se 3 as a semiconductor in 5 nm 2D FETs using density-functional theory (DFT) combined with non-equilibrium Green's function (NEGF) methods. Nonvolatile modulation of the interface Schottky barrier height (SBH) by reversing the polarization direction of α-In 2 Se 3 to achieve Ohmic contact. Moreover, by introducing the underlap structure and lowering the bias voltage, the FeHJ-FET with heterojunction of polarization-down In 2 Se 3 and Gr (In 2 Se 3 ↓/Gr) can exhibit excellent on-state current, meeting the requirements of high-performance (HP) and low-power (LP) applications of International Roadmap for Devices and Systems (IRDS) 2034. Meanwhile, the In 2 Se 3 ↓/Gr FeHJ-FET with underlap length of 1.2nm (L UL = 1.2 nm) exhibits a current value of 1396.30μA/μm, an ON/OFF ratio of 10 7 , and exhibits subthreshold swing that breaks the Boltzmann limit. These results establish α-In 2 Se 3 as a viable channel material for HP/LP logic FETs within the conventional 2D semiconductor paradigm. Furthermore, they deliver a theoretical foundation for engineering vdW ferroelectric heterojunction transistors featuring electrostatically reconfigurable interfacial properties.