Comparative study on substrate quality of laser slicing and wire saw slicing for SiC wafers

Abstract

As a representative wide-bandgap semiconductor material, silicon carbide (SiC) is widely used in the fabrication of high-temperature, high-frequency, and high-power devices due to its excellent electronic properties, high thermal conductivity, and extraordinary physicochemical stability. In the manufacturing process of SiC semiconductor devices, substrate slicing serves as a critical link connecting ingots to subsequent processes. For 8-inch SiC ingots, the control difficulty of key parameters—including surface shape accuracy, surface damage, and surface roughness—significantly increases with the enlarged size during slicing. These parameters directly determine the material removal efficiency of subsequent grinding and polishing processes, the global planarization effect of chemical mechanical polishing (CMP), and may even lead to increased defects or device failure if not properly controlled. Therefore, achieving efficient and low-damage slicing of SiC substrates is of great importance. Laser slicing and wire saw slicing are the main processing methods for SiC ingot slicing currently. However, due to the fundamental difference in their processing mechanisms (non-contact vs. contact), the substrate quality resulting from these two methods exhibits significant discrepancies. In this study, 8-inch n-type 4H-SiC ingots were selected as the research object. Characterizations including atomic force microscopy (AFM), high-resolution X-ray diffraction (HR-XRD), scanning electron microscopy (SEM), and Raman spectroscopy were employed to systematically compare the surface shape parameters, crystal integrity, and surface morphology of substrates sliced by the two processes. Furthermore, the evolution law of substrate quality throughout the entire process of “slicing – rough grinding – fine grinding – mechanical polishing (MP) – CMP” was tracked. The research results demonstrate that laser slicing exhibits remarkable advantages over wire saw slicing. This study provides crucial theoretical support and process references for the development of large-scale, low-damage processing technology for third-generation semiconductor substrates.