Carrier Transport Mechanisms in Polycrystalline Semiconductors: From Grain Boundary Physics to Device Performance

Abstract

Polycrystalline semiconductors are central to modern optoelectronic and energy devices, yet their performance is governed by the chemistry and electrostatics of grain boundaries (GBs). Unlike single crystals, polycrystalline systems exhibit potential barriers, trap states, and compositional inhomogeneities that critically shape carrier mobility, lifetime, and recombination. This review unifies theoretical and experimental perspectives on major transport pathways—drift–diffusion, thermionic emission, tunneling, hopping, and conduction through threading crystallites—across representative materials including Si, CdTe, CIGS, PbSe, Sb₂Se₃, Bi₂Te₃, Mg3Sb2, and halide perovskites. Particular emphasis is placed on how nanoscale probes such as Kelvin probe and conductive AFM, cathodoluminescence, and DLTS elucidate barrier heights, trap energetics, and boundary passivation effects. Chemical and structural strategies—such as halogen or alkali-fluoride treatments, dopant redistribution, anti-barrier engineering, and twin-boundary engineering—are demonstrated to transform recombination-active interfaces into conductive channels. By correlating microscopic boundary chemistry with macroscopic transport and device metrics, this review formulates general design guidelines for programmable grain architectures. The analysis establishes grain boundaries not as fixed defects but as tunable electronic interfaces, offering a roadmap for next-generation polycrystalline semiconductors optimized for high-mobility, high-stability optoelectronic and thermoelectric applications.