Achieving wide-range steep slopes in SnS2 negative capacitance transistors through an isolated band structure and thermionic emission enhancement via Bi contacts
Abstract
Negative capacitance FETs aim for sub-60 mV dec−1 switching to curb power consumption, but often encounter instability and narrow steep-slope windows. We present a hysteresis-free NCFET that strategically utilizes a 2D SnS2 channel. The inherent isolated conduction band of SnS2, yielding a step-like density of states, is pivotal for sharp turn-on characteristics when effectively coupled with the negative capacitance effect. The SnS2 channel is integrated with an La:HfO2/HfO2 ferroelectric–dielectric gate stack and Bi contacts. This architecture shows an average subthreshold swing of 34 mV dec−1 across four current decades, maintaining sub-60 mV dec−1 operation over this wide range, and enabling sub-0.4 V operation. Bi contact is key, minimizing Fermi-level pinning at the SnS2/metal interface. This expands the thermionic emission region, allowing the negative capacitance to fully leverage the distinct properties of SnS2 for sustained wide-range steep-slope performance. This work demonstrates a novel approach to ultralow-power transistors by integrating an isolated-band semiconductor, optimized ferroelectric, and contact engineering.

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