Bioelectronic building blocks: low-voltage integrable organic thin-film transistors with a tri-layer gate dielectric design

Abstract

This study presents a novel tri-layer gate dielectric design for organic thin-film transistors, tailored for bioelectronic applications, with improved yield, uniformity, and integrability for systems. The proposed tri-layer structure consists of a buffer layer, a surface-tuning layer, and a high-k layer. Experimental results demonstrate a high yield of 93% with a mobility of 0.94 ± 0.07 cm² V⁻¹ s⁻¹ and a threshold voltage of −0.02 ± 0.06 V, using all-photolithographic processes. Such a high device yield achieved by tri-layer design also enables scalable, large-area integration, which is hardly possible in the previous bi-layer design (of which the device yield is 37%). We demonstrated a 1024-channel bioelectronic stimulation array (an analogue system) with 4096 transistors, achieving an output current of 8.86 ± 2.0 μA over a 3 × 3 cm² area, as well as several digital circuits, namely, inverters, NAND, NOR, and D flip-flops. This work highlights the importance of creating reliable, low-voltage, and integrable OTFTs as building blocks for bioelectronics, paving the way for future applications in wearable sensors and implantable systems.