5 nm Gate Length Field-Effect Transistors Based on Monolayer α-In 2 X 3 (X = S, Se, Te)

Abstract

Recently, two-dimensional (2D) ferroelectric semiconductors α-In2X3 (X = S, Se, Te) have positioned this semiconductor family as a research focus due to their ferroelectricity. However, the potential of their semiconductivity for further field-effect transistors (FETs) remains unclear.Herein, this work quantifies the performance limit of 5 nm gate length (L g ) ML α-In 2 X 3 double-gate (DG) MOSFETs and compares the devices with non-underlap (non-UL) and symmetric underlap (UL) configurations, by first-principles quantum-transport simulation. For the devices with non-UL configurations, the α-In 2 S 3 MOSFET demonstrates the highest on-state current (I on ) and the lowest subthreshold swing (SS). Meantime, the α-In 2 Se 3 MOSFET shows a low SS, and the α-In 2 Te 3 MOSFET shows a high I on . Due to the effect of the effective masses and bangap energy (E g ), n-type ML α-In 2 S 3 and α-In 2 Te 3 MOSFETs demonstrate superior I on compared to their α-In 2 Se 3 counterpart.For the devices with UL configurations, the I on of all ML α-In 2 X 3 DG MOSFETs can meet the International Technology Roadmap for Semiconductors (ITRS) high-performance (HP) and low-power (LP) standards in 2028. Moreover, all ML α-In 2 X 3 DG MOSFETs achieve ideal SS with the aid of the UL. These results indicate that ML α-In 2 X 3 is a viable candidate for future MOSFET channel materials.