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An asymmetric hot carrier tunneling van der Waals heterostructure for multibit optoelectronic memory

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Abstract

Two-dimensional floating gate van der Waals heterostructures present an appealing opportunity to combine optoelectronic sensing and memory functionality in atomically thin layers, which, as optoelectronic memory, can find applications in high-throughput image sensors, artificial photonic neuromorphic hardware, etc. However, existing optoelectronic memory generally suffers from overshoot characteristics after optical stimulation due to the inherent and persistent recombination loss of photogenerated electron–hole pairs. Here, we demonstrate multibit floating gate optoelectronic memory free from such transient dynamics, based on a new van der Waals heterostructure of PtS2/h-BN/graphene. The large electron affinity of PtS2 creates highly asymmetric tunneling barriers for hot electrons and holes across h-BN, therefore enabling the efficient separation of photogenerated electron–hole pairs during the optical programming of memory. Ladder-type optical programming involving up to 74 discriminable states (>6 bits) is thus achieved, with linear conductance during the update of memory, using sequentially applied light pulses. The present two-dimensional heterostructure with asymmetric charge tunneling barriers may inspire the future exploration of practical multibit optoelectronic memory via attentive band engineering in two-dimensional van der Waals heterostructures.

Graphical abstract: An asymmetric hot carrier tunneling van der Waals heterostructure for multibit optoelectronic memory

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Article information


Submitted
01 Dec 2019
Accepted
14 Jan 2020
First published
14 Jan 2020

Mater. Horiz., 2020, Advance Article
Article type
Communication

An asymmetric hot carrier tunneling van der Waals heterostructure for multibit optoelectronic memory

Y. Chen, J. Yu, F. Zhuge, Y. He, Q. Zhang, S. Yu, K. Liu, L. Li, Y. Ma and T. Zhai, Mater. Horiz., 2020, Advance Article , DOI: 10.1039/C9MH01923E

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