Issue 44, 2018, Issue in Progress

Investigations on the bias temperature stabilities of oxide thin film transistors using In–Ga–Zn–O channels prepared by atomic layer deposition

Abstract

Bias temperature stress stabilities of thin-film transistors (TFTs) using In–Ga–Zn–O (IGZO) channels prepared by the atomic layer deposition process were investigated with varying channel thicknesses (10 and 6 nm). Even when the IGZO channel thickness was reduced to 6 nm, the device exhibited good characteristics with a high saturation mobility of 15.1 cm2 V−1 s−1 and low sub-threshold swing of 0.12 V dec−1. Excellent positive and negative bias stress stabilities were also obtained. When positive bias temperature stress (PBTS) stability was tested from 40 to 80 °C for 104 s, the threshold voltages (VTH) of the device using the 6 nm-thick IGZO channel shifted negatively, and the VTH shifts increased from −0.5 to −6.9 V with the increasing temperature. Time-dependent PBTS instabilities could be explained by a stretched-exponential equation, representing a charge-trapping mechanism.

Graphical abstract: Investigations on the bias temperature stabilities of oxide thin film transistors using In–Ga–Zn–O channels prepared by atomic layer deposition

Article information

Article type
Paper
Submitted
27 Apr 2018
Accepted
26 Jun 2018
First published
11 Jul 2018
This article is Open Access
Creative Commons BY-NC license

RSC Adv., 2018,8, 25014-25020

Investigations on the bias temperature stabilities of oxide thin film transistors using In–Ga–Zn–O channels prepared by atomic layer deposition

S. Yoon, N. Seong, K. Choi, W. Shin and S. Yoon, RSC Adv., 2018, 8, 25014 DOI: 10.1039/C8RA03639J

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