Screening limited switching performance of multilayer 2D semiconductor FETs: the case for SnS

Abstract

Gate tunable p-type multilayer tin mono-sulfide (SnS) field-effect transistor (FET) devices with SnS thickness between 50 and 100 nm were fabricated and studied to understand their performance. The devices showed anisotropic inplane conductance and room temperature field effect mobilities ∼5–10 cm² V⁻¹ s⁻¹. However, the devices showed an ON–OFF ratio ∼10 at room temperature due to appreciable OFF state conductance. The weak gate tuning behavior and finite OFF state conductance in the depletion regime of SnS devices are explained by the finite carrier screening length effect which causes the existence of a conductive surface layer from defect induced holes in SnS. Through etching and n-type surface doping by Cs₂CO₃ to reduce/compensate the not-gatable holes near the SnS flake's top surface, the devices exhibited an order of magnitude improvement in the ON–OFF ratio, and a hole Hall mobility of ∼100 cm² V⁻¹ s⁻¹ at room temperature is observed. This work suggests that in order to obtain effective switching and low OFF state power consumption, two-dimensional (2D) semiconductor based depletion mode FETs should limit their thickness to within the Debye screening length of the carriers in the semiconductor.