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Issue 21, 2014
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Analog performance of Si junctionless tunnel field effect transistor and its improvisation using III–V semiconductor

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Abstract

In this paper, the analog performance of a Si double gate Junctionless Tunnel Field Effect Transistor (DG-JLTFET) has been studied and improvised using a ternary III–V semiconductor compound, indium aluminium arsenide. The analog performance parameters are extracted using device simulations and also compared with the Si JLTFET. We show that III–V JLTFET delivers much better performance parameters, in comparison to Si JLTFET, which includes transconductance generation efficiency (Gm/ID), intrinsic gain (GmRo) and unity gain frequency (fT) along with various gate capacitances.

Graphical abstract: Analog performance of Si junctionless tunnel field effect transistor and its improvisation using III–V semiconductor

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Publication details

The article was received on 09 Nov 2013, accepted on 03 Jan 2014 and first published on 06 Jan 2014


Article type: Paper
DOI: 10.1039/C3RA46535G
RSC Adv., 2014,4, 10761-10765

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    Analog performance of Si junctionless tunnel field effect transistor and its improvisation using III–V semiconductor

    Y. Goswami, B. Ghosh and P. K. Asthana, RSC Adv., 2014, 4, 10761
    DOI: 10.1039/C3RA46535G

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