Advanced 3D ceramic thin-film capacitors: research progress and dielectric energy storage potential
Abstract
The maximum recoverable energy density (Wrec) of ceramic films with two-dimensional (2D) planar structures has exceeded 200 J cm−3 through synergistic optimization strategies. However, the improvement in device-level energy density (Wdevice) is minimal compared to Wrec due to packaging volume constraints, highlighting the inherent limitations of 2D architectures. In response, three-dimensional (3D) ceramic thin-film architectures, which enable the integration of dielectric layers with a high volume fraction, have emerged as an effective solution to overcome these performance limitations. Recent studies have shown that constructing ceramic thin-film capacitors on high-surface-area 3D templates can significantly increase the integration of dielectric materials, leading to a significant increase in Wdevice. This review systematically summarizes the research progress of 3D ceramic thin-film capacitors, analyzing the characteristics of various 3D nanostructured templates, fabrication methods, and performance optimization strategies for the capacitors. Furthermore, this review explores potential future development directions, providing theoretical insights and technical pathways for the advancement of high-performance power capacitors.
- This article is part of the themed collection: Journal of Materials Chemistry A Recent Review Articles
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