Quantification of interfacial trap states via bias-applied HAXPES: a chemical-state perspective

Abstract

An interface where two solid materials meet often disrupts bulk continuity, especially in electronic structures. When an external bias is applied, the interfacial electronic structure forms a voltage barrier that inhibits charge transfer and promotes charge accumulation—a key mechanism in semiconductor devices. However, our understanding of such interfaces remains limited at the molecular scale. Here, we quantitatively characterize interfacial trap states in a model Si|SiO₂|Au MOS structure using bias-applied hard X-ray photoelectron spectroscopy (BA-HAXPES), resolving oxidation state variations across the dielectric layer under real-time bias. While conventional interpretations rely on peak shifts to describe charging effects, our results demonstrate that these shifts are also sensitive to dielectric thickness and local potential variations; thus, we propose a modified Grahame-based framework to contextualize the influence of interfacial potential on chemical-state changes and to support the use of peak intensity as a more reliable indicator. Furthermore, bias-dependent analysis reveals distinct charge dynamics for different oxidation states: Si³⁺ exhibits potential-driven delocalization behavior, resembling mobile carriers within the dielectric, whereas Si²⁺ remains strongly confined to the SiO₂|Au interface, acting as a localized trap signature. These trends are consistently observed across the full bias range and provide a more direct connection between chemical state evolution and interfacial trap-state activity. Our findings offer molecular-level insight into charge accumulation mechanisms and support future trap-state engineering in nanoscale electronic devices.

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Introduction

Multi-layer thin film systems composed of distinct materials exhibit unique interfacial charging features functioning as key electronic components in binary logic gates, supercapacitors,¹ and solar cell related applications.² Optimization of performance in such devices heavily relies on the understanding and sophisticated tailoring in both energy and structural coupling across the heterojunction of materials. Meanwhile, with the increasing demand for manufacturing small scale electronic elements, the gradual reduction in the film thickness makes material properties significantly shift from bulk to interface-dominated behavior. This suggests that a more prominent contribution from the interfacial features, e.g. mismatch bonding, lattice distortion, work function difference and electron distribution, should be carefully evaluated.³ Unfortunately, due to the high difficulty in probing the information from the solid–solid junction, molecular level exploration is still very limited. As such, it is essential to provide a robust approach to accurately capture the interfacial information from both qualitative and quantitative perspectives.

From the perspective of electronic properties at such junctions, a concept called interfacial trapped state is proposed to describe the junction charge transfer feature. Generally speaking, a solid–solid junction can be understood as a region of transition between two different bulk lattice structures, where the continuous electronic structure encounters a sharp truncation. As such, the discontinuity of the electron wavefunction at the junction interface is represented as highly localized wave functions, or in an intuitive imagination, an accumulated charge.⁴ In contrast to the surface density of states (SDOS), which describes the number of available electronic states for electron occupancy and influences conductivity, interfacial trap states arise from impurities, misaligned electronic energy levels that are typically located within the semiconductor band gap,^5,6 and structural imperfections such as dangling bonds.⁷

Unpaired atomic orbitals (dangling bonds) at the interface impact electronic and chemical properties markedly different from the bulk. Masahiro Hori et al. demonstrate that different kinds of dangling-bond defects affect the current produced when interface traps repeatedly capture and release charge under a pulsed bias (charge-pumping current) in Si/SiO₂ structures, highlighting how interfacial defect features govern the material's behavior.⁸ Moreover, variations in crystal orientation alter bond lengths, bond angles, and local strain fields at the interface. The structural characteristics significantly influence chemical reactivity and charge redistribution, thereby modulating the character of interfacial trap states. For example, Pei Yao et al. showed that crystal orientation alters Fermi-level alignment and interfacial strain, which further influences the migration barriers and formation energies of silicon interstitials. This relationship suggests that variations in structure generate distinct interfacial traps.⁹ Taken together, interfacial trap states exhibit chemical characteristics distinct from the bulk lattice because of the different interface properties discussed above, ultimately leading to localized charge accumulation during electrochemical polarization.

In general, the quantitative characterization of interfacial trap states encompasses several descriptors, including trap density, spatial distribution, energy levels, and charge capture cross-section. These parameters are commonly investigated using electrical techniques such as capacitance–voltage (C–V) analysis, deep-level transient spectroscopy (DLTS)¹⁰ or impedance spectroscopy. Such methods enable quantitative extraction of trap density, energy-level distributions, capture cross-sections, and even approximate spatial profiles, providing a fast, non-destructive, and device-level assessment of interface quality. In addition, Yu Song et al. investigated the mechanisms and models of interface-trap annealing primarily through electrical measurements and electron spin resonance (ESR) data, thereby obtaining quantitative information on trap density and energy level distributions and also sensitively identifying paramagnetic defect signatures at the device level.¹¹ However, such approaches often lack the chemical specificity and spatial resolution necessary to resolve atomically localized interfacial behavior. Electrical measurements mainly reveal trap charge dynamics and energy levels, yet offer limited insight into elemental composition or bonding environments. Similarly, electron spin resonance is sensitive to paramagnetic defects with unpaired electrons but is less effective for diamagnetic or deeply buried interface traps, leaving the chemical description of these states incomplete. Therefore, an element-specific probe that can track buried-interface oxidation-state changes under operating conditions is urgently required.

This study focuses on the chemical-state evolution at the interface under applied bias, as revealed by hard X-ray photoelectron spectroscopy (HAXPES). Although we do not determine the exact absolute values of trap-state density or energy levels, our approach enables semi-quantitative estimation by differentiating the bias-dependent evolution of XPS peak intensities. This analysis provides molecular-level insight into how localized charge accumulation modulates the electronic structure and oxidation behavior at buried interfaces. By adopting a spectroscopic perspective, this work complements conventional electrical and modeling-based studies and broadens our understanding of interfacial trap-state phenomena beyond traditional charge-based interpretations.

In applications of band gap materials, e.g. perovskite solar cells (PSCs) and semiconductors, interfacial trap states are critical to device performance due to the fact that these interfacial trap states may facilitate or impede the charge transfer at the interface. Taking PSCs as an example, trap states capture electrons or holes and promote non-radiative recombination. This hinders effective charge extraction, lowers the open-circuit voltage and short-circuit current, and ultimately limits the power conversion efficiency. Furthermore, interfacial trap states can induce chemical reactions and alter interfacial band alignment, exacerbating device instability and efficiency loss.⁶ In similar discussions in the field of metal–oxide–semiconductor (MOS) applications, the physics of trap states are also highlighted as a key factor in manipulating the intensity of the leak current across a dielectric insulating layer, which limits the microscale electronic manufacturing.¹² In this regard, being able to both qualitatively and quantitatively analyze the nature of trap states at such solid–solid junctions on a molecular scale is pressing.

However, interfacial trap state analysis is intrinsically challenging due to the size limitation of small effective probing regions. As most of the trap states are present as a monolayer at the hetero-material junction, conventional absorption spectroscopy techniques, such as infrared (IR) and X-ray (XAS), face difficulties due to the extremely small probing area. Moreover, as trap states are buried within a solid–solid junction, they are generally not reachable for surface sensitive techniques such as atomic force microscopy (AFM) and electron microscopy (EM). Therefore, finding an appropriate analytical technique that is able to extract chemical information under such constrains is necessary.

Recent advances in the related field of interfacial trap state characterization reported using bias-voltage application in hard X-ray photoelectron spectroscopy (BA-HAXPES), which revealed excellent interfacial probing capabilities and potential for in operando analysis. By applying X-ray energy higher than Al Kα (1486.7 eV), the probing depth can be extended from a conventional range deeper than 3 nm from the surface due to the generation of photoelectrons with much higher kinetic energy, providing a good range to study the interfaces within the stacked thin films.¹³ Based on this characteristic, Yamashita et al. conducted an in operando trap state measurement on a MOS of Si|SiO₂(3 nm)|Ru(10 nm) using a 5.95 keV synchrotron radiation source (BL16XU, Spring-8) to depict the interfacial electronic structure.¹⁴ Here, the authors discover a non-linear shift of the Si 1s photoelectron binding energy against the applied bias, which the authors claim is a result of an energy-dependent density variation in interfacial trap states. A similar approach by Yasuno et al. also reported the possibility of characterizing the interfacial trap states in SiO₂|a-InGaZnO using a BA-HAXPES technique.¹⁵

Although the reported studies are promising in visualizing the complex distribution of interfacial trap states, many fundamental properties of the trap states are still unclear. First of all, what are the fundamental physics that shift the photoelectron characteristic peaks? A work function that correlates the nearby chemical environment change is a generally accepted mechanism for photoelectron peak shift, where the degree of shift is also taken to be a representation of the oxidation states of the atom of interest. However, the above description is usually restricted within the molecular scale where the polarity of chemical bonding or the electron negativity of nearby atoms is considered. In the case of macroscale interfacial charging, one has to settle how exactly the charge accumulation mechanism can be associated with the photoelectron shift. For example, what is the impact of spatial distribution of the charge at the interface? Could some materials have more influence than others due to an inhomogeneous charge distribution?

Secondly, peak shifts can also result from the voltage difference across the sample surface and the detector. As in most of the X-ray photoelectron spectroscopy system, the sample stage is usually electrically grounded with respect to the detector voltage for the photoelectron collection. For example, samples with poor electric conductivity have difficulty balancing the charge compensation between X-ray induced photoelectrons lost and flood gun electrons replenished, leading to a surface voltage drift, which is often known as the “charging issue” in XPS analysis. As such, how to address the contribution from the aforementioned events in peak shift discussions, and further correlate it with the trap state properties is critical.

Last but not least, are there other signatures of trap states beyond peak shift? While most discussions focus on shifts in the elemental Si(0) 1s signal, if trap states are truly populated at the interface, signals from oxidized Si 1s states may exhibit stronger correlation. Furthermore, since the trap states are considered as certain transition states that can be occupied by electrons, it might be a measurable quantity by accessing the binding energy of such particular state.

To address these challenges, we aim to reexamine a simple modeling MOS system of Si|SiO₂|Au using a similar BA-HAXPES approach but shifting the focus to the variation of the chemical state at two sides of the dielectric layer as shown in Fig. 1(a) and (b). In this approach, we utilize Cr Kα (5414.7 eV) as the hard X-ray source that enables us to additionally analyse the Si 1s (ca. 1839.5 eV) photoelectron signal. In contrast to Si 2p, Si 1s is free from the influence of the background of Au 4f (83.9 eV) and 5s (111.5 eV) that is a very useful strategy to avoid signal interference in complex material analysis.¹⁶ With an appropriate thickness control of the top-deposited Au layer within 5–7 nm, the chemical state at the two interfaces of the thin silica dielectric layer can be measured via HAXPES.

Fig. 1 Conceptual scheme of the photoelectron generation process of a multilayer MOS structure generated by a hard X-ray source. (a) MOS sample structure and the connected electric potential correlation between the X-ray photoelectron spectrometer and the potentiostat. In this arrangement, the gold layer is on the very top of the MOS structure facing the X-ray source, and simultaneously, the gold layer is connected to the working electrode of the potentiostat, which is also the electric ground of the XPS. (b) Schematic molecular structure at the MOS interface, where the blue-marked regions are the structural defects where no formation of chemical bonding is presented. (c) Illustrated energy diagram of the MOS structure under flat-band potential and positive potential applications.

To independently discuss the influence of the interfacial accumulated charge (q_s) and the applied bias (E_appl.) on the peak shift, we construct a full energy diagram to evaluate the overall photoelectron excitation process (as shown in Fig. 1(c)). The band structure consists of a thin Au layer (yellow) atop a p-type Si wafer (gray), separated by a thin SiO₂ dielectric (blue). Here, we demonstrate two conditions when the applied potential E_appl. is equal and greater than the flat-band potential E_fb. As the work function of Au (5.1 eV) is very close to the work function of the p-type semiconductor (4.1 eV to the conduction band minimum plus band gap of 1.1 eV for silicon, where the Fermi-level should be slightly higher than the maximum of valence band energy), the flat-band condition nearly coincides with zero applied potential. To enable a rational energy comparison, all diagrams are aligned to a common ground voltage, corresponding to the Fermi level of the Au electrode and the ground potential of the HAXPES system.

However, it is important to note that the photoelectron kinetic energy measured by the analyzer is referenced to the detector ground, and any shift in the sample's surface potential—caused by interfacial charging or inadequate charge compensation—will alter the apparent binding energy. This implies that not all observed peak shifts can be directly attributed to interfacial trap states, a point often overlooked in prior studies. Clarifying this distinction is essential for correctly interpreting interfacial phenomena.

In summary, this study aims to establish a more comprehensive framework for understanding the chemical and electronic behavior of interfacial trap states in MOS systems. We re-evaluate the influence of applied-bias HAXPES experiments on peak shifts and subsequently propose a new model for the quantitative analysis of trap states. Ultimately, this work provides a more reliable basis for distinguishing genuine trap-state effects from non-intrinsic measurement artifacts.

Experimental

Materials and chemicals

Sample preparation. The MOS sample used in this study is fabricated from Si wafers with a Miller index of (110). After cutting the wafers into rectangular pieces measuring 15 × 40 mm, thermal oxidation is employed to form an oxide layer with a thickness of ca. 2–5 nm. Subsequently, a 5 nm-thick Au film is deposited onto the oxide layer using a high-vacuum evaporation system.

The thickness of the Au layer is carefully selected to ensure the formation of a stable bulk layer on top of the SiO₂, preserving the intrinsic properties of Au while maintaining the integrity of the Au–SiO₂ interface. Characterization of the MOS structure surface is conducted under an applied bias voltage using hard X-ray photoelectron spectroscopy (HAXPES). HAXPES utilizes higher-energy X-rays, allowing for increased penetration depth and enabling the analysis of deeper buried interfaces, while its fundamental operating principle remains similar to that of conventional X-ray photoelectron spectroscopy (XPS). This capability provides a more comprehensive depth profile of elemental distribution within the material.

Additionally, to verify the effectiveness of bias application, a control sample without an Au coating is examined, enabling a comparative analysis of SDOS and interfacial trap states. The XPS instrument used in this experiment is equipped with two types of X-ray sources: monochromatized aluminum Kα (Al Kα, 25 W, 15 keV) and chromium Kα (Cr Kα, 50 W, 20 keV). The Cr source provides higher energy and greater penetration depth compared to the Al source. Thus, the optimal thickness of the Au layer is determined based on the following criterion: signals from the underlying Si and SiO₂ layers should remain undetectable when using the Al X-ray source but should be measurable with the Cr X-ray source. This approach ensures precise characterization of the material's structure and interface properties.

Materials. In this study, p-type silicon wafers with (100) and (110) crystal orientations, doped with boron as the acceptor impurity, were used. The wafers were purchased from Twice Jin Limited Company. The Au layer was deposited via physical vapor deposition (PVD), using a Canadian Maple Leaf gold coin as the source material.

Instrument

Surface characterization. In the BA-HAXPES measurements, the experimental setup is designed to apply a bias voltage to the Si layer by connecting both the counter (CE) and reference electrodes of the potentiostat to the HAXPES stage. The setup features distinct configurations for the top and bottom of the sample to establish electrical connections with the working and counter electrodes, respectively. On the top side, the Au layer is connected to the working electrode (WE) of the potentiostat. To ensure conductivity between the Au surface and the HAXPES stage, an additional metal plate is placed in contact with the Au layer. This setup shares common ground with both the XPS stage and the measurement system, enabling stable electron flow from the working electrode to the sample under anodic bias. On the bottom side, the Si layer is connected to the counter electrode (CE) of the potentiostat. For stable electrical contact, the sample is mounted on a metal plate that is fastened to the potentiostat's potential inlet using a screw. Silver paste is applied between the bottom of the sample and the metal plate to enhance electrical conductivity. To prevent direct electrical contact between the sample and the HAXPES stage and avoid any short circuiting, insulating vacuum tape is applied to the surface of the stage prior to mounting. The potentiostat operates with an anodic-positive current polarity, meaning that when a positive potential is applied, electrons are expected to flow from the working electrode (the Au layer) to the sample (the Si layer).

The applied bias is controlled by the potentiostat, with the magnitude gradually increased from 0 to ±1 V in an alternating sequence. Specifically, the bias is stepped in increments of 0.1 V, beginning with +0.1 V, followed by −0.1 V, then +0.2 V, and so forth.

For the sample without an Au coating, the configuration remains identical to that of the Au-coated sample in terms of its connections to the potentiostat's reference and counter electrodes. The bias is applied incrementally from 0 to ±0.9 V, following the same stepwise procedure. The key distinction, however, is that the absence of a gold coating results in no working electrode being grounded on the top surface. In other words, the sample without an Au coating does not share the common ground potential with the XPS machine.

The system is equipped with a Cr Kα (5414.7 eV) source as the hard X-ray excitation source. The Si 1s and Au 4f spectra are acquired over 15 and 2 sweeps, respectively, using a pass energy of 55 eV and a scan step size of 0.1 eV. To ensure the reproducibility of the experiment and minimize errors, three different points are selected on each sample for XPS measurements, and the resulting data are averaged.

XPS data analysis. CasaXPS is used to analyze the acquired XPS data, where peak fitting is performed using mixed Gaussian–Lorentzian functions following Shirley background subtraction. A stable Au peak position serves as an indicator of proper grounding; therefore, it is first examined to ensure consistency, as shown in the SI.

Next, the Si 1s signal is fitted using a single peak, with its position automatically adjusted by CasaXPS to achieve the optimal fit. As a result, the Si 1s peak position exhibits slight variations under different applied bias but remains centered at approximately 1839.56 ± 0.03 eV with an FWHM of 1 ± 0.1 eV.

Once the Si 1s peak position is established, peak deconvolution of the SiO₂ region is performed using four component envelopes, each corresponding to a distinct oxidation state. The peak positions are defined relative to the Si 1s peak. First, the Si⁴⁺ state is positioned based on the energy separation between Si and SiO₂ reported in the XPS reference book, which is approximately 4.1 eV. To achieve an appropriate fit, three additional peaks—assigned to Si²⁺, Si³⁺, and a higher oxidation state denoted as Siⁿ⁺—are introduced.

After several rounds of fitting and adjustment, the final binding energy shifts of the SiO₂ peaks are set at 2.52, 3.27, 4.26, and 5.09 eV relative to the Si 1s peak, corresponding to the oxidation states of 2+, 3+, 4+, and n+, respectively. Additionally, the full width at half maximum (FWHM) of each oxide peak is scaled to 1.2 times the FWHM of the Si 1s peak. The fitted peak area is subsequently used to calculate the relative ratio of each species in different oxidation states.

It is important to emphasize that the use of oxidation states here does not imply that actual redox reactions occurred in the sample during the experiment. In fact, based on the analytical principles of XPS, it is barely possible to clearly distinguish between true redox reactions involving bond formation and effects purely arising from interfacial charge accumulation. Instead, the oxidation states are adopted as a practical and consistent labeling scheme to reflect variations in the local chemical environment—particularly the influence of work function shifts on the Si signal. In this context, the primary role of these labels is to help distinguish chemical environments and enable a simplified discussion of charge accumulation behavior at the interface.

Results and discussion

To quantitatively investigate the trap state at a Si|SiO₂|Au MOS system, we utilize HAXPES to extract chemical and compositional information of the interfaces. Building on this analysis, we derive the mathematical relationship between the interfacial potential and the dielectric thickness to interpret the observed XPS peak shifts. Fundamentally, through probing the kinetic energy (KE) of the photoelectron emitted from a material under known incident X-ray energy (hν), both the binding energy (BE) and the work function (Φ) of the material can be extracted by using the following equation:

KE = hν − BE − Φ (1)

Here, eqn (1) is only applicable to the sample that shares the same electric ground with the XPS detector. Considering a simultaneous measurement on a two-electrode system, where one electrode is electrically grounded (working electrode, WE) with the XPS detector and the counter electrode (CE) is electrically connected to WE with a bias difference of E_appl. (as shown in Fig. 1(a)), the measured KE of the photoelectron emitted from the CE can described by the following equation:

KE_CE = hν − BE_CE − Φ + eE_appl. (2)

eqn (2) depicts a positive correlation between the measured KE and bias voltage E_appl., which predicts that the magnitude of the KE shift should be the same as the electric work eE_appl. applied while the rest of the terms are constant, where e represents the unit charge of an electron. To validate our assumption, we conduct a reference experiment measuring the Si 1s BE shift with applying a range of bias on a silicon wafer as shown in Fig. S1. The result nicely demonstrates a linear correlation between the Si 1s BE shift and the E_appl. with slope of −0.98, which confirms our first assumption described in eqn (2).

The next step is to construct the MOS interfacial band structure while considering the silicon wafer and Au electrode are separated by a thin silica dielectric layer. Taking the knowledge based on the well-accepted band structure model of MOS, the electric field across the interface triggers charge accumulation at the semiconductor side, leading to the shift of Fermi level (band bending) (as shown in Fig. 1(c)) under the condition of E_appl. > 0 for an example. In this case, as the total potential drop conservation applies, we assume the applied bias can be further expanded by the following expression:

E_appl. = E_ox + Ψ_s (3)

Here, the E_ox. is the potential drop across the dielectric oxide layer, and Ψ_s is the interface potential at the SiO₂|Si interface, which is expected to be the term that modifies the KE of interface emitted photoelectrons. Considering the dielectric layer serves as an ideal parallel capacitor, eqn (3) can be further expressed as:

In this expression, d is the thickness of the dielectric layer, is the permittivity of silica and A is the area of the interface. Note that the q_s represents the interface accumulated charge that can be further correlated with the interface potential Ψ_s using the Grahame equation.¹⁷ To simplify the equation with the assumption that the interface potential is low, the Grahame equation can be reduced to the following form:

In this simplified form, the term λ_D is the Debye decaying length within the semiconductor, which is correlated to the concentration of the charge carrier. Substituting the q_s in eqn (4) using the Grahame correlation, we can obtain:

Rearranging the terms, we can correlate the interfacial potential Ψ_s to the applied bias E_appl. as the following formula:

In this expression, we can correlate the magnitude of the interfacial potential Ψ_s, which causes the interfacial photoelectron KE shift, by the thickness of the dielectric layer under a given applied bias E_appl.. In the case where d is extremely large (disconnection), Ψ_s = 0, indicating no interfacial charge accumulation, and the KE of the photoelectron should follow eqn (2), i.e. the BE shift is proportional to the applied bias. As soon as the d is small or close to negligible, Ψ_s = E_appl., which causes significant band bending that induces interfacial charge accumulation. As shown in Fig. 1(c), the band bending causes less or no KE shifts with respect to the same applied bias. To verify this correlation, we examine the Si 1s BE shift versus the same range of applied bias in two MOS systems with different silica thickness d = 2.73 and d = 4.45 nm, respectively, characterized by angle-resolved XPS (ARXPS) with Al Kα in Si 2p signal analysis. As shown in Fig. S2, the measured slope of the two MOS systems are 0.0084 and 0.0941, respectively, showing that the thicker silica layer indeed contributes higher slope value (maximum value should be 1 when d = ∞). The resulting trend nicely supports our mathematical deduction, which is essential for our discussion in later sections.

HAXPES analysis on the Si 1s photoelectron spectrum of the Si(110) substrate with a solely 2.73 nm thick SiO₂ terminated surface and with an additional 5 nm thick Au layer deposited on top of the SiO₂ layer is shown in Fig. 2(a). In detail, as the HAXPES measurement causes material electron loss (drift in sample voltage), we use the potentiostat to lock the sample voltage at 0 V versus the ground potential of the system. In the case with the Au top layer, a bias of 0 V is applied between the Au and Si substrate as illustrated.

Fig. 2 (a) HAXPES Si 1s spectrum acquired from 2.73 nm thick silica terminated silicon (110) wafer with and without a 3 nm thick gold top layer deposited under a constant applied potential of 0 V. (b) Illustration of the interfacial chemical structure of the two cases.

By applying the existing knowledge of the reported binding energy difference of Si 2p between the fully oxidized state, i.e. SiO₂ and the elemental state of Si, which is about 4.1 eV,¹⁸ we are able to identify the position of the fully oxidized Si 1s peak at 1843.8 eV (marked in blue) with reference to the elemental Si 1s peak at 1839.6 eV (marked in gray). The above statement is based on the assumption that the material work function has an equal influence on the 2p and 1s orbital photoelectrons of the exact same element. As such, we can therefore identify peaks with incomplete oxidation according to the degree of their binding energy shift. Fig. 2(a) presents the hypothesized oxidation state of Si²⁺ and Si³⁺, marked in orange and green, respectively. Additionally, we also discover a very weak peak that is located at a position higher than the fully oxidized state (marked in pink as the Siⁿ⁺ state), which is not chemically reasonable in the context of silicon chemistry, as a peak at higher binding energy would imply an oxidation state greater than Si⁴⁺, which is the highest known oxidation state of silicon. However, this may due to the fact that all the fitted peaks are using exact fitting constraint of the same full width at half maximum value (FWHM) that is associated with the elemental Si. As the lattice structure changes into a more disordered form, the FWHM value can be larger, therefore, the Siⁿ⁺ state may be considered as a part of the Si⁴⁺ state due to the disordering.

Here, the surprising discovery is the presence of a very significant amount of Si²⁺ state in the case with the Au top layer deposited. As shown in Fig. 2(a), in contrast to the Si³⁺/Si⁴⁺ dominated silica surface, the deposition of Au converts the measured Si 1s profile into a Si²⁺/Si³⁺ dominated structure. While the ratio of Si³⁺/Si⁴⁺ remains similar to the case without the Au top layer, it seems the newly created SiO₂|Au interface does generate a significant amount of Si²⁺ state at this particular interface. However, it is still not yet clear whether it is really a change of oxidation state of Si or it is due to interfacial charge accumulation since Au is rich in electrons, or both explanations are representing the same interfacial feature.

Nevertheless, being able to quantitative characterize both the Si|SiO₂ and SiO₂|Au interfaces sheds light to further correlate the interfacial trap state.

To verify whether the observed chemical state can be correlated to the potential-dependent interfacial charging, we further conduct in operando HAXPES characterization on the same MOS with an applied working bias ranging from −1.0 V to +1.0 V as shown in Fig. 3. The penetration depth of HAXPES with a Cr Kα source is approximately 10 nm, which can exceed the escape depth of Si 1s photoelectrons when the dielectric layer is insufficiently thick. Therefore, signals from both the SiO₂|Au and Si|SiO₂ interfaces are simultaneously acquired, which increases the complexity of spectral interpretation. To avoid the complication of simultaneously acquiring signals from both interfaces, we first selected a sample with a silica thickness of approximately 300 nm and deposited a 5 nm Au layer on top of the dielectric. Under this condition, the HAXPES signal is limited to the SiO₂|Au interface only, thereby simplifying the analysis.

Fig. 3 The first row presents the MOS sample with a thin silica thickness of 2.73 nm measured by BA-HAXPES. (a) HAXPES Si 1s spectrum variation comparison of individual Si 1s peaks under an applied bias of 1.0 V, 0.0 V and −1.0 V, respectively. (b) Trends of intensity variation of the peak of interest over a range of applied bias from −1.0 V to 1.0 V. The second row presents the MOS sample with a thick silica thickness of 300 nm and its corresponding (c) HAXPES Si 1s spectrum and (d) trends of intensity variation of individual peaks.

At the SiO₂|Au interface, the Si⁴⁺ and Siⁿ⁺ signals dominate the spectrum, as illustrated in Fig. 3(c), consistent with the expected characteristics of a thick silica layer. In particular, due to the fact that the Siⁿ⁺ state aligns with no reported silica chemical state, it is more a result of differential charging in material that is commonly exhibited in HAXPES measurements when the electric conductivity of the material is poor.¹⁹ As the SiO₂ in a deeper region loses its electron due to X-ray excitation, the slow charge compensation causes the region to be partially positively charged, leading to a shift in BE towards a higher value, i.e. the Siⁿ⁺ state measured.

Fig. 3(c) displays the Si 1s spectral compositions at −1.0 V, 0 V, and +1.0 V, revealing a clear bias-dependent shift in the relative intensities of the Si oxidation states. By examining the peak intensity, we found that even under high anodic polarization, a significant amount of Si²⁺ state is still measurable while the Si³⁺ state has nearly vanished under cathodic polarization of −1.0 V. This indicates the formation mechanisms of the Si²⁺ and Si³⁺ states might be different, where the Si²⁺ state is less influenced by the external polarization compared to the Si³⁺ state. Combining this observation with Fig. 2(a), where the Au-free sample shows no detectable Si²⁺ signal, it is very likely that the Si²⁺ state is a specific interfacial state that involves strong interaction between SiO₂ and Au.

In addition, the Si³⁺ state exhibits an opposite intensity trend under cathodic and anodic polarization. As shown in Fig. 3(c), the Si³⁺ signal nearly vanishes under a cathodic bias of −1.0 V, whereas under an anodic bias of +1.0 V, its intensity increases significantly, accompanied by a corresponding decrease in the Si²⁺ signal. To further analyze this behavior, we plot the area ratios of all relevant oxidation states across the full range of applied bias with a step size of 0.1 V, resulting in the bias-dependent intensity spectrum shown in Fig. 3(d). In the cathodic branch (from 0.0 to −1.0 V), the intensity ratio of the Si²⁺ state remains similar over the whole range while the Si³⁺ state is nearly negligible in this branch. In the other direction, anodic polarization (from 0.0 to 1.0 V) exhibits a slight decreasing trend of Si²⁺ with much more increasing trend of Si³⁺. However, the sum of the overall charging states remains the same in both the cathodic and anodic branches, indicating the Si²⁺/Si³⁺ feature transition under anodic bias is an internal conversion within the existing interfacial states at the SiO₂|Au interface.

Applying the same HAXPES peak analysis constraints under the same polarization conditions, Fig. 3(a) depicts the chemical states of interest, indicated by the same color coding, under applied polarizations of +1.0 V, 0.0 V and −1.0 V. Since the penetration depth of HAXPES exceeds the thickness of the dielectric and metal, the chemical and charging states on both sides of the 2.73 nm silica layer can be measured simultaneously. The overall obtained Si²⁺ and Si³⁺ profile in Fig. 3(a) and (b) may be the sum of the charge profile at both the SiO₂|Au and Si|SiO₂ interfaces. Upon re-examining the Si 1s profile, we observed a significant redistribution of silicon oxidation states: under an applied bias of +1.0 V, the Si²⁺ intensity significantly decreases, while the Si³⁺ intensity increases inversely, eventually surpassing that of the Si²⁺ state. In the meantime, the intensity of elemental Si(0) remains unchanged.

Fig. 3(b), plotted using the same method as for Fig. 3(d), presents the resulting intensity ratio trends and clearly illustrates the bias-dependent evolution of each oxidation state across the applied voltage range. Through statistical analysis, we confirm that the intensity of elemental Si(0) remains unchanged across all applied bias, as observed in Fig. 3(a). Here, the orange-marked divalent Si²⁺ signal exhibits its highest intensity ratio at 0 V and decreases symmetrically as the bias increases in both positive and negative directions, where the green-marked Si³⁺ signal exhibits a compensatory trend corresponding to the variation in Si²⁺ signal. The observation of the Si²⁺ and Si³⁺ oxidation state variations further suggests that the amount of interfacial accumulated charge and its distribution is a measurable quantity.

Combining the results in Fig. 3(b) and (d) allows us to separately analyze the charge accumulation behavior at each interface, as the measured Si²⁺ and Si³⁺ profiles reflect contributions from both sides of the dielectric layer. Specifically, Fig. 3(d) reveals the chemical behavior of the upper SiO₂|Au interface alone. By comparing it with Fig. 3(b), we can infer the interfacial chemistry at the Si|SiO₂ interface.

The anodic trend in Fig. 3(d) suggests that the formation of the Si³⁺ state is a SiO₂|Au interface dominated process. The results indicate the increasing positive charge (decreasing of electron) transforms part of the existing Si²⁺ state into the Si³⁺ state within the range of applied bias. With a close look at the trend in both cases, the Si²⁺/Si³⁺ ratio seems to reach an equilibrium between 0.2 and 1.0 V with no change in their areas. This observation suggests that the charge accumulation process at this interface is only limited within 0.0 and 0.2 V.

At the Si|SiO₂ interface, anodic polarization leads to the p-type silicon undergoing a charge neutralization process, which is known as the formation of a depletion region. Although the overall electron in Si is still increasing, the depletion mechanism can significantly reduce the charge carrier concentration of the p-type semiconductor. As such, based on the Poisson–Boltzmann charge distribution model, the low charge carrier concentration leads to a larger Debye decay length from the interface that refers to low interfacial charging.²⁰ This result explains why the BA-HAXPES area ratio trend in the anodic branch is a SiO₂|Au interface dominated process.

In the cathodic branch, the Si³⁺ state at the SiO₂|Au interface disappears nearly immediately when a negative polarization is applied. However, in the thin silica dielectric layer, the measured total Si³⁺ state is increasing, indicating most of them should come from the Si|SiO₂ interface. This observation also aligns well with the p-type semiconductor property where the reduction of electrons leads to an increase in charge carrier concentration that significantly reduces the Debye decay length, which causes charge accumulation at the interface.²¹

Here, due to the Si 1s photoelectron emitted from the Si|SiO₂ interface having to penetrate the thin silica layer in contrast to the Si 1s photoelectron emitted from the SiO₂|Au interface, certain intensity loss should be considered. Considering the silica layer is homogeneously covered on top of the silicon wafer, we apply a classic absorption law to estimate the intensity loss for the Si³⁺ state as follows:

Here, the I₀ represents the initial intensity emitted from the Si|SiO₂ interface, I is the intensity after passing the SiO₂ layer, d_SiO2 is the silica layer thickness and λ_SiO2 is the attenuation constant of silica of ca. 3.3 nm calculated by using the formula from TPP2M software. As the SiO₂ layer thickness is about 2.73 nm measured by ARXPS, we can determine the ratio of I/I₀ is 0.44, which estimates that only 44% of the photoelectrons can pass the SiO₂ layer. Therefore, to compare the exact ratio of Si²⁺ and Si³⁺ in the cathodic branch, the intensity of Si³⁺ should be divided by a factor of 0.44, which leads to the current 1/1 ratio (Si²⁺ : Si³⁺) becoming 1/2.3, while considering all the Si²⁺ states remain unchanged and only populated at the SiO₂|Au interface.

In summary, Fig. 4 illustrates our interpretation of our hypothesis of the charging mechanism in a Si|SiO₂|Au MOS and further presents an estimation of the trap state density in both interfaces. In short, the silica layer with a thickness of 2.73 nm exhibits a negligible bias dependent shift as discussed, and therefore, we believe that the charging behavior can be mainly attributed to the measured peak intensity variation. As observed from the BA-HAXPES analysis, the impact of bias application is shown to be the switching between Si²⁺ and Si³⁺ states in the Si 1s photoelectron spectrum, and we assume the intensity can be correlated to the trap state density.

Fig. 4 Interpretation of interfacial oxidation state distribution and trap-state density in the MOS structure. (a) Schematic diagram showing the distribution of 2+ and 3+ oxidation states under cathodic, zero, and anodic bias. Under cathodic bias, the 2+ state dominates at the SiO₂|Au interface, while the 3+ state accumulates at the Si|SiO₂ side. At zero bias, the 2+ state remains on the Au side with minor 3+, whereas the Si side is mainly 3+. Under anodic bias, a mixed 2+/3+ state appears at the Au interface, and the Si side undergoes depletion. (b) First derivative of the 3+ state intensity under cathodic bias, used to estimate the trap-state density at the Si|SiO₂ interface. The energy axis aligns E_appl. = 0 V to the valence band (VB) and 1.1 V to the conduction band (CB). Trap states mainly appear between 0.0 and −0.4 V. Negative values are shaded gray to indicate nonphysical regions.

Fig. 4(a) illustrates the distribution of the Si²⁺ and Si³⁺ states on the two interfaces of the thin silica layer under cathodic, zero and anodic bias application. Under cathodic bias, the Si²⁺ and Si³⁺ states separately occupy the two interfaces where the Si²⁺ state is dominant at the SiO₂|Au side and the Si³⁺ state is dominant at the Si|SiO₂ side, which is representative of the positive charge carrier accumulation. Under the flat band potential condition, the SiO₂|Au side has Si²⁺ states as the majority with minor Si³⁺ states, while the Si|SiO₂ side is mainly dominated by Si³⁺. With the anodic bias applied, the SiO₂|Au side becomes a mix of Si²⁺/Si³⁺ states with equal contribution, while the Si|SiO₂ side is under depletion conditions where no charge accumulation occurs at the interface. Interestingly, most of the evidence suggests the Si³⁺ state can be populated on both sides of the dielectric layer but the Si²⁺ state is mainly present at the SiO₂|Au interface, suggesting the mobility behavior of the Si³⁺ state is closer to the behavior of the charge carrier in MOS. It should be emphasized that the presence of Si³⁺ signals at both interfaces arises from localized interfacial charging under applied bias, rather than from any physical migration of Si³⁺ species across the SiO₂ layer.

As we know that the Si²⁺ state is immobilized at the SiO₂|Au interface, we try to use the Si³⁺ state population variation as an indicator for the Si|SiO₂ interfacial trap state density estimation. Fig. 4(b) shows the first order derivation of the Si³⁺ state intensity profile in the cathodic branch where charge accumulation at Si|SiO₂ occurs. As mentioned earlier, the flat band condition of heavy doped p-type Si versus Au is very close to the bias free potential, and so we align the top of the valence band (VB) with E_appl. = 0 V and the bottom of the conduction band (CB) with E_appl. = 1.1 V with the consideration that the Si band gap is approximately 1.1 V. In this approach, we can roughly see that the trap state is mainly populated at the bias region from 0.0 to −0.4 V, with some scattered around −0.7 V and the region close to the CB. Due to the physical fact that trap state density cannot be a negative value, we therefore shade the negative region in the derivation plot in gray. As the negative value is due to the Si³⁺ signal variation, we expect that a finer sampling step and higher X-ray intensity may improve the resolution quality, however, this is further restricted by the instrumental conditions and time.

Conclusion

In this work, we present in operando characterization of a MOS charging mechanism using BA-HAXPES that is able to simultaneously provide chemical information at the charged interfaces during real-time bias application. Here, we demonstrate that the photoelectron peak shift in a MOS is correlated to the dielectric layer thickness, which influences the interfacial potential and therefore alters the charging condition under the same range of bias application, and as such, it is not an ideal way of estimating the interfacial trap state density. By applying BA-HAXPES, we present a comprehensive understanding of the charging mechanism at a Si|SiO₂|Au MOS, and furthermore, characterizing the Si 1s 3+ state as the major form of charge carrier in a p-type Si semiconductor that can be quantitatively measured. Although the hard X-ray exhibits a small photoelectron emission cross-section that leads to low photoelectron intensity, our results still demonstrate a promising approach to visualizing the charging mechanism on a molecular level and in real-time. We believe this work may provide a novel addition to the relevant community to further advance our understanding of materials science.

Conflicts of interest

There are no conflicts to declare.

Data availability

The raw X-ray photoelectron spectroscopy (XPS) data supporting the findings of this study, including those presented in Fig. 2 and 3, are provided in the SI. No additional datasets or code were generated or used in this study.

Supplementary information is available. See DOI: https://doi.org/10.1039/d5tc01375e

Acknowledgements

The authors are thankful for the financial support from the National Science and Technology Council (project no. NSTC 110-2113-M-002-029-MY3); special thanks are given to Mr. Han-Pang Chen from the Instrument Center, College of Science, National Taiwan University/National Science and Technology Council, for providing assistance with the HAXPES measurements.

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