Sichen
Liu
a,
Xuanxuan
Sun
a,
Tianbo
Zheng
a,
Qinghua
Xu
*b,
Yao
Gao
*a and
Xing
Lu
*a
aState Key Laboratory of Materials Processing and Die & Mould Technology, School of Materials Science and Engineering, Huazhong University of Science and Technology, Wuhan 430074, China. E-mail: yaogao@hust.edu.cn; lux@hust.edu.cn
bSchool of Pharmaceutical Sciences, South-Central Minzu University, Wuhan 430074, China. E-mail: 2023143@mail.scuec.edu.cn
First published on 4th September 2025
Organic–inorganic hybrid halide perovskites exhibit exceptional properties, including prolonged charge carrier lifetimes, high photoluminescence quantum efficiency, and remarkable defect tolerance, demonstrating significant potential in optoelectronic applications like photoelectric detectors, light-emitting devices, and solar cells. Despite the high intrinsic carrier mobilities, their application in field-effect transistors (FETs) has not been well investigated. Three critical challenges currently hinder the development of high-performance hybrid halide perovskite FETs: ion migration, bulk/interfacial defects, and material instability. In the past few years, the application of halide perovskites as FET channel materials has been actively advancing, not only for the development of high-performance FETs showing stunningly improved mobilities, but also for fundamental investigation of charge transport mechanisms and structure–property relationships. This article comprehensively reviews recent progress in three-dimensional (3D) and two-dimensional (2D) organic–inorganic hybrid halide perovskite-based FETs. We discuss achievements and current challenges regarding device performance and stability issues of such hybrid materials and provide a general perspective on breaking through their bottlenecks and exploring future directions.
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| Fig. 1 (a) Schematic of crystal structures for 2D, quasi-2D, and 3D metal halide perovskites.23 (b) Determination of work function, valence band maximum (VBM), and conduction band minimum (CBM) via ultraviolet photoelectron spectroscopy (UPS).10 (c) Schematic cross-sections for four general organic transistor geometries: bottom gate top contact (BGTC), bottom gate bottom contact (BGBC), top gate bottom contact (TGBC), and top gate top contact (TGTC). (d) Illustrations of operating regimes of FETs, (i), (ii), and (iii), represent the linear regime, the start of the saturation regime at the pinch-off point, and the saturation regime, respectively.7 Figures reproduced with permission from: (a) ref. 23. Copyright 2021, Wiley-VCH GmbH; (b) ref. 10. Copyright 2022, Wiley-VCH GmbH; (d) ref. 7. | ||
In addition to the crystal structure, the band structure is also important for understanding and studying perovskites. Among the components that constitute the structure of perovskite crystals, the A-site cation primarily influences the crystal structure by modifying the lattice. Since it does not participate in covalent bonding, its impact on the frontier energy bands is minimal.4 Therefore, the energy density of perovskite semiconductors is mainly provided by the electron cloud distribution of the valence electron layer of B-site metals and halogens. For the commonly used Pb/Sn-based perovskites (inorganic parts are [PbI6]4− and [SnI6]4−), the origin of the valence band (VB) is the anti-bonding of the Sn/Pb-s orbitals and I-5p orbitals, and the dominant origin of the conduction band (CB) is Sn/Pb-p orbitals.4,5 In particular, Sn-5s and Sn-5p orbitals are higher than Pb-6s and Pb-6p orbitals, so Sn-based perovskites have strong Sn 5s–I 5p anti-bonding coupling, which not only improves the energy level of the VB, but also reduces the band gap.6 The strong anti-bonding coupling promotes the formation of tin vacancies (VSn), which are the source of the holes, so Sn-based perovskites exhibit more p-type characteristics.7 However, too many VSn can induce a p-type self-doping effect that has a negative influence on the performance of the FET device.8
So far, there have been numerous methods to characterize the band structure, such as ultraviolet photoelectron spectroscopy (UPS), ultraviolet-visible absorption spectroscopy (UV-vis), UV-vis diffuse reflectance spectroscopy, X-ray photoelectron spectroscopy (XPS), cyclic voltammetry (CV), and density functional theory (DFT) calculation.9–11 In general, these methods are convenient to use in combination. Taking (PEA)2SnI4 in Fig. 1b as an example, firstly, the intersection of the intensity at a high binding energy in UPS is defined as the secondary electron cutoff energy (Ecut-off); the work function can be determined by the difference between the incident photon energy and Ecut-off; and the intersection of the intensity at the low binding energy represents the difference between the valence band energy and the Fermi energy level (Ev − EF). Ev can be gained by the intersection of the epitaxial line near 0 eV and the horizontal extension in the XPS valence band spectrum. Next, the Eg is estimated according to the Tauc plot, which is mainly based on the formula: (αhν)1/n = B(hν − Eg) (n = 1/2 for the direct bandgap, n = 2 for the indirect bandgap). From the above formula, it can be seen that (αhν)1/n is only linear with hν, so the tangent of the extension curve intersects the X-axis, and the Eg of the semiconductor material can be obtained. Also, the band edge absorption wavelength (λg) of the semiconductor is determined by the band gap width Eg, and there is a quantitative relationship between them: Eg = 1240/λg. Then the Eg can be obtained using the UV-vis spectrum, but this method is only suitable for direct band gap semiconductors. Finally, Ec is obtained by converting Eg and Ev. The energy band diagram of (PEA)2SnI4 can be determined by combining Ec, Ev, and EF. The diagrams show that after replacing partly VI+ by S2− doping, the Fermi level is closer to VBM, indicating that the hole concentration increases (Fig. 1b). The CV method is used widely to estimate ionization energy IP (or the HOMO) and electron affinity energy EA (or the LUMO) by measuring redox potential. The initial oxidation potential corresponds approximately to IP. The initial reduction potential corresponds to EA. The difference between the two corresponds to the Eg of the semiconductor.
MHPs have advantages in electron transport, large-area deposition at low temperatures, high carrier mobility, and photoelectric conversion, which fully meet the needs of high-performance FET development. However, the application of field-effect transistors was far less popular than that of other optoelectronic devices, until the last two decades have slowly ushered in a renaissance. Field-effect transistors are electronic switches controlled by a voltage circuit, and are the key component of modern electronic technology due to high input impedance, low power consumption, and fast switching speeds. It has been widely used in various electronic products, and its development and application are of great significance for technological innovations and social progress. Generally, apart from their ability to amplify signals and achieve fast switching, the FETs also offer the advantage of low noise, as charge transport involves only a single type of carrier (electrons or holes).9 The basic structure of a FET usually consists of a substrate, source electrode, drain electrode, gate electrode, dielectric layer, and semiconductor active layer. The semiconductor layer directly contacts the source and drain terminals to form a channel, and the gate terminal is close to the channel but separated by a thin dielectric layer. According to the position of the deposited gate and the contact mode between the semiconductor and the electrode, the device structure is generally divided into bottom-gate and top-contact (BGTC), bottom-gate and bottom-contact (BGBC), top-gate and bottom-contact (TGBC), and top-gate and top-contact (TGTC). The difference in the structure will affect the carrier injection and device performance. Schematic cross-sections for four transistor geometries are shown in Fig. 1c. The BGTC structure with staggered configurations is commonly used in device fabrication, which can lead to better electrical contact because of the large charge injection area and a slight mixing between electrodes and semiconductors, such as Au and (PEA)2SnI4. However, transistor performance is susceptible to negative effects due to the existence of bulk resistance on the path between the Au electrodes and the channel in the BGTC structure. This phenomenon is more obvious in layered organic–inorganic perovskites, because the vertical transport of the carriers injected from the source to the dielectric interface needs to pass through the quantum well structure between the smaller-bandgap inorganic and larger-bandgap organic sheets under transistor operation.12,13 There are some solutions to reduce the bulk resistance, including the decrease of semiconductor thickness (t) and increase of channel length (L).14
Highly doped silicon wafers serving as substrates and gate electrodes simultaneously are most commonly used in the preparation of high-quality FET devices, and the SiO2 layer is formed on the Si substrate surface by a high-temperature (900–1200 °C) oxidation reaction.15 Nevertheless, due to its low dielectric constant, thinner SiO2 (less than 10 nm) can cause the penetration of charge carriers and lead to high gate leakage current, thus limiting the development of miniaturized devices. Studies have shown that the proper integration of vdW heterojunctions in the device seems to offer an opportunity to improve device performance in short-channel FETs, as a clean van der Waals (vdW) gap is an effective tunneling barrier that reduces the probability of carrier tunneling and thus inhibits gate leakage current.16 In addition, a heterojunction also facilitates hole transfer and improves device performance.17 Another limitation of the silicon wafers is their rigidity, which restricts the development of flexible devices.18 Thus, the substrate to be selected can be rigid (such as ITO glass and bare glass) or flexible (such as plastic, polymers, and paper) according to the requirement of the actual application, and it is the same for the insulation layer. Poly(methyl methacrylate) (PMMA) has been introduced into perovskite transistors as a dielectric because it can overcome the non-orthogonality issues between the perovskite solvent processing and the underlying polymers, be processed at low temperature, and has some negligible –OH groups that can help trap carriers.19,20 Poly(perfluorobutenylvinylether) (Cytop) with low surface energy induces poor wettability for any solution-processed semiconductor thin films, so it is often used as a dielectric material in a top-gate layout.20 Of course, adjusting the surface wettability of Cytop by surface treatment will be beneficial for subsequent solution processing.21 Metals that match the work function of the active channel are normally selected for the materials of source and drain electrodes, for example, Au, Ag, Al, etc. The semiconductor layer is the core component that determines the conductivity of FETs. The thickness should not exceed 100 nm since excessive thickness is not conducive to the vertical transport of carriers.22 Inorganic silicon, transition metal oxides, organic polymers, and perovskite materials have been booming in the field of FETs in recent years. Table 1 summarizes and compares these four mainstream semiconductor materials in terms of mobility, stability, processability, and flexibility. Among them, halide perovskites also take advantage of low cost, easy manufacturing, long carrier diffusion length, low defect density, high carrier mobility, strong PL intensity, etc., and are suitable for the active layer of FETs. This is also the focus of this article and will be discussed in detail below.
| Materials | Advantages | Limitations | Ref. |
|---|---|---|---|
| Inorganic silicon | High mobility | Rigid | 15 and 24 |
| Extreme stability | Opaque | ||
| Mature technolygy | High cost | ||
| Transition metal oxides | Medium mobility | Scarcity of ingradients (such as indium) | 24–26 |
| Good stablibity | |||
| Transparent | |||
| Organic polymers | Excellent flexibility | Low mobility | 27 and 28 |
| Low processing cost | Poor stability | ||
| Suitable for printing | |||
| Halide perovskite | High mobility | Poor stability | 29 and 30 |
| Low processing cost | Toxic (Pb) |
sat still can flow across the narrow depletion zone under a relatively high electric field force. Furthermore, the Vds increases continuously (Vds > Vg − Vth, Fig. 1d-iii), and the depletion zone will be lengthened and the channel will be shortened slightly. The Id remains unchanged as the Vds increases due to the existence of the depletion zone, and the working region is called the saturation region.
The working regime can be reflected in the volt–ampere (I–V) characteristic curve to better understand the working mechanism of FETs. As shown in Fig. 2a-i, the curve of Id changes with Vds at a certain gate voltage is called the output characteristic curve. The Id changes linearly when Vds is small and remains constant at a large bias. When the device is at the point of pinch-off, the output characteristics appear as the inflection point between the linear region and the saturated region. As displayed in Fig. 2a-ii and iii, the curve in which Id varies with Vg under an unaltered Vds is defined as a transfer characteristic curve. The two figures show the transfer characteristic of the linear region and the saturated region respectively, during device operation. Important performance parameters, including field-effect mobility (μ), the ratio of Ion/Ioff, threshold voltage (Vth), and subthreshold swing (SS), can be calculated based on output/transfer characteristic curves. The μ is mainly used to evaluate the carrier transmission speed, which determines the switching response speed of the device and can be extracted from the transfer characteristic curve. For the linear region, the formula
is used, where L is the channel length that is the distance between source and drain electrodes, W is the channel width that is the width of the source and drain electrodes, and Ci is the capacitance of the gate-channel. For the saturation region, the μsat is independent of Vds and can be gained via the formula
. Ion/Ioff is the ratio of the drain current of FETs in the on-state and the off-state, which reflects the switching performance of the device under a particular gate voltage. A high Ion/Ioff means higher stability, anti-interference ability, and driveability, so a higher value is desirable. The threshold voltage is the minimum voltage required for a semiconductor to form a conducting channel. The Vth is the intersection (Id = 0) of the linear part of the linear transfer characteristic curve that extends to the horizontal coordinate of Vg. The Vth in the saturation region is obtained from the Id1/2–Vg curve using the same method as above. SS indicates the switching ability between the device's on and off states. For the extraction of the SS, firstly, the Id–Vg curve is log-processed to obtain the semi-log plot (log
Id–Vg). Then, the corresponding onset voltage (Von), when the Id increases significantly, is found as the starting point of the subthreshold region, and the Vth is the endpoint. Next, the semi-log plot in the subthreshold region is fitted linearly, and the reciprocal of the slope (dVg/d(log
Id)) is SS. In conclusion, an excellent FET device should have a high mobility, a high Ion/Ioff, a low operating voltage, a small subthreshold swing, high stability, and high consistency.
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| Fig. 2 (a) Representative current–voltage characteristics of an n-channel FET: (i) shows output characteristics curves; (ii) shows transfer characteristics in the linear regime, indicating the onset voltage (Von) when the drain current increases abruptly; (iii) shows transfer characteristics in the saturation regime, indicating the threshold voltage (Vth), where the linear fit to the square root of the drain current intersects with the x-axis.32 (b) Energy-level diagram showing electron injection from the metal electrode (Al, Ag, and Au) to (PEA)2SnI4via C60.34 (c) Schematic of the energy levels in different Sn-based perovskites and electron transfer process from (PEA)2SnI4 to the molecular dopants (p-doping).7 Figures reproduced with permission from: (a) ref. 32. Copyright 2007, American Chemical Society; (b) ref. 34; (c) ref. 7. (d) Scheme of the 2D perovskite structure (n = 1) and quantum wells with type I, type II, and reversed type I energy alignment. (e) Development roadmap of representative perovskite FET mobility based on different types of halide perovskite. | ||
During the operation of perovskite FETs, charge carriers are transported through the inorganic octahedra. However, the energy band edge of perovskites and the Fermi level of the source/drain materials make it difficult to maintain unity, so the existence of an injection barrier makes carrier injection tough.12 For an organic–inorganic hybrid perovskite, electrons (n-channel FETs) or holes (p-channel FETs) also need to be injected into the band edges. Similarly, if the work function of the electrode metal is not consistent with the band edges, an injection barrier and non-ohmic contact can be introduced.32 Compared with the coplanar geometry of BGBC and TGTC, TGBC and BGTC have an interleaved geometry, so the source and drain overlap with the gate, which can provide a larger charge injection area. Other efforts have been focused on taking electrode materials with low work function or inserting carrier injection layers between electrodes and semiconductors to reduce the injection barrier.33 The LUMO level of C60 is −4.17 eV, which is between the CBM of (PEA)2SnI4 (−3.65 eV) and the EF of Ag (−4.56 eV) and Au (−4.76 eV), making electron injection easier compared with injection directly from the electrode (Fig. 2b).34 Alternatively, using low work function Al as the electrode can also relax the injection barrier. The VBM of various Sn-based perovskites with different halogens is compared with the LUMO levels of hole dopants F4-TCNQ and MoO3 in Fig. 2c.7 As the p orbitals of halogens change from iodine and bromine to chlorine, the VBM is correspondingly transferred to lower energy levels. The closer the LUMO level of the dopant is to the VBM of perovskites, the more favorable it is to extract electrons, leaving more holes to fill the trap, thus increasing mobility. In particular, organic spacer cations in the organic–inorganic hybrid perovskites separate the inorganic layers, thus forming a quantum well structure composed of organic barriers and inorganic wells.3 As shown in Fig. 2d, in type I, the LUMO and HOMO energy levels of organic components are shallower or deeper than the CBM and VBM, respectively, with very large HOMO–LUMO gaps. By extending the conjugated ligand length, band alignment between organic and inorganic parts can be adjusted to make the quantum well structure appear type II or anti-type I.11 Based on long-chain conjugated ligands, taking a selenophenol conjugated ligand to replace partly thiophene, which can be conducive to reducing the band gap of the ligand by increasing the HOMO energy level due to selenium having a larger and looser outermost electron cloud, thus can help the improvement of the orbital overlap and charge carrier mobility.35
Mobility is one of the main goals of the halide perovskite FET revolution. Fig. 2e summarizes the breakthroughs and representative works in the development process of halide perovskite FETs in the past 20 years. The performance has been greatly improved, and it is just a matter of time before it is on par with champion silicon. In this review, we briefly introduce the device structure, working principle, and performance parameters of FETs; the basic principle of MHPs, including crystal structures and band energy structures. Recent developments of 3D and 2D halide perovskites and the mechanism of temperature and other influencing factors on mobility are reviewed and discussed. Next, the causes of poor FETs’ stability of halide perovskites are analyzed, and the strategies to improve the stability are summarized. Finally, new ways and future directions to further improve MHP FET performance are outlined.
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| Fig. 3 (a) (i) BGTC TFT structure based on CsSnI3 perovskite. (ii) Transfer characteristics of optimized CsSnI3 (CsI/SnI2 = 1.25) perovskite channels processed from the Pb-substituted (10 mol%) precursor containing 7 mol% SnF2 as additive. Ig in (ii) indicates the gate leakage current.37 Reproduced from ref. 37 with permission from the Springer Nature. (b) (i) Optical photograph (1), optical microscopy image (2), and AFM topography image (3) of large-area epitaxial single-crystal CsPbBr3 thin films. (ii) A sketch of the coplanar TCTG FET structure with large-area epitaxial single-crystal CsPbBr3 thin films as a channel.41 Reproduced from ref. 41 with permission from the Wiley-VCH GmbH. (c) Transport mechanisms (ii) in the CH3NH3PbI3 perovskite structure (which is depicted in (i).47 Reproduced from ref. 47 with permission from the Springer Nature. (d) Schematic representation of the proposed polarization mechanism of mobile ionic species in CH3NH3PbI3 perovskite, under the influence of the external applied gate field (VG).51 Reproduced from ref. 51 with permission from the American Chemical Society. (e) (i) Transfer characteristics of the TFTs with MASnX3 (X = I/Br/Cl, simultaneous Br (2 mol%) and Cl (6 mol%) substitution) perovskite channel layers. (ii) Illustration of the passivation effects of a VI defect by a Cl anion.63 Reproduced from ref. 63 with permission from the Springer Nature. (f) Schematic of the optimized FPEA-modified FASnI3 FET structure. The insets show the structure of FASnI3 and the chemical structure of PEAI and F-PEAI.67 Reproduced from ref. 67 with permission from the American Chemical Society. (g) Transfer characteristics at low temperature (80 K) of the devices with Au, PEDOT: PSS, and PFBT-modified Au as source/drain electrodes (inset: FET device configuration).77 Reproduced from ref. 77 with permission from the Wiley-VCH GmbH. | ||
Compared with inorganic three-dimensional perovskites, organic–inorganic hybrid 3D perovskites are rarely used in the field of FETs, it is dwarfed by its booming development in other fields (i.e., solar cells, light emitting diodes, and photoelectric detectors), the reason behind this may be the gate field effect shielding caused by ion migration.46 Such ion migration resulting in an unusual behavior, including current–voltage hysteresis, large dielectric responses at low frequencies, and reduced effective carrier mobility, while ions accumulating at the interface between electrode and semiconductor under a long-time bias will cause the healing of vacancies and reduce contact resistance so as to rise the current.47–49 Numerous studies have been conducted on methylammonium lead iodide (CH3NH3PbI3), as it shows a very outstanding power conversion efficiency in solar cell applications, and its crystal structure is displayed in Fig. 3c-i. The inorganic components of the crystal are corner-sharing [PbI6]4− octahedron units, with CH3NH3+ cations inserted into the octahedral space as A-site cations, accompanied by 12 iodide ions. At room temperature, the CH3NH3PbI3 lattice is in equilibrium concentration of anionic (VI−) and cationic (VPb2+ and VMA+) vacancies and supports vacancy-mediated diffusion. There are three main ion transport behaviors (Fig. 3c-ii): the migration of the I− along the edge of the [PbI6]4−; the Pb2+ migrates diagonally along the 〈110〉 direction in the cubic cell units; the MA+ migrates to the vacancies of the nearby A-site cations.47,50 The polarization effect is sensitive to ion migration. As shown in Fig. 3d, when the gate voltage is applied to provide energy, the dipolar molecule cations are arranged by moving ions, thus generating electric field shielding, inhibiting the accumulation of carriers, and obstructing the channel conduction.51 The ions mainly migrate along the grain boundaries of the polycrystalline perovskites (grain boundary polarization), and further, the relatively conductive grains are isolated by the electrically insulated grain boundaries, causing enhanced space charge polarization along the grain boundaries.51,52 When the temperature changes, the crystal structure of the CH3NH3PbI3 changes from the orthorhombic phase to the tetragonal phase, which has a larger cage scale and is conducive to the movement of I− or MA+.53 These ions cause electron disturbances, trapping electrons or dispersing their motion. It has been found that doping small cations such as Cs+ can alleviate lattice strain, which roots in the size mismatch between A-site cations and lead halide cages in perovskites, and strain relaxation occurs through ion vacancy, thus inhibiting ion migration.48 The ferroelectric copolymer poly(vinylidene fluoride-co-trifluoroethylene) (PVDF-TrFE) is used as the dielectric, which is expected to overcome the problem of gate field shielding caused by ion migration. The dipole polarization in the ferroelectric dielectric layer forms a local electric field while the gate is positively biased, which can induce a higher surface charge density (7–8 μC cm−2) than MAPbI3 (5 μC cm−2), so even if the gate field shielding effect still exists, it can accumulate charge at the interface and form a conductive channel.54,55 Moreover, the FETs operating with DC bias at all three electrodes induces strong ion migration and MA+ cation polarization, but AC bias at the gate, especially at high frequencies, is supposed to hinder the ion migration and polarization of MA+, thereby improving device efficiency.49 Interestingly, the hysteresis in the current–voltage loop caused by ion migration in perovskites is detrimental to the performance of FETs but can confer artificial synaptic memory states on different time scales.56,57 The ion migration can be characterized by changing the voltage sweep rate, because the ions and charge carriers flow simultaneously at a slow sweep rate, while at a fast sweep rate, only the drift of charge carriers happens.58
Despite the limitation of ion migration, the enthusiasm for researching 3D halide perovskites based on methylamine spacer cations has not diminished. Early studies have found that the MAPbI3 TFT device has bipolar charge transfer behaviors, and mainly exhibits p-type behaviors, which enable it to absorb light energy and produce electron–hole pairs upon light irradiation.59 This interesting phenomenon makes MAPbI3 play an important role in photovoltaic systems. Yu et al. developed a vertical MAPbI3/ITO Schottky junction transistor with the injection-controlled gating mechanism that is more easily transported to the top drain after electron injection, avoids the influence of ion migration at the interface of semiconductor/dielectric layer, and the vertical channel facilitates the formation of a strong electric field at low voltage.60 Under the same conditions, mixed-halide perovskite films often show better mobility than their single-halide perovskite counterparts. On the one hand, partial chlorine substitution may play a major role in the improvement of performance, because chlorine acts as a crystallization-retarding and -directing agent to regulate the crystallization process of perovskites, and the high quality of the film is usually shown with a uniform morphology.61,62 The Br anion competes with the I anion and forms stronger coordination with metal ions, regulating the nucleation and crystallization kinetics of perovskite films.63 On the other hand, the mixed-halide perovskites tend to form polycrystals, producing low carrier scattering, and have a long carrier diffusion length of about 1 μm.64 Zhu et al. reported a tin-based mixed halide 3D perovskite (MASnX3, X = I, Br, Cl) (Fig. 3e-ii), in which the use of tin-based perovskites can significantly reduce Fröhlich interactions due to the polarity of the lead-halide bond, thereby increasing room-temperature charge-carrier mobility.63 A small amount of Br and Cl co-replacing can improve film quality and passivate vacancies. Negligible hysteresis can be observed at different scanning rates (from 0.4 to 4 V s−1), with high mobility (20 cm2 V−1 s−1), high on/off current ratio (107), and low threshold voltage (0 V) (Fig. 3e-i). The formamidine cation (FA+) as an A-site cation can be used to prepare 3D perovskites with low band gaps, such as FAPbI3 with a band gap of 1.4 eV and MAPbI3 with a band gap of 1.57 eV, and also with a small injection barrier.65 Based on the mixed-cationic FA0.5MA0.25Cs0.25PbI3 perovskite FETs, which show lower off current compared to MAPbI3, resulting in a higher on/off current ratio (about an order of magnitude improvement).66 The multi-cationic strategy also involves the addition of large organic ligands namely, on the basis of the 3D halide perovskites, introducing the organic cationic ligands used for 2D perovskites, and can realize ordered crystallization. High-performance (the μ of 15.1 cm2 V−1 s−1 and minimal hysteresis) and stable 3D FASnI3 were reported based on the additive engineering strategy (Fig. 3f), that is, adding the organic ammonium salt additive (PEAI or FPEAI) into the precursor solution to obtain a highly crystalline film with a better orientation, meanwhile adding a small amount of SnF2 to reduce tin vacancy by inhibiting the oxidation of Sn2+.67–69 It is also noteworthy that the SnF2 compensator can improve performance efficiently thanks to the hydrogen bonds between the F− and the FA+, and other counterparts such as SnI2 or Sn(Ac)2 have no hydrogen bonding assistance.68 The FPEAI-modified devices work much more efficiently than the PEAI because FPEAI can be adsorbed on the surface of FASnI3 to form a stronger Sn–I bond, forming a more hydrophobic surface, and can also passivate the defects at grain boundaries, resulting in a lower trap density.67,68 Such multi-cationic engineered high-quality films with large organic ligands can not only promote carrier transport, but also reduce the contact barrier with the top electrodes.69 Also, the band bending of Sn–Pb mixed perovskites result in a reduced band gap because the ionic radius of Sn2+ (1.35 Å) is smaller than that of Pb2+ (1.49 Å).70 One example has mixed A-site cations (Cs–FA) and mixed B-site metals (Pb–Sn), with the optimal combination being Cs0.15FA0.85Pb0.5Sn0.5I3, and exhibits a high hole mobility of 5.4 cm2 V−1 s−1 at room temperature.71 The mechanism for the inhibition of ion migration has been clarified: (1) when 25% Sn replaces Pb, there is a transition from n-type transport to p-type transport, and the negative gate bias leads to the accumulation of positively charged ions (A+ and B2+), and the mobility rate of positively charged ions is lower than that of halogen-based ions in Pb-based perovskites; (2) the optimized CsFA component mitigated MA+-induced dipolar disorder.71,72
The monocrystalline films of hybrid perovskites have better performance than polycrystalline ones in terms of carrier mobility, diffusion length, and defect inhibition. The polycrystalline thin films obtained by spin coating are not compatible with the traditional lithography process, and subsequent patterning and integrated device arrays are limited. Some studies have indicated that films prepared by physical vapor deposition usually have better quality than those prepared by solution methods, and the thickness can be precisely regulated.73 For example, MAPbI3 perovskite films prepared with the aid of low-temperature vapor deposition manifest high surface coverage, low roughness, and large grain size.74 The film deposited at a slow rate yields a low nucleation density with large grain sizes, while the film deposited at a fast rate shows a high nucleation density.33 Wang et al. deposited PbI2 and MAI step by step and selectively controlled crystal nucleation and growth by using alternate hydrophilic/hydrophobic patterns on the substrate surface to obtain a regular array of perovskite microcrystals.75 The FET transfer characteristics are n-type (high negative gate bias allows a slight p-type), and the on/off current ratio is on the order of 106. Using the space-constrained inverse temperature crystallization method to produce morphologically super-smooth top and bottom planes, results in a high-quality semiconductor/dielectric interface in the channel.76 Field-effect mobilities at room temperature are as high as 4.7 and 1.5 cm2 V−1 s−1 in p- and n-channel devices, on/off current ratios are 104 and 105, respectively, and have low on–off voltages. MAPbBr3 seems to be more prone to ion migration than MAPbI3 under similar process conditions, so relatively little research has been done on MAPbBr3. High-quality MAPbBr3 single crystal is grown with an optimized antisolvent gas-assisted crystallization method, and the conductive polymer poly(3,4-ethylenedioxythiophene)–poly(styrenesulfonate) (PEDOT:PSS) and the self-assembled single layer pentafluorophenthiophenol (PFBT) was used as the surface modification layer to eliminate the adverse electrochemical reaction between the semiconductor and the gold electrode.77 It can be observed that the on-current increases significantly, the off-current decreases, the on/off current ratio increases from 102 to 106 over that of the device with unmodified Au electrodes, and the hole mobility extracted by the transconductance method can reach ≈15 cm2 V−1 s−1 at a saturation state (Fig. 3g). The vertical field-effect transistors (VFETs) based on a graphene/MAPbBr3 single crystal Schottky junction were prepared by Left et al., which can not only shorten the channel length to extract a high carrier mobility (23.4 cm2 V−1 s−1), but also change the height of the Schottky barrier at the Schottky junction interface by modulating the gate voltage, promoting or preventing hole injection, and making the device perform bipolar transmission.78
The phenomenon that most 3D perovskite transistors exhibit field-effect behaviors and superior performance at low temperatures is related to the elimination of the shielding effect. It is still a limiting factor for the development of 3D perovskites, and the optimal solution has not yet been found. The investigations of temperature-dependent effects explain charge transfer mechanisms in the perovskite materials, which helps to better understand the relationship between mobilities and temperature. Soci and his co-workers’ research found that the transfer performance of MAPbI3 is strongly temperature-dependent.46 There is almost no gate modulation behavior when the temperature is above 198 K, the n-type transmission is displayed at temperatures below 198 K, the p-type transfer is observed at 98 K, and a bipolar transmission behavior is displayed at 78 K (Fig. 4a-i). The mobilities corresponding to different temperatures are shown in Fig. 4a-ii. It can be observed that the hole and electron mobilities increase nearly 100 times when the temperatures are lower than 198 K, which is related to the elimination of the shielding effect induced by ion migration. The MA+ cation-related phonon interaction is quenched at low temperatures. The discrepancy in mobilities is also related to the phase structures at different temperatures (Fig. 4a-iii), the calculated result shows that the mobility of the orthorhombic phases is better than that of the tetragonal phases. The work of Senanayak et al. suggests that the mobilities in different temperature regions meet distinct power-law behaviors (μFET ∼ μ0T−γ), which are closely related to the film quality.79 Specifically, the smaller particle sizes lead to a larger film mobility exponent and a higher defect concentration (Fig. 4b-i). In the dielectric mismatch spectra (Fig. 4b-ii), the characteristic relaxation frequency appears at T > 240 K, indicating that the charge transport is affected by ion migration. The inhibition of ion migration in region II is attributed to the reduction of MA+ polarization disorder, while the orthorhombic phase is dominant in region I. It is important to note that mobilities do not always increase with decreasing temperature. Fig. 4c and d-i both show the unconventional mobility-temperature dependence. In Fig. 4c, the mobility increases with the decreasing temperature, showing a power exponential relationship of μ ∼ T−2.35 in the range of 260 K to 300 K.33 The abnormal phenomenon below 260 K comes from the thermal activation of the current in the phototransistors exposed to the 473 nm laser. Fig. 4d-i shows that the expected mobility-temperature dependence did not occur in region 2, which can be explained as follows: (1) the prepared perovskite is a single crystal with low defect density and is barely influenced by defects at a low temperature. (2) With the decrease in temperatures, ion migration is weakened, and ions gather at the semiconductor/dielectric interface under the electric field. These mismatched ions can create scattering as charge impurities, resulting in the reduction of mobilities in region 2. The increased mobilities of region 1 are mainly due to the limited hindrance of phonons and ions to carrier transport at very low temperatures (Fig. 4d-ii).39 Usually, the temperature exerts a great impact on the performance of 3D halide perovskite transistors, which is not conducive to long-term development.
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| Fig. 4 (a) (i) Ambipolar transfer (top) and output (bottom) characteristics of CH3NH3PbI3 FETs obtained at 78 K. Solid and dashed curves are measured with forward and backward sweeping, respectively. (ii) Temperature dependence of field-effect electron and hole mobilities. (iii) Calculated temperature dependence of hole (red curves) and electron (black curves) mobility in tetragonal (T = 300 to 160 K) and orthorhombic (T = 160 to 77 K) phases of CH3NH3PbI3. The crystal unit cells of the two phases are shown as insets.46 (b) (i) The curves of μFET − T with different interlayers at the S–D contacts depicting three different regimes of charge transport with a power law behavior: μ ∼ μ0T−γ. Region I: inorganic cage vibrational disorder (γ ∼ 0.2 to 0.4); region II: dominated by the polarization fluctuation of MA+; region III: dominated by ion migration (γ ∼ 4.1 to 5.3). (ii) Corresponding dielectric loss measurement as a function of frequency and temperature.79 (c) Temperature-dependent transfer curves of MAPbI3/C8BTBT hybrid FETs in the dark, the inset shows a band-like behavior in the relationship between mobility and temperature above 260 K.33 (d) (i) Temperature dependence of the transistor mobility. (ii) Schematic diagram of the operating mechanism regarding the charge carrier transport.39 Figures reproduced with permission from: (a) ref. 46. Copyright 2015, Springer Nature; (b) ref. 79. Copyright 2017; (c) ref. 33. Copyright 2016, Elsevier; (d) ref. 39. Copyright 2017, American Chemical Society. | ||
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| Fig. 5 (a) Schematic diagram of the first solution-treated two-dimensional layered halide perovskite FET structure.82 (b) Schematic illustration of the lattice structure of BDASnI4 (DJ phase) and (PEA)2SnI4 (RP phase) perovskites.80 (c) Schematic of the (PEA)2SnI4 perovskite film grown on NH3I-SAM.88 (d) 2D RP phase halide perovskites featured with conjugated ligands. The side view of the (4Tm)2SnI4 crystal structure for (i) and the (TT)2SnI4 crystal structure for (ii).92 (e) 2D perovskite based on a fused ring π-conjugated pyrene-O-ethyl-ammonium (POE) ligand.93 (f) The statistical data of (BA)2(MA)n−1PbnI3n+1(S/N) TFTs for mobility. The error bars represent the SD from five individual devices.96 (g) The crystal structure of DJ phase perovskite (3AMPSnI4 and 4AMPSnI4) and chemical structure of corresponding ligands (left), the schematic of BGTC FET based on DJ phase perovskite (middle), and the transfer characteristic curves of 3AMPSnI4 and 4AMPSnI4 FETs (right).101 Figures reproduced with permission from: (a) ref. 82; (b) ref. 80. Copyright 2023, Wiley-VCH GmbH; (c) ref. 88. Copyright 2016, Wiley-VCH GmbH; (d) ref. 92. Copyright 2021, American Chemical Society; (e) ref. 93. Copyright 2023, Wiley-VCH GmbH; (f) ref. 96; (g) ref. 101. Copyright 2024, American Chemical Society. | ||
(PEA)2SnI4, as the most widely explored 2D tin-based hybrid perovskite candidate, is also looking for breakthroughs, especially in addressing low mobilities caused by carrier defects, poor film quality, contact resistance, and injection barriers. Most FET devices based on (PEA)2SnI4 are mainly fabricated using solution-processing techniques. Therefore, understanding the precursor's colloidal chemistry and crystallization kinetics is critical. Ryu et al. introduced MACl into the (PEA)2SnI4 precursor solution, which facilitated the formation of (PEA)2SnI4–MACl intermediate complexes. This approach not only mitigated the issues of undesired rapid crystallization but also enabled the large intermediate molecules to serve as nucleation sites, thereby promoting the Ostwald ripening process and the growth of larger crystalline.86 Moreover, precursor aging—a pre-treatment step for precursor solutions—has been demonstrated to be essential. Opportune aging facilitates the conversion of unreacted and aggregated large clusters in the fresh precursor into smaller, more stable colloids, thereby eliminating the poor coordination of SnI2 as well as improving both nucleation and crystal growth.87 Interestingly, high performance FET devices have also been obtained by improving the quality of the semiconductor–dielectric interface. The introduction of a self-assembled monolayer rich in ammonium iodide (NH3I-SAM) between the silica dielectric and the (PEA)2SnI4 semiconductor induces the inorganic layer to align parallel to the substrate, which facilitates more orderly crystallization and enhances carrier transport (Fig. 5c). Moreover, the composition of the NH3I-SAM eliminates excess Sn2+ that causes hysteresis, reducing the chance of carrier scattering and increasing the hole mobility to 5.7 cm2 V−1 s−1. Furthermore, the hole injection barrier was reduced by inserting molybdenum oxide (MoOx), and the polymer Cytop was replaced as the gate dielectric layer to optimize the FET devices with the TCTG structure. The optimized mobility is as high as 15 cm2 V−1 s−1.88 In a follow-up study, the (PEA)2SnI4 film was prepared by the combination of vacuum vapor deposition technology and hydrophobic octadecyl trichlorosilane self-assembled monolayer (OTS-SAM) surface treatment, while the solution method has limitations in hydrophobic surfaces.12 The contact resistance between the semiconductor layer and the source/drain electrodes will hinder the judgment of the true electrical performance of the transistors. Long-channel perovskite field-effect transistors (channel length L = 1–3 mm) help minimize the adverse effects of contact resistance and electrical polarization (i.e., ion drift or displacement in the perovskite lattice caused by an external electric field).41 To evaluate the true carrier mobility of (PEA)2SnI4 FETs, Matsushima et al. designed a device with a long channel.14 The results showed that both mobility of the p-channel and n-channel increased with the increase of L, and remained constant in the larger L region, from which the extracted hole and electron mobility are 26 and 4.8 cm2 V−1 s−1, respectively. This is because the lengthening of the L reduces the contribution of the contact resistance to the overall resistance. The p-channel and n-channel are gained via transforming metal electrodes with different work functions so that they are favorable for hole or electron injection. The mobility-temperature dependence was tested in the temperature range of 20 to −70 °C, and the results indicated that the mobility declined with the decrease in temperatures, which may correspond to a heat-activated mechanism. In most cases, the mobility-temperature dependence is inversely proportional. The layered structures of 2D perovskites inhibit ion migration to a large extent, so the reason for the increase of carrier transport capacity at lower temperatures may be that the crystal structure is frozen, so the lattice vibration is slowed down, and the lattice distortion is reduced correspondingly.89 Hu et al. found that the carrier transport mechanism is different in the high-temperature region (280–300 K) and the low-temperature region (70–260 K).90 The activation energy of the high-temperature region is one order of magnitude higher than that of the low-temperature region. The low activation energy at low temperatures sheds light on shallow defects dominating. With the increase in temperatures, most shallow traps are filled with activated carriers, but the hysteresis is more obvious, indicating that deep traps dominate in the high-temperature regions.
Recently, π-conjugated organic ligands inspired by phenylethylamine have attracted extensive attention. Bulky π-conjugated organic semiconductor ligands with a relatively larger dielectric constant in 2D perovskite can alleviate dielectric mismatch between the organic ligand layer and the adjacent inorganic octahedral frame, and can be inserted into the lattice of halide perovskites to modify the crystal structure and act as natural protective layers to improve stability. Gao et al. pioneered a 2D tin-based perovskite (4Tm)2SnI4 based on linear π-conjugated oligothiophene ligands, the FET characteristic showed an improved mobility of 2.3 cm2 V−1 s−1 compared to pure (PEA)2SnI4 without any treatment assistance.91 The side view of the (4Tm)2SnI4 crystal structure is displayed in Fig. 5d-i. There are two main reasons for the increase in performance. One reason is the presence of electrostatic interactions and hydrogen bonding between amino group and iodine, which leads to a shorter Sn–I bond length in (4Tm)2SnI4 (3.11 Å) than that in (PEA)2SnI4 (3.13 Å), as well as reduced N–I distance. Another reason is that the larger grain size reduces the number of grain boundaries, thereby decreasing defect density and suppressing ion migration. Further, for the molecular design of conjugated ligands, TT was synthesized using fused-thiophene rings with larger conjugated planes (Fig. 5d-ii). The introduction of TT molecular reduces the nucleation density, successfully regulates the crystallization kinetics of perovskite, and obtains the (TT)2SnI4 perovskite films with orderly crystallization and large grain size, the FET mobility up to 9.35 cm2 V−1 s−1 and the on/off current ratio is more than 105.92 In addition, by analyzing the crystal structure, it is found that (TT)2SnI4 has a larger bond length distortion index and a smaller Sn–I–Sn angle than (4Tm)2SnI4, and the in-plane lattice is more contracted so that the structure is more stable. Extension of the ligand conjugated planes and corresponding enhanced intermolecular interactions help adjust nucleation dynamics. Zhang et al. synthesized 2D perovskite based on a fused ring π-conjugated pyrene-O-ethyl-ammonium (POE) ligand (Fig. 5e) with large conjugated planes, and employed a high-boiling-point Lewis alkaline solvent to control crystallization.93 Larger grains have been obtained, and the resulting FET device showed excellent stability and repeatability.
2D lead-based perovskites have been less studied than 2D tin-based perovskites, which may be related to the stronger Fröhlich interactions, but it is equally important for the development of perovskite transistors.94 Tin and lead are located in the same main group, have similar outer electronic structures and ionic radii, and mixing in any proportion causes little lattice distortion. Sn–Pb mixed perovskite (PEA)2SnxPb1−xI4 can significantly improve film quality and environmental stability.95 Because the Lewis acidity of Sn2+ is stronger than that of Pb2+, the rapid crystallization of tin-based perovskite leads to poor film quality, while the Sn–Pb mixed perovskite is conducive to improving the crystallinity. The improvement of environmental stability is reflected in which the Pb–I bond is stronger than the Sn–I bond, and the [PbI6]4−octahedra do not provide I− for further oxidation of SnI2 when the perovskite degrades to generate SnI4. Qiu et al. prepared 2D lead-based halide perovskites (BA)2(MA)n−1PbnI3n+1 with different n values and used NH4Cl as an additive to induce ordered crystallization, and SnO2 as a spacer layer to improve charge injection.96 The mobility raised with the increase of the n value and shows that the champion mobility (5.73 × 10−3 cm2 V−1 s−1) at room temperature when n = 4, the on/off current ratio was 104, and the hysteresis was negligible (Fig. 5f). With the increase in the number of repeats (n value), the optical band gap and exciton binding energy decrease, which is expected to further increase the mobility of organic–inorganic hybrid perovskite transistors.82,97 The 2D perovskites (n = 1) tend to be parallel to the substrate, which is conducive to lateral charge transport, and quantum wells formed by alternating organic/inorganic layers can effectively prevent vertical ion migration. However, the vertical transport of charge is also limited due to the existence of quantum well structures. Appropriately increasing the n value to form a quasi-2D perovskite could promote vertical charge transport and further improve mobility. By mixing NMA+ (1-naphthylmethylamine cation) and FA+ to separate single, double, and multilayer inorganic octahedral planes [PbI6]4−, self-organizing multi-quantum well perovskite NMAFAPb2I7 (NFPI7) is designed to endow perovskite transistors with bifunctional characteristics, not only presenting high mobility (>20 cm2 V−1 s−1) and on/off current ratio (>106), but also showing efficient and stable infrared or near-infrared emission.98 Guo et al. compared some basic properties of 2D (PEA)2PbI4, quasi-2D (PEA)2(MA)n−1PbnI3n+1 (n = 6), and 3D MAPbI3.13 Among them, the reduction of dimension leads to smoother film, prolonged carrier lifetimes, and enhanced environmental stability; however, vertical conductivity increases as the dimensionality rises. It can be seen that quasi-2D perovskites are conducive to vertical charge transport while maintaining the advantages of low-dimensional perovskites.
The diamine cation in 2D DJ phase perovskite is directly connected to the upper and lower inorganic layers, which not only eliminates the van der Waals gap in the RP phase and weakens the quantum well effect, but also enhances the electron coupling between the layers by shortening the distance of the inorganic layers, which is conducive to the out-of-plane charge transfer. Nevertheless, little attention is given to the DJ phase perovskites. Recently, the DJ phase perovskite BDASnI4 prepared with 1,4-butanediamine (BDA) as an organic ligand showed a much lower average out-of-plane effective mass (0.159m0) than (PEA)2SnI4, indicating that electron transport in the out-of-plane direction of BDASnI4 is more favourable. The exciton binding energy of BDASnI4 (56 meV) is also much smaller than that of (PEA)2SnI4 (174 meV), which is attributed to the weakening of the quantum well effect.99 Low exciton binding energy may not be conducive to the fabrication of light-emitting devices, but efficient exciton separation and charge transport are suitable for FETs. The bandgap–temperature relationship model showcased that the band gap of BDASnI4 is dominated by thermal expansion when the temperature is lower than 140 K (thermal expansion affects the band structure by changing the lattice constant), and dominated by the electron-longitudinal optical (LO)–phonon interaction (the electron–phonon interaction affects the band structure by lattice vibration) as the temperature increases.94,99 (PEA)2SnI4 is dominated by thermal expansion below 120 K, and as temperature rises is influenced by both thermal expansion and the electron–phonon interaction. Meanwhile, the energy difference (ΔEP = EEP320K − EEP80K) between the bandgaps at 320 K and 80 K of BDASnI4 (−20.07 meV) and (PEA)2SnI4 (−64.83 meV) are calculated respectively, reflecting the contribution of the electron–phonon interaction for the temperature evolution of bandgap over a temperature range in the perovskite films. The results showed that the contribution of the interaction to BDA is small, indicating that the DJ phase perovskite has a more stable structure and weakens the heat-induced electron–phonon coupling. The advantages of the DJ phase perovskites applied to FET are analyzed from multiple perspectives, and its development is considered to be very promising. Qiu et al. proposed a strategy of coordinating alkyl ammonium salt spacers with the NH4SCN additive to regulate the crystallization process of BDASnI4 films, in which the introduction of a spacer layer helps to reduce defect density.80 The optimized film has excellent morphology, high mobility (1.61 cm2 V−1 s−1), and on/off current ratio (4.7 × 106), and the conduction current of the unpackaged FET is almost unchanged after 150 days in the nitrogen atmosphere. Some studies have investigated the odd–even effects of linear alkyl-chains spacers on charge transport. A very recent result indicates that ligands containing even-numbered alkyl chains (4, 6, or 8) facilitate the formation of layered 2D DJ phase perovskites and exhibit excellent electrical properties. In contrast, ligands with odd-numbered alkyl chains (3, 5, or 7) disrupt the formation of the 2D structure.100 Compared with aliphatic diamine cations, aromatic diamine cations have a larger dielectric constant, which can effectively reduce the dielectric mismatch between the organic layer and the inorganic layer, thus mitigating the dielectric confinement effect. Park et al. prepared 3-(aminomethyl) piperidine tin iodine (3AMPSnI4) and 4-(aminomethyl) piperidine tin iodine (4AMPSnI4) DJ phase perovskites (Fig. 5g).101 Among them, the difference in the position of aminomethyl group will form different hydrogen bond environment and affect the holistic perovskite lattice. For example, the 3-site aminomethyl-substituted perovskite has smaller layer spacing and better symmetry, so the perovskite lattice is more robust, and the saturation mobility and the on/off current ratio are better than 4AMPSnI4. For all this, the types of diamine cationic ligands used for the preparation of the DJ phase perovskites are still few. The material diversity is to be explored, and better performance of their FET devices is further expected.
In compared to polycrystalline perovskites, 2D single crystal perovskites generally show a perfect layered structure, an adjustable band gap, excellent optical properties, significantly reduce defects, and increase carrier diffusion length, which is also an indispensable part of the preparation and fabrication of perovskite FET devices. Dou et al. prepared 2D Pb-based atomically thin single crystals (C4H9NH3)2PbBr4 by a solution method, which exhibited strong light luminescence at room temperature, enriching the 2D hybrid perovskite system.102 To fabricate transistors on a single crystal (C4H9NH3)2PbBr4, the large-area single-crystalline graphene film is introduced as protective layer as well as source and drain electrodes.103 When using acetone cleans the substrate covered with single crystals, the single crystal perovskite covered by graphene is not destroyed, and then the graphene protective layer is slightly damaged by etching as the source/drain electrode, and the gap of about 100 nm is retained, the treatment process is shown in Fig. 6a. Shen et al. prepared millimeter-sized single crystal perovskite (PEA)2CsSn2I7 by incorporating Cs into 2D hybrid perovskite (Fig. 6b).8 In the FET performance test, the source–drain current increases as the gate voltage decreases, thus exhibiting p-type transmission with hole mobility up to 34 cm2 V−1 s−1 at 77 K. However, such a high carrier concentration might make the semiconductor degenerate, leading metallic characteristics, so the transfer characteristic curve cannot be fully switched off. For (PEA)2SnI4 single crystal FET, crystals were grown from the precursor solution via cooling method that was grew at −25 °C for overtnight.104 The surface was rough due to the coating residue, and the smooth crystal surface was peeled off by tape to ensure adequate contact with the electrode (Fig. 6c-ii). The champion device has mobility of up to 40 cm2 V−1 s−1 and no significant hysteresis (Fig. 6c-i and iii). The results of single crystal FETs with lower grain boundary density, smaller structural disorder, and low defects are closer to the intrinsic carrier transport characteristics of perovskite materials. However, compared with the preparation of polycrystalline thin film devices, the single crystal device is more precise and complex, usually showing low yield in fabrication.
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| Fig. 6 (a) Optical images of the growth process of 2D (C4H9NH3)2PbBr4 crystals and the transfer process of a graphene protective layer and 2D (C4H9NH3)2PbBr4 device with graphene electrodes. The scale bar of the first and the second are 50 μm, and the third and the four are 10 μm.103 (b) Schematic illustration and optical image of the crystal structure of (PEA)2CsSn2I7 perovskite and the optical image of the corresponding device.8 (c) (i) Schematic architecture of a (PEA)2SnI4 crystal FET. (ii) Optical microscopy images of the as-grown and exfoliated (PEA)2SnI4 crystals. (iii) Transfer curves were obtained in nitrogen.104 Figures reproduced with permission from: (a) ref. 103. Copyright 2016, (b) ref. 8. Copyright 2019, American Chemical Society; (c) ref. 104. | ||
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| Fig. 7 (a) Schematic showing the mechanism of iodide loss and n-type doping of perovskite and graphene.105 (b) Schematic of the perovskite FET fabrication process with the cleaning–healing–cleaning (C–H–C) surface treatment of the perovskite layer before deposition of the gate dielectric.112 Figures reproduced with permission from: (a) ref. 105; (b) ref. 112. Copyright 2020, under exclusive licence to Springer Nature Limite. | ||
An univalent cation (Cu+) is incorporated into (PEA)2SnI4 because its ionic radius (77 pm) is smaller than that of Sn2+ (118 pm) to avoid causing lattice distortion.106 The results show that cation segregation along the grain boundary, the grain boundary passivation, and CuI's excellent conductivity are beneficial to hole transport, which improves the transistor performance, with a twofold increase in the mobility and significantly reduced hysteresis. Na+ also tends to form gaps to passivate grain boundaries and improve film quality.107 The anion S2− passivates the electron defect caused by iodine vacancy via replenishing the VI, increasing the hole concentration.10 In addition, xanthate dopants, as the source of S2−, also act as nucleation sites in the films, inducing crystal growth and promoting continuous perovskite films with low surface roughness. The monovalent pseudohalide anion HCOO− is similar in size to the halide anions and has a higher chelating ability to metal ions. When it partially replaces the I− in CsFASnI3 perovskite, it can delay the perovskite crystallization process through ion exchange and improve the crystal quality and device performance.108 Metastable Sn4+ can be thermally transformed into Sn2+, and two holes (h+) are released at the same time. This phenomenon motivated Liu et al. to add deliberately SnI4 as an additive into (PEA)2SnI4 to form p-doping, and the conductivity is increased by nearly five orders of magnitude.109 With the increase of doping amount, the grain size also increases gradually. The extra I− also compensates for the iodine vacancy, so the defect density is reduced. Molecular doping is different from ion doping in that it does not replace any ions in the crystal and can control the charge or defect density without affecting the lattice or band gap.110 The large ionic radius of formamidine ion often leads to lattice strain, and it has been found that the strain relaxation of the methyl ammonium chloride (MACl) additive on the perovskite lattice can stabilize the α phase and balance the strain.111 At the same time, adding tetramethyl ammonium hexafluorophosphate (TMA-PF6) to multidentate anchors uncoordinated lead can not only regulate the morphology and crystallinity of the perovskite film, but also remove the surface defects.
In addition to eliminating the factors that destroy the stability of the FETs from the perovskite structure level, it can also be regulated during the preparation of the films. Sirringhaus and his co-workers invented a surface defect passivation method (C–H–C) by first cleaning the weak adhesion defects on the surface of the MAPbI3 film (C), then healing the halogen vacancy defects formed by the volatilization of the organic halide (H), and finally cleaning again to remove any residual ions introduced by the first cleaning step (C) (Fig. 7b).112 The combination of polar and non-polar solvents is preferred. The introduction of surface passivation technologies can effectively inhibit ion migration on the surface, and the mobility value is as high as 4 cm2 V−1 s−1 at room temperature.
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| Fig. 8 (a) Evolution of absorption spectra (top) and SEM image (bottom) of (PEA)2SnI4 films in a humid nitrogen–oxygen mixture.113 (b) Schematic diagram of the oxidation process during the preparation and operation of Sn-based FETs.114 (c) Schematic illustrations of the molecular structures of (PEA)2SnI4, PEO, PVA, and PMMA, which showing polymer-assisted defect passivation effect, and detailed illustrations of the interactions between different functional groups in the aliphatic polymers and (PEA)2SnI4.31 (d) Schematic of TGBC transistor devices with working principle, transistor mobility (μFET) as a function of the gate voltage of the neat P3HT and MAPbI3/P3HT FETs prepared with different concentrations of the MAPbI3 precursor solution (inset is the chemical structure of P3HT), and transfer curves of the MAPbI3 (0.1 M)/P3HT FETs in ambient conditions.124 Figures reproduced with permission from: (a) ref. 113; (b) ref. 114. Copyright 2023, Wiley-VCH GmbH; (c) ref. 31; (d) ref. 124. Copyright 2023, American Chemical Society. | ||
Polymers are not only excellent candidates for insulation layers, but also commonly used additives for perovskites. Multiple interactions between functional groups in the polymer and perovskite components can effectively passivate defects and improve the overall performance of transistors. As shown in Fig. 8c, when blend with the polymers (poly(vinyl alcohol) (PVA), poly(ethylene oxide) (PEO), and PMMA), the hydrogen bonds can be formed between the oxygen-containing groups and the halogen or ammonium ion from perovskites; the coordination bond would happen between the ether bond in PEO and Sn2+; and the nucleophilic addition exists between the ester carbonyl group in PMMA and the halogen in (PEA)2SnI4. Among them, the Sn–O coordination inhibits the oxidation of Sn2+, thus preventing p-type hole depletion in (PEA)2SnI4 transistor operation and realizing ambipolar transport.31,118 Some electronegative small molecules, such as cyanuric acid,119 chloromethyl phosphonic acid,120 and pentanoic acid,121 stabilize the surface Sn2+ through coordination and the localized electron density, thereby inhibiting the oxidation of Sn2+. In situ polymerization of polymer monomers in the perovskite films forms a polymer network that not only helps to bind the perovskite grains tightly, but also weaken coordination between polymer groups and the perovskite, resulting in a pinhole-free and passivated film, thereby improves the stability of the device.122
Device packaging is an important post-processing strategy to improve stability and serve as the most direct approach to inhibit film degradation. Moreover, effective packaging can accelerate the transition of perovskite FETs form the experimental stage to commercial applications. The conjugated polymer poly(3-hexylthiophene-2,5-diyl) (P3HT) is hydrophobic and protects the perovskite layers by preventing the diffusion of water molecules through the air. P3HT-encapsulated perovskite FETs exhibit a significant mobility compared with also popular Cytop-encapsulated perovskite FETs, which is attributed to the high capacitance polymer as a dielectric that can increase the induced charge carrier density.65,123,124 In addition, conjugated polymers can effectively reduce the surface trap of perovskites by passivating the A-site cations and X-site anion defects.123 In Nketia-Yawson's research work, the polymer encapsulation layer (P3HT) is processed through the orthogonal solvent, and the interface functionalization layer (IFL) can be formed on the top of the perovskites (MAPbI3) without destroying the perovskite layers, and play the role of hydrophobic protection and interface defect passivation (Fig. 8d). The MAPbI3/P3HT FETs with a perovskite-polymer hybrid channel can improve significantly mobility to 10.65 ± 0.84 cm2 V−1 s−1 (pure P3HT with a mobility of 6.22 ± 1.87 cm2 V−1 s−1), and it has good air stability, with only a slight decline in transfer characteristics after 168 hours of exposure to air.124 However, the hole mobility decreases with increasing thickness, possibly due to trapping of holes in the perovskite channels and the perovskite/IFL interface, as well as increased resistance to charge transport in the vertical direction.
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| Fig. 9 (a) Schematic diagrams of the working mechanism of the (PEA)2SnI4 transistor without ion migration (I) and the Pb-containing perovskite transistors with ion migration (II), as well as the corresponding band bending at the source/drain electrodes (III).95 (b) Schematic of the charge transport: charge trapping/de-trapping mechanism and occupation of trap states in pristine and doped-(PEA)2SnI4.7 (c) Evolution of PL spectra of (PEA)2SnI4 and (4Tm)2SnI4 thin films in air.91 (d) (i) Illustrations of carrier transport in small-grain and large-grain-based (TT)2SnI4 thin films. (ii) The chemical structures of 4TmI and TTI. (iii) AFM image and corresponding section analysis of a (TT)2SnI4 crystalline seed. (iv) PL image of the (TT)2SnI4 thin film.92 (e) Schemes for (PEA)2SnI4/semi-CNT hybrid TFTs and TFT transfer characteristics with or without semi-CNT content at a scan rate of 1 V s−1.126 Figures reproduced with permission from: (a) ref. 95. Copyright 2021, Wiley-VCH GmbH; (b) ref. 7. Copyright 2022, Wiley-VCH GmbH; (c) ref. 91. Copyright 2019; (d) ref. 92. Copyright 2021, American Chemical Society; (e) ref. 126. Copyright 2019, American Chemical Society. | ||
Current–voltage hysteresis is a great challenge for FET devices to operate continuously at the same threshold voltage.126 Sn2+ is mentioned in Section 3 as a source of hysteresis, because the accumulation of Sn2+ ions under bias reduces the number of holes in the channel by reducing the effective field strength of the gate or acting as a hole scattering center by coulomb repulsion, resulting in hysteresis.12,88 Some charge transport layers, such as ZnO, while reducing the electron extraction barrier, can also adsorb oxygen molecules and capture electrons, making their surfaces negatively charged. When these trapped electrons combine with the photo-generated holes, oxygen will be released, resulting in the current hysteresis effect.127 Other causes of hysteresis include prolonged voltage bias, defect-induced scattering, modulation of charge transport by trapping and de-trapping processes, and tunneling caused by heavy doping.34,126 Moreover, in the top-contact device structure, the electrochemical reaction between the metal and the semiconductor will be detrimental to the stability of the device, such as the oxidation of Au in MAPbBr3-based FETs (3Br− − 3e + Au → AuBr3), which is verified by high-resolution XPS and time-of-flight secondary ion mass spectrometry.77
Recent advances have been focused on improving the stability of perovskite FETs, and many improvement strategies have been proposed in terms of crystal structure, film quality, grain boundary/defect passivation, processing technology, and so on. A large number of studies have indicated that introducing large aromatic or aliphatic organic cations into two-dimensional organo-inorganic hybrid perovskites is very critical to the environmental stability of perovskites. In particular, the bulky and hydrophobic conjugated ligands not only have advantages in regulating crystal structure but also have outstanding stability for perovskite films.11,91,92 For example, (4Tm)2SnI4 thin film remained in the air for a month and maintained red photoluminescence, while (PEA)2SnI4 thin film degraded after only one night, and the PL spectra evolution of the two films in the air also confirmed this result (Fig. 9c). In general, ion migration at grain boundaries is faster, and small grains result in more grain boundaries, creating more defects and barriers for lateral charge transport (Fig. 9d-i). The reduction of grain boundaries leads to suppressed ion migration, alleviating hysteresis.66 Compared with 4Tm molecule, the TT molecule structure shows a larger conjugated plane (Fig. 9d-ii), and introduction of fused thiophene rings in the organic ligand enhance the intermolecular interactions, thus (TT)2SnI4 thin film showed morphology with large grain size, and exhibited decent stability in both crystal structure and environment (Fig. 9d-iii and iv).92 Moreover, optimizing the fabrication process is also an effective way to obtain large grain sizes. For organic ligands with larger molecular weight, increasing the annealing temperature is not only suitable for the recombination of organic and non-organic groups in the precursor but also helpful for increasing crystallinity and grain size.91,92 When chlorobenzene is used as antisolvent, ethanol with a higher boiling point is added at the same time, the morphology of the film can be adjusted to obtain a high-quality film with a single grain size of 5 μm, and compared with pure chlorobenzene as antisolvent, the film has fewer pinholes and higher coverage. This is because the polar ethanol could dissolve the excess reactant precipitated upon the addition of chlorobenzene.113,128 The binary solvent system, combined with chlorobenzene and ethyl acetate as the antisolvent in the spin-coating process, can promote nucleation and directional crystallization as well as improve the quality of the film, and ethyl acetate is relatively environmentally friendly.129 Thermal spin coating is also an effective means to increase grain size, and its effect on the performance of FETs is the synergistic result of temperature and grain boundary.130 The migration of defect-state ions is mainly concentrated at the grain boundary, which is inhibited at low temperatures and promoted at high temperatures. The thermal spin coating results in a large grain size and less influence of temperature on the properties. The roughness of the films annealed at low pressure is smaller, which is conducive to the reduction of the contact resistance between the semiconductor and the electrode.131
The embedded conjugated polymer-wrapped semiconducting carbon nanotubes (semi-CNTs) have a natural transmission channel, so coupling them with low-dimensional perovskite (PEA)2SnI4 is equivalent to opening up a “green channel” for carrier transmission, reducing the capture and scattering of carriers.126 The results suggest that (PEA)2SnI4 doped with semi-CNTs has significantly reduced current–voltage sweep hysteresis and enhanced operational stability, and has the lowest trap density (2.06 × 1011 cm−2) when the doping amount is 10% (Fig. 9e). The sorted single-wall carbon nanotubes (95% s-SWCNTs) doped into the mixed-perovskite (MA1−xFAx)Pb(I1−xBrx)3via a solution method can improve the on/off current ratio by four orders of magnitude (up to 107) compared to the unsorted ones, and the mobility is up to 32.25 cm2 V−1 s−1.132 In addition, there are van der Waals and Coulomb force interactions among carbon nanotubes, the ionic components, and solvent molecules in the precursor solution, and the inherent dispersibility of the nanotubes makes the film uniform and continuous without pinholes. Thus, the reduction of defects and charge scattering results in an improved performance.
2D/3D perovskite films, prepared by mixing a small amount of 2D perovskites in 3D perovskites, generally exhibit better crystal orientation, resulting in higher crystallinity and improved stability. Moreover, 2D/3D perovskites appear to be less affected by grain boundaries and pinholes because charge transport primarily occurs in the inorganic octahedral layers between 3D grains near the substrate, and the electrical coupling between grains is sufficient to support carrier transport with little effect from pinholes.133 For example, FPEA ligands are doped into 3D FASnI3, and due to their large dipole moment, the resulting 2D/3D perovskite tends to grow parallel to the substrates. It enhances transverse carrier transport, resulting in significantly improved hole mobility (12 cm2 V−1 s−1) and on/off current ratio (>108), with increased operational reliability and environmental stability.134 Furthermore, a small amount of Cs is added based on FPEA to passivate defects and regulate ordered crystallization. The FETs with low-defect channel interfaces created by the three-cation project show high hole mobility (70 cm2 V−1 s−1).135
Zhu and co-workers reported a series of common strategies for improving the performance and stability of transistors (Fig. 10a).136 The first is the self-passivation strategy, that is, excess precursor components (i.e., PEAI) are used to fill the grain boundaries, reducing the capture of charge carriers by defects. When the mole ratio of PEAI to SnI2 reaches 2.4, the transfer characteristics of FETs are improved obviously (Fig. 10b). FPEAI was also introduced in Chao et al.'s study to self-passivate grain boundaries through surface recrystallization and improve stability significantly due to FPEAI's hydrophobicity more than PEAI's.137 Self-passivation in this work also involves the addition of elemental tin powder to inhibit the oxidation of Sn2+ by the redox reaction. The same self-passivation strategy can also be accomplished with iodized metal salts. When the conventional annealed film is applied to further DMF solvent annealing, the residual MAI and PbI2 will form MAI:PbI2:DMF solvate with DMF, thus eliminating the adverse effects of PbI2 accumulated at the grain boundaries, passivating the grain boundaries, reducing vacancy-mediated ion migration, and thus enhancing the charge transport.62,138 The second is grain crystallization engineering. Different from the large grain size achieved by Gao et al. through regulating organic ligands, the focus of this work is to study the formation and decomposition of PEAI·SnI2·Lewis-base (i.e., DMSO, GBL, and NMP) intermediates during the crystallization process of perovskites.91,92 Compared with DMSO, urea has a higher boiling point and larger dipole moment, which can better enhance the passivation effect of Lewis intermediate and promote grain growth.139 Other research groups have also focused on the passivation of grains by solvents. The use of diethyl sulfide (DES) as an additive in the MAPbI3 precursor can react with Pb2+ to form a strong intermediate chelate complex, and it is easier to obtain high crystallinity perovskite thin films with good environmental stability. At the same time, AlOx with high capacitance as the dielectric layer can achieve stable operation at the low operating voltage, with an average saturation mobility of about 18.8 cm2 V−1 s−1 (the highest measured value is 23 cm2 V−1 s−1).140 The solvent combination of DMF, DMSO, and HI is considered suitable for the formation of thin films in air. Among them, HI promotes uniform nucleation, DMF has a low boiling point and high vapor pressure, and the strong Lewis base property of DMSO can induce strong coordination with Pb2+, which leads to rapid crystallization of the film and the formation of the large grain size.116 The results show that the device performance in air is better than that in nitrogen, and it is speculated that water and oxygen in air also contribute significantly to defect passivation. The third is to use the passivation effect of trace oxygen on iodine vacancy to achieve p-doping, to improve the performance of (PEA)2SnI4 (p-channel) FETs. The charge density calculated by DFT sheds light on the mechanism of iodine vacancy passivation. The charge density is delocalized when there is an iodide vacancy defect, and localized when the iodide vacancy is occupied by oxygen molecules (Fig. 10c). Besides, reproducibility is also an important indicator for the fabrication of FET devices using the solution method, and it is closely related to every sub-process in the preparation process. Zhu et al. have reported a detailed and reproducible method for fabricating high-performance halogenated tin perovskite thin-film transistors based on solution engineering.141 This approach provides an important tutorial manual for standardizing fabrication processes and effectively addresses reproducibility challenges.
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Fig. 10 (a) Schematic diagrams of self-passivation by adding slightly excess PEAI, anti-oxidation engineering by Sn powder, halide element effect, grain crystallization control by an adduct approach, and device. (b) Transfer characteristics of perovskite TFTs made from precursors with different mole ratios PEAI : SnI2 = X : 1, X = 1.6, 2.0, 2.4, and 2.8, respectively (VDS = −40 V). (c) Iodide vacancy and oxygen molecule occupying the iodide vacancy (isosurface level of 0.09).136 Figures reproduced with permission from: ref. 136. Copyright 2020, Wiley-VCH GmbH. | ||
In organic and inorganic hybrid perovskites, especially the design of organic molecular ligands in 2D perovskite can diversify materials as well as achieve targeted device performance improvement. The emerging “OSiP”, known as organic semiconductor-incorporated perovskites, offers vast opportunities for tailoring the energy landscape, carrier dynamics, and transport properties. Through the molecular engineering strategy of substituents and heteroatoms to control the ligand planarity, intra/intermolecular interaction, and energy level, it is expected to achieve the regulation of physical properties, processing properties, and carrier transport types. In general, applying conjugated organic molecules as ligands in 2D perovskites is conducive to construct large crystalline regions, so as to alleviate the capture of carriers by defects at the grain boundaries (Fig. 11a-i). Meanwhile, the large crystalline region is also a natural domain limited platform. The variation of the conjugated planes will also be reflected in HOMO/LUMO energy levels, and it is possible to achieve bipolar carrier transport when suitable energy level structures are deliberately designed. Introducing conjugated polymers is the most direct and effective way to increase the number of conjugated planes, but the polymer as an organic ligand has great challenges in either in situ polymerization or crystal structure integrity. Besides, the doping strategy applied in halide perovskites is very useful for the intentional engineering of carrier density, so most studies use the direct mixing method, which also seems to play a role in the passivation of grain boundaries. However, it is often confused with the passivation of additive engineering, making it difficult to truly understand the purpose of doping. Given this, it is meaningful to clarify the definition and method of doping in future research.142
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| Fig. 11 Schematic diagram of optimization of high-quality perovskite thin film field-effect transistors. (a) The strategy of macrocrystalline perovskite regulated by organic ligands for (i), the strategy of multi-dimensional perovskite heterojunction for (ii), the strategy of multi-ligands “alloy” perovskite for (iii), and the strategy of mixed RP and DJ phase perovskite for (iv). (b) The strategy of passivation interface with polymers. (c) The potential application of perovskite FETs in artificial synapses.146 Reproduced from ref. 146 with permission from the Wiley-VCH GmbH. | ||
Mixed-dimensional vertical heterojunction (such as 2D/3D and 1D/3D heterojunction) is a new method to combine the advantages of different dimensional perovskites without considering the phase distribution of low-dimensional perovskites and has outstanding advantages in promoting ordered crystallization (Fig. 11a-ii). Inspired by the design philosophy of mixed halide perovskite FA1−x−yMAxCsyPbI3−zBrz, we assume some ligand alloy systems on the basis of the structure of 2D perovskites could also bring some opportunities. For instance, the phenylethylamine in (PEA)2SnI4 is partially replaced by the thiophene ligand (thiophenethylamine) with a similar ligand length to form a new perovskite (PEA1−xTEAx)2SnI4, and the crystallization process is expected to be regulated by controlling the ligand content (Fig. 11a-iii). Realization of Janus structures in 2D perovskites is challenging yet worth trying using ligand alloy strategies. Mixed RP and DJ phase 2D perovskites are another possibility (Fig. 11a-iv), their energy level structure and bandgap can be adjusted via regulating the proportion between RP and DJ phase ligands. Compared with single RP or DJ phase perovskites, mixed phase perovskites have the advantages of both structures, showing better stability and higher carrier mobility.
For the preparation of high-quality perovskite field-effect transistors, it is not solely necessary to pay attention to the development and innovation of perovskite materials, but also to solve the contact problem between the semiconductor layer and the electrode or insulation layer. As mentioned above, the interface between the source/drain electrode and the semiconductor determines the carrier injection efficiency when the FET is operating, while the interface between the semiconductor layer and the insulator layer determines the carrier transmission performance. Modifying the source/drain surface could reduce the contact resistance through adjusting the electrode work function, meanwhile SAMs can help prevent electrochemical reactions at the electrode/perovskite interface upon biasing of the devices. However, in the process of source/drain interface modification, a problem that needs to be attended to is corrosion of electrodes, which also needs to be avoided. The optimization of the insulation layer interface is mainly to decrease the defect intensity, lessen the interface polarization, and induce ordered perovskite films. Polymers having abundant natural functional groups, good solution processing properties, are competitive candidates for promoting grain boundary healing and regulating crystallization (Fig. 11b). As an interface functionalized layer, conjugated polymers allow the use of a high-capacitance electrolyte dielectric in perovskite FETs, enabling excellent gate modulation with low driving voltages. Conjugated polymers can not only passivate interface defects, but also provide additional carrier transport pathways, or form a multi-dielectric layer structure to gain excellent dielectric performance and controllable film thickness.124 We assume it is highly possible to realize high mobility as well as operational stability through interfacial functionalization of perovskites using conjugated polymers. Natural polymers like cellulose are rich, environmentally friendly, and low-cost. Due to its good mechanical properties and chemically inert nature, cellulose that can stabilize the crystal structure; its high toughness can resist crack growth; its rich functional groups can passivate defects; and its long chain has a good ability of grain boundary positioning. Therefore, using cellulose to optimize the interface is also a good choice. It also can contribute to the dielectric constant of the insulation layer.143–145
At the same time, the accurate extraction of mobility is also acritical challenge. The actual charge transport process is affected by complex factors, likely phonon scattering, ion migration, polarization disorder, hysteresis, contact resistance, and dynamic scattering, so the high mobilities reported in many reports are likely to be overestimated.62 In the presence of large contact resistance, the inherent mobility can only be obtained at high voltage; therefore, to obtain accurate mobility, linear fitting should be performed at high voltage.62 The mobility of a MAPbBr3 single crystal FETs extracted by the transconductance method is 15 cm2 V−1 s−1 (effective mobility is about 10 cm2 V−1 s−1), and the confidence factor is about 88.7%.77 In general, there are differences between μlin and μsat of the same device, and the μlin is lower than the true value, which may be related to the charge transfer involving the trap state.147 The existence of hysteresis leads to a deviation in the calculation of mobility.8 Therefore, the accurate extraction of mobility is of great significance to the evaluation of FET performance. Firstly, we need to define a standard that the expected carrier should be extracted when there is a linear relationship (σ = μen) between carrier density (n) and conductivity (σ), that is, both linear and saturated regions of the transfer characteristic curve need linear dependence, and it is inaccurate to extract mobility only in a very limited linear range.148 Then, the following suggestions are made to improve the reliability of device mobility. The use of a vertical field effect transistor (VFET) may help reflect the intrinsic mobility because the vertical current is not dependent on the surface defect.78 Moreover, this structure is conducive to realizing short-channel devices, increasing current density and the carrier extraction rate, and decreasing the carrier scattering rate.149 The smoother surface of the film, the lower probability of carrier scattering, and the preparation of high-quality films is also the premise to ensure accurate mobility.110 Reliability factor correction for non-ideal characteristics to obtain accurate mobility is recommended.98 Moreover, the pattern processing is carried out to make the channel width and length close to the defined values, in order to eliminate the influence of redundant channels and fringe effect, so as to obtain the real carrier mobility.150 If necessary, Hall effect measurements can also be performed to confirm estimated mobility values.
Halide perovskite FETs usually exhibit significant hysteresis, which may originate from ion migration, charge capture, and ferroelectric effects. Lots of efforts have been made to mitigate this phenomenon. Interestingly, the hysteretic behaviours become valuable properties for an artificial synapse, which require gradual modulation of responses, resembling flexible regulation of charge conductance and retention of synapse in neural networks (Fig. 11c). For example, the (PEA)2PbBr4/C8-BTBT heterojunction films displayed conversion of various synapse behaviours under electron or light stimulation.151 The incorporation of (PEA)2PbBr4 induces trap states, resulting in the heterojunction FET displaying more significant anticlockwise hysteresis compared to the pristine C8-BTBT device. At the same time, halide perovskites can provide efficient light signal perception and conversion capabilities for artificial synapses. Coupled with the rich material system and relatively simple preparation process of halide perovskites, we expect that the utilization of halide perovskite FETs for artificial synapses has a bright future.
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