TiO₂/nanoporous silicon hybrid contact for heterojunction crystalline solar cell

Abstract

The conventional solar cell architectures include a p–n junction of c-Si sandwiched by rear and front contacts. The conventional approach features a complex as well as expensive procedure. Here, we propose a new architecture for p–n heterojunction solar cells prepared by a simple and cost-effective procedure. In this regard, (1) a silicon wafer underwent surface treatment through electrochemical anodization. To prepare a stick junction, (2) photoactive TiO₂ nanoparticles were deposited over the porous layer by electrophoretic technique. Finally, (3) indium tin oxide (ITO) was sputtered. During the fabrication steps, we examined various anodization times ranging from 6 to 12 min to study the electrical behavior of the proposed device. Current–voltage measurements revealed higher performance for the 6 min sample, with a short circuit current density and open circuit voltage of 29.632 mA cm⁻² and 0.5 V, respectively. Also, morphology study showed uneven surface over the fabricated sample. Measurement of the optical properties showed potential anti-reflection surfaces. However, the 6 min sample, with an average reflectance of 1.9%, proved to be the competitive one. In addition, absorption data revealed a band gap of 1.38 eV for the 6 min sample, which is broader than that of others. Also, PL measurements explain the effective charge transfer for the lowest duration of anodization.

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1. Introduction

Today, renewable energy, especially solar energy, is being explored as a remedy to the global energy concerns. Although scientists have reported several architectures of solar cells, crystalline silicon (c-Si) solar cells are dominant. Silicon, as the most abundant element in the earth's crust, is an essential component in electronic and optoelectronic devices such as solar cells due to its wide range of properties, such as capability in electron–hole generation and electrical conduction. Regarding the fabrication process of c-Si solar cells, p- and n-type silicon are considered a great failure.¹ This process is conventionally carried out through the ion diffusion method and employs abstruse processes as well as several complex installations. Although several efforts to address these issues have been reported, the complex operation in the production of these devices remains a challenge. In most cases, efficiency may influenced by these flaws.

With regards to efficiency, novel materials and methods have recently been introduced to improve performance. Amongst these, porous silicon (PS) and titanium dioxide (TiO₂) could be considered for employment in c-Si solar cells and dye-sensitized solar cells, respectively.

PS has a large amount of pores and is made in crystalline silicon substrate. PS is used for many applications^2–5 and is produced by etching treatment. The etching treatment could be carried out through several methods, such as photo-etching, stain etching, electrochemical etching, etc. Amongst these, electrochemical anodization (EA) has been defined as an appropriate approach.⁶

Due to numerous pores, PS is characterized by a large surface area compared to the non-porous substrate; this obviously affects light interaction. Study of the photoluminescence (PL) spectrum revealed that crystalline silicon, as an indirect semiconductor, shows very weak signal in the range of 600–1100, compared to non-porous wafer.⁷ In addition, it has been demonstrated that the light emission characteristic significantly improves in the case of PS. Moreover, measurements using the quantum confinement model proved that a heterojunction between PS and silicon could be significant.⁸

The antireflection property of several coating layers and structures has been proven;^9,10 however, that of PS is more considerable amongst them. Menna et al. fabricated porous polycrystalline silicon (PPS) using chemical etching method. They examined the porous structure over the polycrystalline wafer and demonstrated a great antireflection layer. They reported that 0.5 μm thickness of PPS could lead to an effective reflectance coefficient, R_eff, of lower than 5% in a wide range of wavelengths (350–1150 nm).¹¹ Also, numerical simulation shows that the optimal multilayer PS is capable of obtaining 95.2% of the energy transferred to the silicon substrate. In other words, a lost energy of 4.8% is recognized, while twice this value was obtained in conventional antireflection coating (ARC) made of SiN.^12,13 PS compared to other commercial ARC such as single-layer SiO₂ and double-layer ZnO/TiO₂ demonstrated 3 and 2.5 times higher efficiencies, respectively.¹⁴ Also, it was demonstrated that the internal quantum efficiency may be significant for PS-equipped solar cells, especially in short wavelengths (λ < 600 nm).¹⁵ These studies assert that PS can be considered an important component in the architecture of optoelectronic devices, especially solar cells.

Apart from PS, due to its promising chemical properties,¹⁷ photocatalytic activity, and electron collection property,¹⁶ TiO₂ has been employed in solar cells. From the viewpoint of photocatalytic activity, it possesses one of the largest recombination times,¹⁷ especially for the high ratio of anatase to rutile.^18,19 This may come from properties of the anatase phase, which include a higher band gap as well as the slow recombination of photo-generated electron–hole pairs.^18,20 Recently, scientists have revealed that the dye-sensitized solar cells based on pure anatase result in higher short circuit current density (J_SC) with equal open circuit voltage (V_OC), compared to that composed by pure rutile.^20–23 However, it has been proven that the composite crystalline phase (ratio of 75 : 25 for anatase : rutile) leads to higher photocurrent.²⁴

Heterojunction solar cells have been developed as a remedy to the low-performance devices. The heterojunction often is introduced for polymer-based solar cells;^25–28 it may be due to the tandem architecture of organic-based devices. However, silicon heterojunction solar cells have also been considered for many years.²⁹ Yamamoto et al. proposed a μc-Si/c-Si (microcrystalline silicon/crystalline silicon) as a p/n heterojunction solar cell.³⁰ They examined (100), (110), and (111) CZ-Si (monocrystalline silicon grown by the Czochralski process) and found that the highest V_OC of 0.579 V could be achieved by μc-Si/multi-crystalline silicon solar cells. Fujiwara et al. fabricated another type of heterojunction solar cell as a-Si:H/c-Si (hydrogenated amorphous silicon/crystalline silicon) p–i/n system.³¹ They optimized the performance of the cell through a trade-off in thickness of the p–i layer junction. They demonstrated that as the p–i contact thickness increases, the V_OC and fill factor (FF) increase, while the J_SC decreases. Finally, they obtained the conversion efficiency of 16.1% with the optimized thickness of a-Si:H. Further study was conducted using computer simulation of a-Si/c-Si solar cell equipped with a transparent conductive oxide (TCO).³² The characteristics were calculated with different work functions of TCO. The results showed the direct correlation of TCO work function and a-Si/c-Si heterojunction performance. The conversion efficiency of 21.8% was achieved with the optimized work function.

In the case of solar cell architecture, as far as we know, the reports have been limited to the passivation and light assessment performance, not the constituents. This paper identifies a novel as well as simple method to fabricate p–n junction solar cells. The preparation is carried out without complex process and installation, using porous silicon and TiO₂ nanoparticles.

2. Experimental details

In all experiments, n/p polycrystalline Si wafers with thickness of about 330 μm and resistivity in the range of 0.5–1.5 Ω cm were used. The porous layers were formed on n-type layer with a thickness of 10–15 μm. The electrical contact for electrochemical etching was achieved by evaporation of 250 nm Al film on the p-side layer.

2.1. Porous silicon fabrication

EA, as its name suggests, prepares chemical media for the etching process using an electrochemical cell. The electrolyte used for electrochemical anodization of the polycrystalline silicon consisted of an ethanolic-based solution of hydrofluoric acid (40%) and deionized water (DI) in a given volume ratio (40% HF : EtOH : DI H₂O; 1 : 1 : 2).

EA process was carried out at 10 mA cm⁻² with a time range of 6 min to 12 min and steps of 2 min (due to experimental limitation, we could not examine further lengths of time). The electrochemical process was established continuously, employing a direct current.

In addition, we fabricated a porous sample using the same procedure under condition of on-off circuit (6 s on-circuit and 3 s off-circuit). During this process, both types of prepared samples were illuminated on the front face by a 40 W halogen lamp at a distance of 40 cm to ensure sufficient minority carriers. After the anodization process, each sample was rinsed with DI water.

Consumption of acid during anodization results in decreased concentration of hydrofluoric acid near the etching centers.³³ This phenomenon may produce some shortcomings in the PS fabrication process. For comparison, a set of porous samples were supplied using an on-off control board to study the effect of alternative current (AC) during the EA process.

PS samples were used as a template to immobilize the TiO₂ nanoparticles (NPs) with the help of an electric field. The electrophoretic process was operated under given conditions. TiO₂ NPs (Evonic P25) were dispersed in the solution of acetone (trace) and 60 ml isopropyl alcohol, then ultra-sonicated for 1.5 h. Electric field was applied between the PS template (working electrode) and platinum (counter electrode) in the colloidal solution. The deposition process was defined under electrophoretic potential and time of 300 V and 10 min, respectively. The electric field was applied, using two parallel plates, at a distance of 30 mm. After deposition, the samples were heated at 100 °C in vacuum for 1 h to ensure better immobilization.

Charge extraction structures were implemented due to carrier transfer before recombination. In this regard, after electrophoretic operation, the samples were treated by indium-tin oxide (ITO) sputtering. This operation was set at the current and voltage of 350 mV and 200 mA, respectively. Meanwhile, Ar was released at a pressure of 6 × 10⁻³ mbar. The samples underwent sputtering process for 1 h using direct current magnetron mode.

2.2. Characterization

The current density–voltage (J–V) measurements were performed employing the Autolab PGSTAT302N potentiostat/galvanostat, and light source was provided by a solar simulator, Luzchem, with a calibrated power meter (part number LZC-PMV) to ensure 100 mW cm⁻² illumination (AM 1.5 G) and a calibrated Si-reference cell certificated by NREL (National Renewable Energy Laboratory). All the products were masked during the J–V measurements (active area of about 0.38 cm²).

For justification of the J–V behaviours of the samples, some analytical tests were done. A field emission scanning electron microscope (TESCAN, Mira 3-XMU) was used to study surface and cross-section morphologies. Varian Cary Eclipse fluorescence spectrophotometer was used to measure the photoluminescence. The instrument was calibrated with a reference silicon solar cell prior to measurements.

3. Results and discussion

Consider the results of pulsed current during the EA process, prior to solar cell characterization.

It seems that the electrochemical etching setup equipped with a pulsed-current system assists in the nanopore formation. Also, this condition improves uniformity on both size and localization. In addition, consecutive pulse driving forces can compensate the decreasing etching rate during the anodization process. Decrease in etching rate has been ascribed to the H₂ bubbles that come from the reduction of hydrofluoric acid. A control board treats the problems by passivation of bubbles and supplying fresh HF; thereby, etching will follow by a rich solvent.³³ In fact, a turbulence in acid concentration profile is observed near the etching center.

The degree of porosity increases as current intensity increases.³⁴ The direct current (current exertion without any delay) results in a higher degree of porosity through continuous etching, compared to alternative current. However, this comes at the expense of uniformity.

FESEM characterizations were carried out to study the effect of morphology of the samples under both on–off and continuous current at a given anodization time. The images were considered as a reference for choosing the best current mode.

Fig. 1(a) and (b) show the top- and cross-section of the sample prepared under on–off mode, and Fig. 1(c) and (d) show those of the sample prepared by continuous current.

Fig. 1 Top and cross view images of poly-porous silicon under different current modes: (a) and (b) alternative current, (c) and (d) continuous current.

The heavy etching in on–off current mode is palpable, compared to the constant current one. A wide range of pore sizes (9–110 nm) are distributed over the porous surface (Fig. 1(a)), while in the case of the constant current sample, its elongated cracks are defined over the surface relatively regularly. Generally, in on–off mode, pores are arranged in two classes: large and small. According to our previous work,³⁵ the formation of small pores (9–20 nm) is attributed to the on–off board, and the large ones (90–110 nm) refer to several grain boundaries that have been distributed over the surface. These boundaries serve as hot etching centers. A comparison of thickness, shown in Fig. 1(b) and (d), proves this claim. The thickness of the porous layer produced in continuous mode is about half of the other one.

As mentioned earlier, the on–off current mode translates into high-density porosity, which in turn suggests that the substrate has provided a broad surface area for subsequent treatments. However, it should be noted that this structure is prepared as a substrate for the n-type semiconductor. On the other hand, due to low mobility of holes, the thickness of the n-type substrate should not exceed more than given threshold (some microns); thus, the thickness should be reduced as much as possible. Clearly, this property defines the short carrier pathway and reduces recombination. Hence, the alternating current may not satisfy the requirements.

There is another reason to prefer the constant current. Heavy etching causes detrimental local effects through deep pores that degrade the initial junction. Still, some positional junctions, just under the pore sidewalls, have been preserved.

Another point is that the matter loaded onto the surface can sink into the pores, and this may restrain the efficient interaction of light and the equipped system. Thereby, we pursue the experiment by the sample fabricated by continuous current mode.

As described in ESI (S1),† our proposed hybrid solar cell is based on porous silicon and TiO₂ NPs, in which sputtered ITO layer is used as the front electrode, p-type silicon is devised as the base, PS is employed as broad scaffold for immobilized TiO₂ components, and deposited NPs serves as the emitter. Another point in this architecture is the ARC. As far as we know, TiO₂ paste is employed as a conventional ARC in the c-Si solar cell with industrial-scale usage. On the other hand, it was stated that PS could be capable in this regard, too. Thereby, the simultaneous use of these structures may lead to strong ARC through synergic effect.

Fig. 3 explains the hierarchical steps for fabricating the proposed hybrid solar cell. Our target could be summarized as facilitating p–n junction fabrication as well as making a hybrid model of silicon-nanostructure solar cells.

Fig. 2 Surface analysis of samples (a) after EPD, (b) top view and (c) cross view after sputtering.

Fig. 3 Hybrid solar cell fabrication steps.

Surface activation before each process has a great effect on the integration of the interface. It also prevents disorder in carrier transfer, which in turn may lead to reduced series resistance through enhancement in the mobility. Deposition of TiO₂ over the PS template was achieved by proper selection of electrophoretic potential, since the method is sensitive to particle size. Also, optimizing the deposition time helps prevent the formation of over layers, as the particles in the over layers would not have proper electrical contact with the substrate.

A typical J–V curve of ITO/TiO₂/PPS/PS solar cells is shown in S2.† The linear behaviour of this curve translates to relatively low fill factors of the proposed solar cells. In fact, the local poor junction between the deposited n-type semiconductor and porous substrate has resulted in high series resistance in the p/n system, especially for longer EA duration. The detailed PV parameters of the devices are shown in Table 1.

Table 1 Photovoltaic parameters

Item	JSC (mA cm^−2)	VOC (V)	FF (%)	η (%)
6 min sample	29.63	0.5	26.5	3.92
8 min sample	23.69	0.496	26.17	3.07
10 min sample	22.91	0.495	26.06	2.95
12 min sample	10.93	0.412	23.33	1.08

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The solar cell fabricated with 6 min of anodization demonstrated the highest efficiency of 3.92%, while the devices prepared under 8, 10, and 12 min showed efficiencies of 3.07, 2.95, and 1.08%, respectively.

The 6 min sample also exhibited the highest V_OC of 0.5 V, the highest J_SC of 29.632 mA cm⁻², and the highest FF of 26.5%. As it has been assigned (S2†), the 8 and 10 min samples demonstrated close performance. It seems that there is a transition in the performance of these systems. This can be attributed to the pore structure, which is a decisive factor toward the carrier transfer model. Although a higher depth in the 10 min sample has resulted in some buried junctions through a high degree of immobilization, at least the carrier transfer models play a detrimental effect. In fact, the low diffusion coefficient in the TiO₂ NPs³⁶ suggests that the carriers are likely to recombine. On the other hand, light etching of the 8 min sample resulted in a short carrier pathway. The point that is more considerable is that the longer etching time of the 10 min sample resulted in greater surface area of the nanopore sidewall. This introduced more defects and free dangling bonds, even after NPs were deposited, which may form hot recombination centers.

We compared (S3†) the results of photovoltaic parameters for the proposed ITO/TiO₂/PPS/PS solar cells. S3† may initially suggest that anodization is harmful for this architecture. Generally, this statement may not be confirmed. As mentioned, there is a transition for anodization time between 8 and 10 min. For anodization time that exceeds the transition region, there is a significant decrease in parameters. This could be ascribed to the intense etching process, and consequently, proposed defects, thereby several recombination centers may form in the interface. In this regard, high series resistance and low fill factor may achieve, as S3† confirms significant decrease in FF for 12 min.

Overall, as the etching time decreases, the parameters increase. However, for low anodization time, the increment rate decreases, especially for FF, and the values are more moderate. This suggests a quasi-stable architecture.

Later, the surface reflection and absorption data are considered. A preliminary modelling based on those data revealed that for the anodization time of ∼5 min, a considerable absorption and less than 0.5% reflection could be achieved. Also, the band gap exceeds that of the 6 min anodization, which in turn leads to improved creation of electron–hole pairs.

Overall, the key role of porous silicon with regard to the introduction of uneven substrate (and consequently uneven surface of the deposited TiO₂ layer) should not be neglected. It enhances the optical properties such as antireflection, light trapping, photoluminescence characterization, and band gap broadening, which could not be ignored. Moreover, the porous substrate broadens the surface area for deposition of TiO₂ species, thereby extending the junction area. In addition, improvement of the rectifying behaviour of porous silicon has been demonstrated. However, for the anodization time far from optimized value (anodization time ∼ 5 min.), the EA is destructive, and the possible defects may partially mask the above advantages.

Fig. 2 shows FESEM images of samples during EPD and the sputtering operation. During EPD process, TiO₂ NPs have been significantly deposited on the surface; however, some of the NPs have been embedded on the porous template.

However, annealing, as a post-treatment, causes the growth of cressets that appear as direct-specific crystalline arrays. Fig. 2(a) shows the surface characterization after EPD process (EPD-porous). Directions have been specified by the substrate and change in different regions over the substrate. Fig. 2(b) exhibits the surface morphology of samples after sputtering of ITO. As illustrated, the ITO layer covers the surface of TiO₂ crystals, and there are some cracked regions inserted among the grown crystals. Fig. 2(c) displays the cross view of the samples, which shows the slightly planar surface of the ITO deposited and continuous white shell. However, interface of EPD-porous structure and white shell demonstrates that the sputtered ITO has gone down beneath the structure. This provides the extraction agents close access to p–n junctions, thereby assisting in the quick collection of photogenerated carriers; consequently, they are less likely to recombine.

One of the major challenges associated with solar cells is ascribed to the loss of incoming light through reflection.³⁷ To decrease the portion of light reflected, several approaches have been examined over solar cell architectures. These treatments mostly included (1) employing ARC such as silicon nitride, titanium dioxide, etc.; (2) using surface texturing, such as porous silicon, to collect light by multiplying the internal reflections.^38–40

We introduced an ARC that benefits from both approaches.

For a better evaluation of the ARC, the effective reflection coefficient, R_eff, may be found as a proper criterion. It is the average value of the reflection coefficient at each wavelength, λ, weighted by the number of photons, N(λ), in the solar spectrum (AM 1.5) at that wavelength:¹¹

The standard spectral AM 1.5 distribution has been chosen for N(λ)d(λ). The R_eff from the eqn (1) are given for silicon substrate and competitive porous samples (Fig. 4). AM 1.5G solar energy spectrum is also presented in Fig. 4 for comparing the matching conditions between the reflective spectrum and the useful solar energy range. Compared to bare Si-substrate, the reflection spectra of ITO/TiO₂/PS devices demonstrate the potential of ARC for achieving low reflection in a broad range of wavelengths. The lowest reflectance of 0.5% was obtained by the 6 min sample, with the average of 1.9%. The average values of reflection were derived to be 5.6 and 7.8% for the 8 and 10 min samples, respectively.

Fig. 4 Reflective spectrum.

Fig. 4 shows two significant peaks that explain the following: (1) the porous structure causes significant reduction in the average reflection. This could be found by comparing the average reflection of bare (38.9) and porous samples. (2) The spectra of 8 and 10 min samples demonstrate relatively good agreement with each other. However, the 6 min sample shows considerable improvement over others. This suggests a curtailed point in the degree of porosity.

Band gap broadening has been proven in the case of PS.⁴¹ Since we examined four anodization times, the band gap widening may be different. The optical response of the proposed systems were investigated, and the results were plotted as a function of incoming photon energy.

Fig. 5 Absorption spectrum (top) and optical response for porous samples (bottom).

Fig. 5 shows a broadband absorption extended in the whole spectral region with a maximum absorbance of 441, 424 and 402 nm, at the border of UV and visible regions. However, it is clear that the maximum shifts to a lower wavelength and lower absorption strength with the reduction in anodization time. Again, the consistency of 8 and 10 min samples are recognized.

The optical band gap of the composite film (an apparent quantity) was calculated by Tauc's eqn (2):^42,43

(αhν)ⁿ = k(hν − E_g) (2)

where hν is the photon energy, and n is a parametric constant that takes the values 2 and 0.5 for indirect and direct allowed inter-band electronic transition, respectively.⁴⁴ k is a constant, E_g is the optical band gap, and α is a frequency-dependent quantity, the so-called absorption coefficient; its values can be found through Lambert's law (eqn (3)):where A is the absorbance (A = −log T), and l is the film thickness (l ∼ 3, 4.5, and 5 μm for 6, 8, and 10 min, respectively).

Fig. 5 (bottom) shows the variation of (αhν)² as a function of the energy (hν) for the porous samples. The band gap energy was found to be 1.47, 1.28, and 1.19 eV for the 6, 8, and 10 min samples, respectively.

This value is quite close to the optimum band gap energy for the solar cells and is appropriate for the application of solar cells with high conversion efficiency.⁴⁵

Generally, TiO₂ is an n-type semiconductor, and its band gap is estimated to be ∼3.2 eV.¹⁷ Here, porous silicon is supposed to be a p-type semiconductor with a given band gap of E_g eV. However, the remaining sidewalls are n-type, and p–n junctions are partially distributed over the surface. Thus, a heterojunction is formed between TiO₂ and porous silicon as TiO₂ immobilizes into the pores of silicon. Fig. 6 shows the typical energy band structure for the resulting heterojunction. We examined the rectification of silicon/titanium that was prepared by the same procedure. The measurement revealed that very poor results could be achieved. This phenomenon is attributed to the position of the silicon and titanium band structure. It has been proved that the etching process broadens the silicon band gap;^41,46 i.e., the E_g increases. Thus, the anodization process improves the rectification approach, and the band structures would be arranged as illustrated in Fig. 6. Generally, the offset of valence bands (ΔE_V) and conduction bands (ΔE_C) for the proposed structure is so that there would be a barrier that prevents holes in the PS flowing to the TiO₂; also, this alignment allows electrons from silicon to flow through TiO₂.

Fig. 6 Energy band structure diagram for proposed architecture.

Regarding the TiO₂/PS heterojunction in detail, TiO₂/PS may offer a great characteristic with regard to blocking the minority carrier from recombination. It seems that the rate of recombination of minority carriers is significantly reduced. This is attributed to the interface phenomena. We studied the photovoltaic parameters of pristine silicon wafer (10.8 mA cm⁻², 323 mV, 16% and 0.55% for J_SC, V_OC, FF, and η, respectively) and proposed an architecture without TiO₂ (12.34 mA cm⁻², 400 mV, 20% and 0.95% for J_SC, V_OC, FF, and η, respectively). We found that the V_OC and also J_SC for TiO₂/PS could be considerable compared to the device without TiO₂. Clearly, it was ascribed to the minority carrier profile being controlled by deposited TiO₂. Ken et al.⁴⁷ stated that for a fixed voltage, the hole-barrier layer resulted in the significantly lower dark current; this reduction may boost the V_OC. Also, the higher J_SC for the device equipped with TiO₂ could be correlated to the number of carriers collected by the solar cell. It was proved that the potential of TiO₂ to reduce hole recombination could be considerable.⁴⁷ Also, further evidence could be considered through the lifetime concept. The lifetime of holes is inversely correlated to the recombination velocity occurring in the junction. Sahasrabudhe et al.⁴⁸ demonstrated that the interface of TiO₂/Si is comprised by Si–O–Ti bonding. The presence of Si–O–Ti functions significantly reduces the recombination velocity, due to the hole-blocking property.

Also, we measured the photoluminescence spectra (S4†) for the proposed solar cells.

The emission peaks indicate that the amount of non-radiative recombination in the sample is negligible. The broadening of the PL peaks is due to the phonon coupling within the TiO₂ crystal structure.⁴⁹

In order to examine the influence of different anodization durations on solar cell performance, we investigated the PL spectra of the 6, 8, and 10 min samples. As shown in S4,† strong PL quenching of silicon was observed at the etching duration of 6 min. This may be attributed to the efficient charge transfer at these sample interfaces. Indeed, due to lower charge transfer resistance in the interface of the TiO₂ nanoparticle layer and the etched silicon substrate, the PL response becomes significant. The PL quenching in the 8 and 10 min. Samples offer almost the same pattern, but with lower intensity for 8 min, suggesting that the different etching times have no notable effects on the charge transfer mechanism but substantially affect the rate of carrier mobility. In fact, the PL spectra obviously display a clear dependence on etching degree. The PL signal of the systems provided in the low anodization duration exhibit stronger quenching compared to others. This is due to the efficient charge transport; i.e., the interface of silicon substrate and metal oxide layer, and consequently the metal oxide and conductive oxide, has been modified in such a way that the heavily etched samples introduce higher charge transfer resistances. Charge transfer pattern may substantially affect the conversion efficiencies, individually. With this approach, regardless of any other measurements, it is expected that higher charge transfer resistances lead to lower performance; this is illustrated in ESI (S2).†

In fact, the defined junctions and defects control the charge transfer rate. Also, the porous structure has been defined as a substrate for n-type semiconductor. The deep pores lead to a thicker emitter, while the carrier mobility does not change. The PL patterns presumably come from the undesired recombination of photo-induced charge carriers due to high travel distance.

4. Conclusion

In summary, through comparing the surface characterizations of samples, it was found that TiO₂ nanoparticles deposited over PS surface and subsequent thermal treatment might result in high-level immobilization and thermal treatment of the metal oxide nanoparticles. Also, the assessment of EA process duration indicated that the 6 min duration could result in higher performance. Moreover, optical characterizations revealed the high potential of the 6 min sample.

Clearly, the proposed system benefits from porous silicon as well as TiO₂ as strong ARCs. In turn, it can generate numerous pairs of electron holes and, thereby, high performance. However, heterocontacts between the PS surface and TiO₂ nanoparticles, which may define several interface defects, lead to hot recombination centers. In this regard, detrimental effect on the performance could be recognized through a low FF. Clearly, the architecture developed in the proposed model may compete with the performance of conventional materials.

5. Precaution

Hydrofluoric acid is very dangerous. It is volatile and very corrosive when exposed to glass. It should be kept in a closed plastic container. Individuals should use filter-equipped masks when handling this substance.

Notes and references

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Footnote

† Electronic supplementary information (ESI) available. See DOI: 10.1039/c6ra07165a

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