The effect of small pyramid texturing on the enhanced passivation and efficiency of single c-Si solar cells

Abstract

In this work, a simple method to form small random pyramid texturing (0.5–2 μm size) is proposed to enhance the surface passivation of commercial p-type Cz-Si wafers. Small pyramid texturing was generated with chemical nano-masking for anisotropic etching. The surface recombination velocity obtained after the passivation of the thermal oxide layer reduced from 65 and 10 cm s⁻¹ for the large pyramids (10–15 μm size) and small pyramid (0.5–2 μm) texturing respectively. The solar cell fabricated with large pyramid texturing resulted in an efficiency of 17.82% with a current density (J_SC) of 36.91 mA cm⁻², an open circuit voltage (V_OC) of 620 mV whereas small pyramid texturing resulted in an efficiency of 18.5% with J_SC of 37.6 mA cm⁻² and V_OC of 628 mV. The low surface recombination velocity increases the V_OC by 8 mV. The small pyramid textured wafers are found to enhance the quantum efficiency performance in both short and long wavelength regions.

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1. Introduction

Silicon solar cells retain their predominant position in the photovoltaic industry due to their excellent properties and established infrastructure for production. The textured surface in the high-performance silicon solar cell is of major importance, which has effective broad-band antireflection and internal light trapping effects. However, the world record for the highest silicon solar cell open-circuit voltages in excess of 720 mV is from Sandia National Laboratories with polished thick thermal oxide passivation.^1,2 The increased surface area of the textured surface, degrades the passivation quality since it is very difficult to passivate (1 1 1) silicon planes. Removal of the textured surfaces in the PERL structure can increase the open-circuit voltage of about 10 mV.^2–6

Texturing the surfaces of silicon wafer is one of the promising ways for enhancing the efficiencies. The texturing process reduces the surface reflection loss through photon trapping, thereby increasing the short circuit current of solar cells,⁷ however, the passivation effect degrades. Single-crystalline silicon solar cells are generally textured with random pyramids, which are produced by etching in an alkaline solution such as KOH or NaOH,^8–13 K₂CO₃,¹⁴ Na₂CO₃,¹⁵ TMAH.^16–18 Irena et al., have reported the effects of different alcohols added to alkaline solutions to study the etching characteristics. The alcohols with one hydroxyl group exhibited similar effect as isopropyl alcohol (IPA) which caused strong reduction of etch rate whereas the alcohols with more than one hydroxyl group did not influence the etching anisotropy and caused deterioration of surface.¹⁹ The N₂ gas passed along with wet chemical etching solution at 80 °C results in uniform pyramid formation.²⁰ This is made possible by the orientation dependent nature of these etching solutions, in conjunction with an appropriate choice of the crystal plane orientation at the wafer surface. Such pyramids are produced by anisotropic etching, which is caused by the difference in the etching rates of the planes in the (1 0 0) and (1 1 1) directions.²¹

Though there are, many studies related to the random pyramid texturing, scarce report is available on the pyramid size control mechanism. The objective of this work is to control the size of the textured random pyramids and analyze the anisotropic etching mechanism, for effective light trapping to achieve highest thermal oxide passivation. Sodium silicate (Na₂SiO₃) chemical was used as an effective nano mask for anisotropic etching and the small pyramid textured surface is generated. To understand the texture mechanism and thermal oxide passivation effect of the anisotropic etching with sodium silicate and isopropyl alcohol for small pyramid texturing, 3D modeling by computer simulation is used. Finally, the conventional silicon solar cell is fabricated with different texturing surface.

2. Experiments

Silicon wafer texturization

The present study was carried out on a 12.5 cm × 12.5 cm, boron-doped solar-grade single crystalline as-cut wafer with a thickness of 200 μm and a resistivity of 1–3.5 Ω cm. The texturing process was carried in two steps. As a first step saw damage removal was carried out by 12 wt% sodium hypochlorite (NaOCl) and 40 wt% NaOH in 1 : 1 ratio and the solution was kept under the temperature of 85–90 °C. The wafers were rinsed in the flowing DI water followed by HCl and HF to remove the metal ion and native oxides. Finally, the wafers were rinsed again in the flowing DI water and were dried. The etching depth of the wafers were measured using electronic balance by the following equation,

Etching depth (cm) = etching weight (g)/silicon density (g cm⁻³)/wafer area (cm²)/2

The resistivity of the wafers were measured using four point probe following equation,

Resistivity (Ω cm) = sheet resistance (Ω sq.⁻¹) × wafer thickness (cm)

Wafer thickness (cm) = wafer weight (g)/silicon density (g cm⁻³)/wafer area (cm²)

The second step was to produce straight upright small pyramids on a freshly prepared damage free surface. After a thorough rinse in flowing DI water, the wafers were etched in a general texturing solution consisting of 2 wt% NaOH and 12.5 vol% IPA at 81–83 °C. Na₂SiO₃ varying from 0 to 25 wt% was added to the general texturing solution to control the textured pyramid size. The wafers were etched for a desired period of 15 min and the etching rate was calculated from the following equation,

Etching rate (μm min⁻¹) = etching depth (μm)/time (min)

The sample designated as set A was etched without Na₂SiO₃ while the set B and C were etched with different Na₂SiO₃ concentrations added to the general texturing solution. The samples were etched for various time and etching depth. The etched wafers were rinsed in the flowing DI water followed by HCl and HF and then the reflectance was measured. The reflectance of the samples was analyzed using an IPCE (Incident Photon to current Conversion Efficiency) measurement system, QEX7 in the wavelength region of 300 nm to 1100 nm. The etched wafers were analyzed using Scanning Electron Microscope (SEM) to determine the nature of etching.

Surface passivation analysis

To analyze the surface passivation effect, silicon di oxide (SiO₂) was thermally grown in an oxidation furnace at 900 °C processing temperature for 30 min. For hydrogen passivation the wafers were annealed with mixture forming gas (H₂ : Ar = 15 : 85) for 20 min at a temperature of 450 °C. The effective minority carrier lifetime (τ_eff) was determined with microwave photo conductance decay technique by means of QSSPC (Quasi-Steady State Photo Conductance) using WCT-120 silicon wafer lifetime detector (Sinton Consulting Inc.). The surface passivation effect can be understood by surface recombination velocity (SRV) and it can be calculated from the lifetime measurements with the following equationwhere W is the wafer thickness, and τ_flat is the measured polished surface carrier lifetime.

Solar cell fabrication

After surface treatment (saw damage removed, small pyramid, middle pyramid, large pyramid), solar cell fabrication were carried out. The emitter layer was formed by phosphorous diffusion using POCl₃ as source material at 810 °C for 20 minutes. After the phosphorous silicate glass removal and chemical edge isolation using InOxide (RENA), emitter layer resulted in the sheet resistance of 85 ohm sq.⁻¹. A silicon nitride anti-reflection (AR) coating was deposited on the front side of wafers using plasma-enhanced chemical vapor deposition with a refractive index, n = 2.1 and thickness 80 nm. Screen printed metallization was carried on front and back surface using standard silver and aluminum paste. The samples were then baked at 150 °C followed by co-firing in a conveyer belt furnace. The temperatures at different zones of the furnace were 450, 500, 600 and 940 °C. The solar cells were tested (PASAN cell tester CT801) by I–V measurements under illuminated conditions (AM1.5G) condition at 25 °C.

3. Result and discussion

To understand the anisotropic etching mechanism, with different etching rate and chemical weight ratio with respect to Na₂SiO₃ concentration was studied as depicted in Fig. 1(a). At constant temperature, the etching rate depends on the concentration of solution and the masking effect of the Na₂SiO₃. As the ratio of Na₂SiO₃ increases, the relative concentrations of IPA, NaOH and DI-water decrease and hence the etching rate decreases. The Na₂SiO₃ on the surface, acting as a random mask for the effective pyramid texturing, also causes the decrease of etching rate. For Na₂SiO₃ with 0 to 10 wt%, the etching rate slope is −0.03351 μm min⁻¹ which is due to the increase in Na₂SiO₃ concentration and random masking coverage on the surface. For Na₂SiO₃ with 15 to 25 wt%, the etching rate slope is −0.00902 μm min⁻¹ and this decrease in etching rate is attributed to the increase in Na₂SiO₃ concentration. In this region the Na₂SiO₃ concentration completely covers the entire area of the surface with uniform masking. When the Na₂SiO₃ concentration was varied from 10 to 15 wt% we observed a transition region for the etching rate with mix up of random and uniform masking. It is speculated that the amount of Na₂SiO₃ on the surface acting as mask for pyramid texturing is large enough to get saturated and does not decrease the etching rate any longer. Set A represents the random pyramid texturing. Set B represents the random small pyramid texturing and set C represents the small pyramid texturing. The reflectance of the samples, set A (without Na₂SiO₃), set B and C (with Na₂SiO₃) with respect to etching depth is shown in Fig. 1(b). The random pyramid texturing of set A, resulted in etching depth of 3.6 μm with reflectance of 28% which is attributed to the non-uniform pyramid. As the etching depth increases, the pyramid size increases, the uniformity increases and hence the reflectance decreases.

Fig. 1 (a) Etching rate and chemical weight ratio with respect to different sodium silicate (Na₂SiO₃) concentration (set A without Na₂SiO₃, Set B and C-Na₂SiO₃ with different concentration) (b) reflectance spectra of the textured samples with different etching rate (set A, B & C with etching rate of 0.6, 0.25 & 0.1 μm min⁻¹ respectively).

The variation of the size and uniformity of pyramids of set A is shown in Fig. 2(a). A minimum reflectance of 14.6% with etching depth of 22 μm was achieved. The small pyramid texturing of set C, resulted in etching depth of 0.67 μm with reflectance of 28% which is attributed to the uniform nano-scale pyramid size. As the etching depth increases, the pyramid size increase and hence decrease in the reflectance which is depicted in Fig. 2(c). A minimum reflectance of 14.5% with etching depth of 5.9 μm was achieved. The random small pyramid texturing of set B, resulted in etching depth of 2.68 μm with reflectance of 23% which is due to the non-uniform nano-scale pyramids from both set A and set C. As the etching depth increases, the pyramid size increases, the uniformity increases and hence the reflectance decreases which is depicted in Fig. 2(b). A minimum reflectance of 13.6% with etching depth of 13 μm was achieved. The results of set A, B and C from Fig. 1(b) and 2 shows that adding Na₂SiO₃ makes it possible to form nano-scale pyramids with low degree of etching and low reflectance. Fig. 3 represents the reflectance measured before and after the texturing. The minimum reflectance for set A, B and C was 14.49%, 13.58% and 14.57% respectively in the wavelength region of 300 nm to 1100 nm. The formation of nano-scale pyramids by the action of Na₂SiO₃ can be explained by the etching mechanism and pyramid forming mechanism.

Fig. 2 SEM images of the textured samples (a) without Na₂SiO₃ with etching rate of 0.6 μm min⁻¹ (b) Na₂SiO₃ with etching rate of 0.25 μm min⁻¹ and (c) Na₂SiO₃ with etching rate of 0.1 μm min⁻¹.

Fig. 3 Average reflectance of the textured samples with different pyramid sizes.

Fig. 4(a) shows a schematic model of (1 0 0) surface etching with NaOH concentration. Initially NaOH reacts with H₂O and releases OH⁻ ion which reacts with silicon and form Si–OH bond. With addition of IPA, silicate glass dehydration reaction takes place. The two unreacted hydroxyls left on the two linked silicon atoms are brought much closer together to form a vicinal pair.^21–25 When such a gel is subjected to pyrolysis to form an oxide glass, some reactions due to structure and properties of the gel will occur as well as further dehydration polymerization. The reactions are as follows: (1) the carbonization of residual organic groups; (2) the formation of micropores resulting from the oxidizing of formed carbon into carbon dioxide; (3) micropore collapse; (4) the possible desorption of absorbed water from the micropore walls. Any one of these reactions can yield either thermal or mechanical stress in a gel resulting in the onset of fracture. To prepare a monolithic glass by a low temperature process, it is therefore necessary to know the temperature ranges where respective reactions occur, in order that the gel may be heated slowly or maintained at a temperature until the reactions are completed. During the above reactions, information on the development of Si–O–Si dehydration polymerization bonding can be obtained by infra-red spectroscopy. Fig. 4(b) shows a schematic model of (1 0 0) surface etching at SiO₃²⁻ concentration. Etching with low or without SiO₃²⁻, SiO₃²⁻ is formed at low concentration. As the etching amount is increased, it acts as a random mask. Finally, large etching amount and small mask result in the formation of large random pyramid texture. However, when the concentration of SiO₃²⁻ is high, the mask on the surface is formed uniformly. This nano mask formed by the sodium silicate, acts as an nucleation seed for pyramid formation and the high density of the sodium silicate results in uniform small pyramid with reproducibility. The etch rate becomes very low and the small random pyramid texture is formed with a small amount of etching. When the etching is continued even after the formation of small pyramids, the (1 1 1) surface gets etched removing the mask and the pyramid size gets increased.

Fig. 4 Schematic model of (100) surface etching (a) with NaOH concentration and (b) with SiO₃²⁻ concentration.

Fig. 5 shows the plot of surface recombination velocity dependency on the resistivity for different texture pyramid sizes, using symmetrical thermal oxide passivation. As shown in Fig. 5, the wafers textured with the large pyramid (10–15 μm), the SRV is influenced with the wafer resistivity and resulted in the highest SRV of 65 cm s⁻¹. However, with decrease in pyramid size, lowest SRV of 10 cm s⁻¹ was recorded. The better passivation effect obtained with smaller texture pyramid size can be attributed to the predominant (100) crystal orientation.

Fig. 5 Surface recombination velocity (SRV) with different pyramid size and different resistivity wafers.

3D simulation of 12s (s = 1.9198 Å) unit pyramid is carried out to understand the passivation mechanism. Fig. 6 shows the A-type bond of [1 0 0] plane and B-type bond of [1 1 1] plane and these are quantized in Table 1. The same process is repeated with different pyramid sizes. As seen in Table 2, the number of B-type bond of [1 1 1] plane increases more than the number of A-type bond of [1 0 0] plane as the pyramid size increases. Fig. 7 shows the number of A-type bond in [1 0 0] plane and the number of B-type bond in [1 1 1] plane as the pyramid size is varied. In other words the number of B-type bond in [1 1 1] plane gets relatively smaller than the number of A-type bond in [1 0 0] plane as the size of pyramid gets smaller. It is reported elsewhere that, for thermal oxides the fixed oxide charge (Q_f) and interface trapped charge (D_it) depend on the crystal orientation and they are larger for Si (1 1 1) than for Si (1 0 0). The (1 1 1) crystal orientation of Si–SiO₂ interface has more isolated silicon dangling bonds which has to be effectively passivated for better passivation. To elude the difficulty the (1 1 1) orientation of the textured surface has to be reduced. Thus with reduction in the pyramid size, the (1 0 0) crystal orientation is predominant which effectively passivated the silicon surface and the SRV of the passivated small pyramid structure reaches a similar value as that of the polished surface.

Fig. 6 3D simulation of 12s (s = 1.9198 Å) unit pyramid is carried out to understand the passivation mechanism.

Table 1 Total number of unpassivated textured surface with (a) A-type bond of (1 0 0) plane atoms (b) B-type bond of (1 1 1) plane atoms

Position of unpassivated texture surface A-type bonds (x axis, y axis)						z axis	Counts
7, 6						1	1
1, 12	3, 12	5, 12	7, 12	9, 12	11, 12	9	6
1, 1	1, 3	1, 5	1, 7	1, 9		10	5
Total A-type bond (1 0 0) plane atoms							12

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Position of unpassivated texture surface B-type bonds (x axis, y axis)										z axis	Counts
7, 5	7, 7									2	2
6, 5	6, 7	8, 5	8, 7							3	4
6, 4	6, 8	8, 4	8, 8							4	4
5, 4	5, 6	5, 8	9, 4	9, 6	9, 8					5	6
5, 3	5, 9	7, 3	7, 9	9, 3	9, 9					6	6
4, 3	4, 5	4, 7	4, 9	10, 3	10, 5	10, 7	10, 9			7	8
4, 2	4, 10	6, 2	6, 10	8, 2	8, 10	10, 2	10, 10			8	8
3, 2	3, 4	3, 6	3, 8	3, 10	11, 2	11, 4	11, 6	11, 8	11, 10	9	10
Total B-type bond (1 1 1) plane atoms											48

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Table 2 Quantized values of the variation in the A-type and B-type bonds of (1 0 0) and (1 1 1) plane atoms respectively with different pyramid sizes

Number of s (spacing) s = 0.00019198 μm	Unpassivated texture surface atoms		Ratio	Unit pyramid size (μm)
	A-type bond	B-type bond	A : B
6	6	6	1 : 1	0.00115188
8	8	16	1 : 2	0.00153584
10	10	30	1 : 3	0.0019198
12	12	48	1 : 4	0.00230376
14	14	70	1 : 5	0.00268772
16	16	96	1 : 6	0.00307168
18	18	126	1 : 7	0.00345564

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Fig. 7 Unpassivated textured surface atoms with A-type bond (1 0 0) plane atoms and B-type bond (1 1 1) plane atoms as a function of pyramid size.

Solar cell performance with different texturing

Fig. 8 shows the results of the I–V measurements. It is obvious that, owing to the enhanced passivation effect, with low reflection, the cells fabricated with small pyramid texturing shows the better results than the cells fabricated with middle and large pyramid. It is well known that the passivation effect of the silicon wafer influences the V_OC. From the results of Fig. 5 we can observe that the sample with small pyramid texturing has the highest lifetime, i.e. best passivation by reducing the recombination of the photo-induced carriers. The V_OC of the cell fabricated with polished and small pyramid is of 628 mV, whereas for the cells fabricated with middle and large pyramid texturing is 618 and 620 mV respectively. A similar V_OC obtained with small pyramid texturing reveals that the passivation effect is improved as that of polished surface. The J_SC measured from the I–V curve improved from 35.16 mA cm⁻² for the polished surface to 36.91, 37.5 and 37.6 mA cm⁻² for the large, middle and small pyramid texturing respectively. This increase in J_SC for the small pyramid texturing is attributed to the enhanced light absorption. From the EQE curves of Fig. 9 it is evident that, solar cells fabricated with small pyramid texturing had higher efficiencies on the carrier collection, than that of the middle and large pyramid device over the entire wavelength range. The EQE gives the direct measurement of J_SC. The slight variation in the J_SC between the measured (I–V) and the EQE is due to difference in the spectral match. From Fig. 3 it can be seen that, all the textured surface has the similar reflectance. The reduced recombination at the interface improved the QE of the solar cell.

Fig. 8 Performance of the silicon solar cells for different pyramid size.

Fig. 9 External quantum efficiency (EQE) curves of silicon solar cell prepared with different pyramid size.

4. Conclusions

In order to enhance the light absorption and thermal oxide passivation for high efficiency solar cells textured random pyramids with controlled size were carried out. The small pyramid textured surface generated by using Na₂SiO₃ as a nano mask for anisotropic etching showed a similar reflectance (14.5%) as 10–15 μm sized textured wafers. With increase in resistivity from 1.6 to 3.4 Ω cm, the SRV of 10–15 μm sized textured was about 65 cm s⁻¹ whereas for the small pyramid it was from 10 cm s⁻¹ after thermal oxide passivation. With small pyramid texturing, the [1 1 1] crystal orientation with more dangling bonds is reduced and as a result, lowest surface recombination velocity was recorded. The cell fabricated on the small pyramid textured wafer showed an enhanced external quantum efficiency in entire spectrum with better surface passivation.

Acknowledgements

This research was supported by the Ministry of Trade, Industry & Energy (MOTIE), Korea Institute for Advancement of Technology (KIAT) through the Encouragement Program for the Industries of Economic Cooperation Region and this work was also supported by the Human Resources Development program (No. 20144030200580) of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government Ministry of Trade, Industry and Energy.

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