Shanmugam Parthiban and
Jang-Yeon Kwon
School of Integrated Technology and Yonsei Institute of Convergence Technology, Yonsei University, Songdo-dong, Incheon, 406-840, Republic of Korea. E-mail: jangyeon@yonsei.ac.kr
First published on 30th April 2014
Amorphous carbon-incorporated indium zinc oxide (a-CIZO) thin-film transistors (TFTs) were fabricated at room temperature using radio frequency sputtering and post-annealing. The structural, surface, and optical properties were studied of the as-deposited and the post-annealed a-CIZO thin-films. X-ray diffraction and high-resolution transmission electron microscopy analysis confirmed the amorphous nature of the as-deposited and post-annealed a-CIZO thin-films. The root mean square roughness was measured ranging between 0.5 to 0.8 nm for the as-deposited and post-annealed a-CIZO thin films. The average transmittance ranging between 400 and 800 nm was observed for over 85% of the as-deposited and post-annealed a-CIZO thin-films. The estimated band gap varied in the range between 3.88 and 3.99 eV after post-annealing. The a-CIZO TFT post-annealed at 150 °C exhibited a saturation field-effect-mobility of 16.6 cm2 V−1 s−1, on/off current ratio of 107, subthreshold swing of 0.68 V per decade, and negligible hysteresis (0.4 V). The effects of the post-annealing temperature improved the performance of the a-CIZO TFTs.
A few reasonable mechanisms have been suggested to improve the stability against the bias-stress of oxide-based TFTs, including trapping of photo generated hole carriers, the creation of ionized oxygen defects, and photo-desorption of oxygen related molecules.6–11 The trapping of photo generated hole carriers can be controlled with a proper di-electric and passivation layer,4 and the creation of ionized oxygen defects and photo-desorption of oxygen can be controlled by doping as a carrier suppressor with a strong bonding strength between the carrier suppressor and the oxygen.12–17 To achieve such the strong bonding strength of dopants, Hf, Zr, Ta, W, and Si have been incorporated in oxide TFTs, and these have shown high stability when compared to a-IGZO TFTs.4,12–17 A clear mechanism has not yet been suggested to enhance the μ of the AOS TFTs. However, transparent conducting oxide (TCOs) thin-films have been able to enhance the μ using a high Lewis-acid-strength (L) dopant. The high L dopants have been suggested to improve the μ of TCOs, and those of Ti, Ge, Zr, and Mo doped indium oxide TCOs have been found to have a high μ and to be superior in performance than commercially available indium-tin-oxide TCOs.18–20
The mobility of AOS TFTs can be improved by doping them as carrier suppressors using high-L dopants. Zr, Hf, Si, Ta, W, and Ti have been incorporated in In–Zn-O to suppress carrier concentrations in order to improve the performance of TFTs.12–17 In–X-O matrices (where X = Mg, Al, Ga, Si, Ti, W, Ge and B) have also been incorporated.21 Among carrier suppressors, Si-doped AOS TFTs have shown higher performance than a-IGZO TFTs at low processing temperatures, and the reason for that could be two-fold higher L of Si4+ than that of Ga3+.14
Carbon was chosen as a carrier suppressor in this work to verify the role of L in the fabrication of a-IZO TFTs. Among the materials studied, elemental carbon (C) has a high L of 32.917, Z/r2 of 44.444, and a bonding strength between carbon and oxygen of 1076.5 kJ mol−1, which are the desired properties to enhance the μ and stability of TFTs.22,23 In addition, the effects of the post-annealing temperature on a-ICZO TFTs have also been investigated.
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Fig. 1 XRD patterns of a-CIZO thin-films of the as-deposited and post-annealed at different temperatures. |
In Fig. 2(a)–(c), the HR-TEM images and the fast Fourier transform (FFT) patterns clearly indicate that a-CIZO films are uniformly grown on the SiO2 substrate, and that the material showed an amorphous phase. Fig. 2(d)–(f) show AFM images of the surface of a-CIZO thin films with respect to post-annealing temperature. The AFM image shows smooth and uniform surfaces where the root mean square roughness (RMS) values were observed to range between 0.38 and 0.82 nm. The post-annealing temperature reduced the RMS of the roughness of the a-CIZO surface and left it almost flat. The ability to achieve such a high degree of flatness is very important in the fabrication of TFTs with thin active layers (15 nm) with another significant consideration being the cost of the materials that needs to be minimized, rather than using a thicker active channel layer.
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Fig. 2 (a–c) HRTEM and FFT, (d–e) AFM (scale 2 μm × 2 μm) images of the a-CIZO thin-film of the as-deposited and the post-annealed at 150 and 300 °C. |
Fig. 3(a) shows the O 1s peak of the as-deposited and post-annealed a-CIZO thin-films. The data, deconvoluted using a Gaussian profile, exhibited peaks which were labeled as follows: lattice oxygen peak without oxygen vacancies, 530.0 eV; lattice oxygen peak in the oxygen deficient region, 531.1 eV; and metal hydroxide, 532.0 eV.24 The as-deposited and post-annealed a-CIZO thin-films show a small hump at 531.1 eV which is evidently for the reduction oxygen vacancy. However, for the post-annealing temperature at 300 °C the hump almost vanished, which is evidence for the increase oxygen vacancy.14
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Fig. 3 (a and b) XPS spectra of O1s region and C1s region of a-CIZO thin films, as-deposited and post-annealed at 150 and 300 °C. |
Fig. 3(b) shows the C 1s peak of the as-deposited and post-annealed a-CIZO thin-films, which exhibited this peak at 285.1 eV and 289.7 eV, respectively. The peak at 285.1 eV is attributed to carbon (C–C),25,26 and the peak at 289.7 eV is attributed to carbonate where carbon bonded with oxygen atoms.27 Elemental C of 1.8, 2.62, and 3.2 at.% was observed in the C 1s peaks of the respective as-deposited and the 150 and 300 °C post-annealed a-CIZO thin-films. After post-annealing temperature, elemental C, which increased from 1.8 to 3.2 at.%, may have been absorbed from the environment.26
Fig. 4(a) shows the transmittance spectra of the as-deposited and post-annealed a-CIZO thin films. The average transmittance of the a-CIZO thin-films were >85% in the range between 400 and 800 nm. A high transmittance was observed for the a-CIZO thin-films, even for the as-deposited condition, indicating that the a-CIZO thin-films could be used as an active channel layer for fully transparent flexible displays.28–30 Fig. 4(b) shows the band gap of the a-CIZO thin-films, estimated by extrapolating the linear absorption (αhν)2 edge versus hν, where h is Planck's constant and ν is the frequency. The estimated band gap of the a-CIZO thin films was in the range between 3.88 and 3.99 eV. The band gap of a-CIZO slightly increased for post-annealed temperature at 150 °C, and after that slightly decreased for the post-annealed temperature at 200, 250, and 300 °C, respectively. The slightly increased band gap resulted in an increase of the activation energy for the donor-related shallow defect states. This makes a climb of the carrier to the conduction band difficult.28
Fig. 5(a) and (b) shows the optical microscope images of the fabricated TFT devices and the schematic cross-sectional images of device structure. Fig. 5(a) shows the transfer characteristic drain current (ID) vs. gate to source voltage (VGS) of the a-CIZO TFTs as a function of the annealing temperature. The parameters of the fabricated TFTs are reported in Table 1.
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Fig. 5 (a–f) The transfer and output characteristics of the as-deposited and post-annealed a-CIZO TFTs. |
Post-annealed temperature °C | Von (V) | Vth (V) | Hysteresis (V) | Ion/Ioff | μsat (cm−2 V−1 s−1) | SS (V per decade) |
---|---|---|---|---|---|---|
As-deposited | −6.34 | 0.32 | 3.7 | 4.2 × 106 | 13.3 | 0.90 |
100 | −4.63 | 1.28 | 1.7 | 1.1 × 107 | 16.3 | 0.63 |
150 | −4.24 | 0.14 | 0.4 | 1.7 × 107 | 16.6 | 0.68 |
200 | −2.64 | 3.14 | 1.1 | 4.8 × 106 | 15.0 | 0.78 |
250 | −3.96 | 2.77 | 1.9 | 6.1 × 106 | 15.5 | 0.94 |
300 | NA | 0.89 | 2.5 | 7.3 × 103 | 20.7 | 6.69 |
The ID slightly increased, and the turn on voltage (Von) shifted towards the positive direction from the as-deposited until the post-annealing temperature increased to 200 °C. At the post-annealing temperature of 300 °C, the a-CIZO TFT becomes conductive, and the off-current disappeared, indicating that carrier concentration increased as a result of the high temperature of the post-annealing which is in turn related to the generation of oxygen vacancy (Vo). The saturation field effect mobility (μsat) is extracted using the following equation:31
![]() | (1) |
The a-CIZO TFT fabricated at 150 °C exhibited good transfer characteristics at a constant drain to source voltage (VDS) = 15 V; a μsat of 16.6 cm2 V−1 s−1; a Vth of 0.14 V; sub threshold swing (SS) of 0.68 V per decade; and an on/off current ratio (Ion/Ioff) of over 1.7 × 107 with negligible hysteresis (0.4 V). The carbon unincorporated a-IZO TFT exhibited a μsat of 6.6 cm2 V−1 s−1; a Vth of 2.03 V; SS of 0.66 V per decade; and an on/off current ratio (Ion/Ioff) of over 1 × 107. The incorporation of carbon into a-IZO TFTs has improved the mobility by more than two times that of unincorporated a-IZO TFTs. The shift in the turn-on voltage towards the negative direction induced by the high-temperature annealing is considered to be due the increase in the number of native defects, especially oxygen vacancies since free electrons in ZnO-based oxide semiconductors are known to be mainly a result of the generation of oxygen vacancies. In ZnO-based oxides, oxygen vacancies are generated in the manner describe by the following reaction:32–34
![]() | (2) |
The oxygen atoms can preferentially leave their original sites, resulting in the formation of carriers with two electrons contributing in the conduction band per oxygen vacancy. The post-annealing at 300 °C enhanced the formation of oxygen vacancies so that a higher annealing temperature leads to more electron carriers that cause the turn-on voltage to shift more towards the negative. As summarized in Table 1, the μsat improves as the annealing temperature increases up to 250 °C. As shown in eqn (1), the μsat is linearly proportional to the drain current. This indicates that the increase in the (μsat) induced by annealing is directly attributed to the increase of the on-current due to the increased oxygen vacancies. Consequently, thermal annealing at 300 °C strongly alters the performance of the TFT, shifting the turn-on voltage towards the negative. Table 1 shows the forward and reversed hysteresis characteristics of the ID–VGS curve for a sweep range of VGS from 3.7 to 0.4 V. A hysteresis of 3.7 V was observed for the as-deposited, and after post-annealing decreased to 0.4 V. The presence of oxygen deficiencies also degraded the SS value for high-temperature annealing.35–37 In Fig. 3(b)–(f), the IDS–VDS shows the output characteristics (VGS = 0–20 V in steps of 5 V) obtained from the as-deposited and post-annealed a-CIZO TFT. The observed clear pinch-off and drain saturation indicate that electron transportation in the active channel was controlled by the gate and drain voltages. In addition, the metal and semiconductor current-crowding phenomenon was absent in the low-drain voltage regime.
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