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Issue 11, 2011
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Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes

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Abstract

We propose robust and scalable processes for the fabrication of floating gate devices using ordered arrays of 7 nm size gold nanoparticles as charge storage nodes. The proposed strategy can be readily adapted for fabricating next generation (sub-20 nm node) non-volatile memory devices.

Graphical abstract: Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes

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Article information


Submitted
20 Jul 2011
Accepted
13 Sep 2011
First published
11 Oct 2011

Nanoscale, 2011,3, 4575-4579
Article type
Communication

Scalable processes for fabricating non-volatile memory devices using self-assembled 2D arrays of gold nanoparticles as charge storage nodes

G. Muralidharan, N. Bhat and V. Santhanam, Nanoscale, 2011, 3, 4575 DOI: 10.1039/C1NR10884K

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