Issue 2, 2012

Parylene to silicon nitride bonding for post-integration of high pressure microfluidics to CMOS devices

Abstract

High pressure-rated channels allow microfluidic assays to be performed on a smaller footprint while keeping the throughput, thanks to the higher enabled flow rates, opening up perspectives for cost-effective integration of CMOS chips to microfluidic circuits. Accordingly, this study introduces an easy, low-cost and efficient method for realizing high pressure microfluidics-to-CMOS integration. First, we report a new low temperature (280 °C) Parylene-C wafer bonding technique, where O2 plasma-treated Parylene-C bonds directly to Si3N4 with an average bonding strength of 23 MPa. The technique works for silicon wafers with a nitride surface and uses a single layer of Parylene-C deposited only on one wafer, and allows microfluidic structures to be easily formed by directly bonding to the nitride passivation layer of the CMOS devices. Exploiting this technology, we demonstrated a microfluidic chip burst pressure as high as 16 MPa, while metal electrode structures on the silicon wafer remained functional after bonding.

Graphical abstract: Parylene to silicon nitride bonding for post-integration of high pressure microfluidics to CMOS devices

Supplementary files

Article information

Article type
Technical Note
Submitted
07 Aug 2011
Accepted
11 Nov 2011
First published
01 Dec 2011

Lab Chip, 2012,12, 396-400

Parylene to silicon nitride bonding for post-integration of high pressure microfluidics to CMOS devices

A. T. Ciftlik and M. A. M. Gijs, Lab Chip, 2012, 12, 396 DOI: 10.1039/C1LC20727J

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