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Issue 1, 2014
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A simple and inexpensive technique for PDMS/silicon chip alignment with sub-μm precision

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Abstract

This paper describes a novel simple and inexpensive assembly technique with highly accurate alignment of a polydimethylsiloxane (PDMS) layer on a silicon chip for hybrid microfluidic/electronic applications. It is based on strong electrostatic adhesion of a 200 μm thick and dense layer of PDMS onto a metallic cylindrical tool mechanically fixed to an optical microscope. A 2 mm hole in the tool allows precise alignment of the PDMS layer, 10 μm from the surface, without the usage of any lubricant. The same tool is used for PDMS bonding in a well-controlled manner. This technique is compatible with wafer scale alignment. A very precise consideration of the PDMS shrinkage ratio, reduced by 50% for thin layers, enables a misalignment range of less than 1 μm in the experiments.

Graphical abstract: A simple and inexpensive technique for PDMS/silicon chip alignment with sub-μm precision

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Publication details

The article was received on 17 Sep 2013, accepted on 20 Sep 2013 and first published on 24 Sep 2013


Article type: Paper
DOI: 10.1039/C3AY41618F
Anal. Methods, 2014,6, 97-101

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    A simple and inexpensive technique for PDMS/silicon chip alignment with sub-μm precision

    R. Sivakumarasamy, K. Nishiguchi, A. Fujiwara, D. Vuillaume and N. Clément, Anal. Methods, 2014, 6, 97
    DOI: 10.1039/C3AY41618F

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