Issue 12, 2015

Wafer-scale and environmentally-friendly deposition methodology for extremely uniform, high-performance transistor arrays with an ultra-low amount of polymer semiconductors

Abstract

We report on a new class of microliter-scale solution processes for fabricating highly uniform and large-area transistor arrays with extremely low consumption of semiconducting polymers. These processes are accomplished by applying a vertical phase separation of polymers with an environmentally benign solvent, a random copolymerization strategy between two highly conductive repeating units, and a meniscus-dragging deposition technique. The successful realization of these three processes, as confirmed by the structural and morphological in-depth characterizations, has enabled the fabrication of high-performance polymeric field-effect transistors that were uniformly distributed, without a single failure, on a 4 inch wafer using only 40 μg of semiconducting polymers. The resulting transistor arrays showed an average mobility of 0.28 cm2 V−1 s−1, with a low standard deviation of 0.04, as well as ultra-uniform near-zero threshold voltages. Our simple strategy shows great promise for fabricating large-scale organic electronic devices in the future using a truly low-cost process.

Graphical abstract: Wafer-scale and environmentally-friendly deposition methodology for extremely uniform, high-performance transistor arrays with an ultra-low amount of polymer semiconductors

Supplementary files

Article information

Article type
Paper
Submitted
23 Nov 2014
Accepted
05 Jan 2015
First published
07 Jan 2015

J. Mater. Chem. C, 2015,3, 2817-2822

Wafer-scale and environmentally-friendly deposition methodology for extremely uniform, high-performance transistor arrays with an ultra-low amount of polymer semiconductors

J. Cho, Y. Ko, K. H. Cheon, H. Yun, H. Lee, S. Kwon, Y. Kim, S. T. Chang and D. S. Chung, J. Mater. Chem. C, 2015, 3, 2817 DOI: 10.1039/C4TC02674H

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