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Issue 2, 2014
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Barrier inhomogeneities at vertically stacked graphene-based heterostructures

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Abstract

The integration of graphene and other atomically flat, two-dimensional materials has attracted much interest and been materialized very recently. An in-depth understanding of transport mechanisms in such heterostructures is essential. In this study, vertically stacked graphene-based heterostructure transistors were manufactured to elucidate the mechanism of electron injection at the interface. The temperature dependence of the electrical characteristics was investigated from 300 to 90 K. In a careful analysis of current–voltage characteristics, an unusual decrease in the effective Schottky barrier height and increase in the ideality factor were observed with decreasing temperature. A model of thermionic emission with a Gaussian distribution of barriers was able to precisely interpret the conduction mechanism. Furthermore, mapping of the effective Schottky barrier height is unmasked as a function of temperature and gate voltage. The results offer significant insight for the development of future layer-integration technology based on graphene-based heterostructures.

Graphical abstract: Barrier inhomogeneities at vertically stacked graphene-based heterostructures

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Publication details

The article was received on 17 Jul 2013, accepted on 11 Oct 2013 and first published on 16 Oct 2013


Article type: Paper
DOI: 10.1039/C3NR03677D
Citation: Nanoscale, 2014,6, 795-799
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    Barrier inhomogeneities at vertically stacked graphene-based heterostructures

    Y. Lin, W. Li, S. Li, Y. Xu, A. Aparecido-Ferreira, K. Komatsu, H. Sun, S. Nakaharai and K. Tsukagoshi, Nanoscale, 2014, 6, 795
    DOI: 10.1039/C3NR03677D

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