Issue 2, 2022

GaAs nanowires on Si nanopillars: towards large scale, phase-engineered arrays

Abstract

Large-scale patterning for vapor–liquid–solid growth of III–V nanowires is a challenge given the required feature size for patterning (45 to 60 nm holes). In fact, arrays are traditionally manufactured using electron-beam lithography,for which processing times increase greatly when expanding the exposure area. In order to bring nanowire arrays one step closer to the wafer-scale we take a different approach and replace patterned nanoscale holes with Si nanopillar arrays. The method is compatible with photolithography methods such as phase-shift lithography or deep ultraviolet (DUV) stepper lithography. We provide clear evidence on the advantage of using nanopillars as opposed to nanoscale holes both for the control on the growth mechanisms and for the scalability. We identify the engineering of the contact angle as the key parameter to optimize the yield. In particular, we demonstrate how nanopillar oxidation is key to stabilize the Ga catalyst droplet and engineer the contact angle. We demonstrate how the position of the triple phase line at the SiO2/Si as opposed to the SiO2/vacuum interface is central for a successful growth. We compare our experiments with simulations performed in surface evolver™ and observe a strong correlation. Large-scale arrays using phase-shift lithography result in a maximum local vertical yield of 67% and a global chip-scale yield of 40%. We believe that, through a greater control over key processing steps typically achieved in a semiconductor fab it is possible to push this yield to 90+% and open perspectives for deterministic nanowire phase engineering at the wafer-scale.

Graphical abstract: GaAs nanowires on Si nanopillars: towards large scale, phase-engineered arrays

Supplementary files

Article information

Article type
Communication
Submitted
21 okt 2021
Accepted
06 yan 2022
First published
06 yan 2022
This article is Open Access
Creative Commons BY-NC license

Nanoscale Horiz., 2022,7, 211-219

GaAs nanowires on Si nanopillars: towards large scale, phase-engineered arrays

L. Güniat, L. Ghisalberti, L. Wang, C. Dais, N. Morgan, D. Dede, W. Kim, A. Balgarkashi, J. Leran, R. Minamisawa, H. Solak, C. Carter and A. Fontcuberta i Morral, Nanoscale Horiz., 2022, 7, 211 DOI: 10.1039/D1NH00553G

This article is licensed under a Creative Commons Attribution-NonCommercial 3.0 Unported Licence. You can use material from this article in other publications, without requesting further permission from the RSC, provided that the correct acknowledgement is given and it is not used for commercial purposes.

To request permission to reproduce material from this article in a commercial publication, please go to the Copyright Clearance Center request page.

If you are an author contributing to an RSC publication, you do not need to request permission provided correct acknowledgement is given.

If you are the author of this article, you do not need to request permission to reproduce figures and diagrams provided correct acknowledgement is given. If you want to reproduce the whole article in a third-party commercial publication (excluding your thesis/dissertation for which permission is not required) please go to the Copyright Clearance Center request page.

Read more about how to correctly acknowledge RSC content.

Social activity

Spotlight

Advertisements