Low contact resistance in solid electrolyte-gated ZnO field-effect transistors with ferromagnetic contacts

Abstract

Understanding the role of contacts and interfaces between ferromagnetic metals and semiconductors is a critical step for spin injection and transport. Here, high performance solid electrolyte gated ZnO field-effect-transistors (FETs) with ferromagnetic Co contacts as the source and drain electrodes were demonstrated. Solid electrolyte gating provides a large electric field in the FETs that leads to an ohmic contact between the Co electrode and the ZnO film. The contact resistance can be tuned by the gate voltage and reduced to 66 Ω cm. Compared with FETs using a traditional SiO₂ dielectric, an improved transistor performance is achieved with a current on/off ratio of 10⁶ and a field-effect mobility of 5.24 cm² V⁻¹ s⁻¹. The magnetoresistance calculation based on a spin diffusion model indicates that the on-state contact resistance of the solid electrolyte gated FETs falls in the optimal range for the injection and detection of spin-polarized charge carriers. These results reveal that the electrolyte gating allows for engineering the contacts for nanoelectronic and spintronic devices.

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Introduction

Spintronics, utilizing the spin of the electron for information storage and processing, holds great promise for the designing of novel next-generation electronic devices.^1–8 The spin field-effect transistor (spin FET) proposed by Datta and Das is the most prominent proposal. The basic structure of spin FETs consists of a semiconductor channel between two ferromagnetic layers.⁹ So far, the low-efficiency spin injection from ferromagnetic contacts into semiconductors has remained an unsolved issue for realistic application of spin FETs.^10,11 The realization of highly-efficient spin injection is impeded by several factors, such as resistance mismatch, Schottky barrier and non-tunneling transport.⁴ It is well known that the contacts and interfaces between metals and semiconductors play an important role.^12–14 One of the conventional approaches widely used to overcome these problems is to insert a tunneling layer between the ferromagnetic contact and the semiconductor.^14–16 Recently, Jen-Ru Chen et al. reported that a huge reduction of the Schottky barrier (from 60.6 meV to 9.7 meV) between the contact of ferromagnetic metal Co and single layer MoS₂ can be achieved by inserting a 2 nm thick MgO tunneling layer.¹⁵ The Saroj Prasad Dash group obtained a similar result with 1 nm-thick TiO₂ as the tunneling layer in two-dimensional material based FETs.¹⁶ Another method to reduce such a conductivity difference is to increase the doping concentration of the semiconductor. However, the induced spin relaxation originating from impurity scattering has a detrimental impact on carrier spin lifetime.^5,17

An electric-double-layer (EDL) formed at a semiconductor/electrolyte interface provides a large electric field and this feature has attracted much attention.^18–22 By using electrolytes, an EDL is formed after the ionic redistribution by applying an external electric field. The typical thickness of the EDL is only 1 nm, which can be regarded as a nanogap capacitor with a large specific capacitance exceeding ∼1 μF cm⁻² and a high-density of carriers (10¹³ cm⁻² ∼ 10¹⁵ cm⁻²) accumulated at the surface.^23–25 Therefore, the EDL structure has been widely adopted to manipulate the physical properties of condensed matter, such as the insulator-to-metal transition,²⁶ reversal of the magnetization²⁷ and spin–orbit interaction.^28–30 Furthermore, it was found that a very low contact resistance can be obtained in high-performance FETs by using EDL gate dielectrics.^31–33

Transitional metal oxides exhibit rich physical properties which stem from the complex coupling between the charge, spin, orbital and lattice degrees of freedom in systems.^34–36 The ZnO semiconductor has attracted great interest for spintronics and optoelectronic devices due to a long spin relaxation time and good optical and electrical properties.³⁷ In this paper, we report on the fabrication of solid electrolyte-gated ZnO FETs with ferromagnetic Co contacts by using micrometer-sized carbon fibers as a mask. It is found that the solid electrolyte can greatly reduce the contact resistance and improve the transistor performance. We further calculate the magnetoresistance (MR) based on the spin diffusion model using the experimentally measured contact resistance. The MR results indicate that the solid electrolyte-gated systems hold great promise for spintronics.

Experimental procedures

The indium-tin-oxide (ITO) glass substrates were ultrasonically cleaned in acetone, alcohol and distilled water for 15 min, and then dried by N₂ flow and treated by ozone for 15 min. The 2 μm-thick SiO₂ solid electrolyte was deposited on ITO as a gate dielectric.²² More details about the solid electrolyte can be found in our recent paper.³⁸ A 15 nm-thick n-type ZnO thin film was deposited by RF magnetic sputtering as the active layer with a power of 30 W and a working pressure of 0.5 Pa at room temperature. Then, 10 μm-diameter carbon fibers were transferred onto the solid electrolyte/ITO substrates using tweezers (Fig. 1(a)). Generally, the carbon fiber adheres tightly to the surface by the electrostatic force of the device substrate. By using the 10 μm-diameter carbon fibers as the mask, the 40 nm-thick Co source–drain electrodes were deposited on ZnO by RF magnetic sputtering with a base vacuum of 8 × 10⁻⁵ Pa, a power of 80 W and a working pressure of 0.5 Pa. The deposition rate for the Co films is 0.63 Å s⁻¹. The purity of the ZnO and Co targets is 99.99 wt%. Finally, the carbon fiber was slightly moved away from the substrate by tweezers. The channel width of the devices is 200 μm. The sputtered Co nanoclusters will diffract into the shadow regions of the carbon fiber; therefore, the actual channel length of the devices is less than 10 μm (Fig. 1(b)). Because the carbon fiber was not uniformly adhered to the substrate, a series of channels with different lengths were obtained between the Co source and the drain electrodes. The length of the channels for our devices was observed by a high resolution optical microscope. As shown in the graph in Fig. 1(c), the channel lengths varied from 1.7 μm to 5.2 μm. It is convenient to analyze the relationship between the channel length and the contact resistance described later. In order to compare the performance of the solid electrolyte-gated devices, thermally grown 200 nm-thick-SiO₂/Si was also used for the fabrication of FETs. The resistivity and carrier density of ZnO were measured by Hall effects (Ecopia HMS-3000) with a Hall-bar structure. The electrical properties of the devices were measured by a Keithley 4200 semiconductor parameter analyzer in air and at room temperature.

Fig. 1 ZnO FET with ferromagnetic contacts. (a) Fabrication of the ZnO FET with carbon fibers as a mask. (b) The schematic and the measurement configuration of the FET. (c) Optical microscope image of the channels of the FET.

Results and conclusions

Low contact resistance is an important prerequisite to realize highly-efficient spin injection for spin FETs.¹⁵ We tested two types of devices: in one type, the 200 nm thermally grown SiO₂ is used as the gate insulator and in the other the SiO₂ solid electrolyte acts as the gate insulator. In both cases, the FETs have the same device dimensions (w/l = 200 μm/3.7 μm) and the sputtered ZnO channel was deposited under the same experimental conditions. Fig. 2(a) and (b) show the output characteristic curves of the drain–source current I_dsversus the drain–source voltage V_ds at different gate voltages V_g for the FET with traditional SiO₂ and solid–electrolyte dielectrics, respectively. All of these devices exhibit n-type transistor properties, which is due to the Co Fermi level close to the conduction band of ZnO. Non-ohmic currents have been observed generally in the FETs with traditional dielectric layers and these devices exhibit a strong nonlinear I_ds− V_ds behavior. It suggests the presence of a high Schottky barrier and depletion of the carriers at the Co/ZnO contacts. In the low range of bias voltage, both types of devices show a linear I_ds−V_ds behavior (Fig. 2(c) and (d)); however, this feature is not a sufficient condition for a low-resistance ohmic contact.¹⁶ As demonstrated previously, the thermally assisted tunneling current can induce a linear behavior despite the presence of a high Schottky barrier, especially at a small bias voltage V_ds.³⁸ In contrast to the FETs with traditional dielectrics, a clear linear I_ds−V_ds characteristic was observed at low bias voltage in solid electrolyte-gated FETs, indicating the ohmic contact behavior of the Co pads directly on the ZnO layer as shown in Fig. 2(b). The I_ds starts to saturate at higher V_ds, which can be attributed to the channel pinch off. As shown in Fig. 2(d), the current at V_ds = 0.5 V in the device with the solid electrolyte gate dielectric is achieved to be 12.7 μA for V_g = 2 V. However, the current at V_ds = 0.5 V and V_g = 40 V for the FETs with 200 nm-thick thermally grown SiO₂ is only 0.014 μA.

Fig. 2 (a and b) Output I_ds−V_ds curves at different V_g values for the FET with traditional SiO₂ and solid–electrolyte dielectrics, respectively. (c and d) Output curves at a low bias range at different V_g values for the FET with traditional SiO₂ and solid–electrolyte dielectrics, respectively.

In order to exactly quantify the Co/ZnO contact resistance R_C of the FETs, the transfer length method (TLM) was used. The I_ds−V_ds relationship of the fabricated FETs with a different channel length L was measured. The total resistance R_T of different channel lengths at different V_g values can be calculated in a low V_ds range. According to the TLM equation, the relationship between R_T and R_C can be given as:

where ρ_c is the sheet resistivity of the channel, L is the channel length, W is the channel width, R_c is the resistance of one contact and R_ch is the resistance of the channel. Fig. 3(a) shows the total resistance R_Tversus L at different V_g values (1 V, 1.5 V, 2 V) and linear fitting for each V_g. The slope of the line is the resistivity ρ and the y-axis intercept is 2R_C. The slope decreases with increasing V_g as expected for an n-type FET and the channel becomes more conductive. It can also be seen from Fig. 3(a) that the contact resistance of the solid–electrolyte gated devices drops by 4.8 times as the V_g increases from 1 V to 2 V. The contact resistance is as low as 66 Ω cm at V_g = 2 V. As shown in Fig. 3(b), the contact resistance of the FETs with 200 nm thermally grown SiO₂ is estimated to be 36.3 kΩ cm at V_g = 40 V, which is 2–3 orders of magnitude higher than that of the FETs with a solid-electrolyte gate insulator at V_g = 2 V. The reduction in the contact resistance with solid electrolyte gating is consistent with the I_ds−V_ds curve highlighted in Fig. 2. It indicates that the total resistance of the solid electrolyte gated FETs is greatly reduced, which provides further evidence that the solid electrolyte gating can significantly reduce the contact resistance. A large contact resistance arises when the width of the Schottky barrier is large, which can prevent the tunneling process and further affect spin injection.

Fig. 3 Width normalized total (R_T) and contact (R_C) resistance of the FETs with a solid electrolyte (a) and 200 nm thermally grown SiO₂ (b).

The decrease of contact resistance in the solid electrolyte gated FETs also results in an improved device performance. To compare the electrical performances of the two types of devices, transfer characteristics measurements (I_dsvs. V_g) were performed at a variety of V_ds values (Fig. 4). The mobility can be extracted from the saturation region slope of dI_ds^1/2/dV_G from the transfer characteristics:

where C_i is the gate capacitance (the C_i of the solid electrolyte is about 1 μF cm⁻²).²² The devices with traditional SiO₂ exhibit an inferior performance with μ = 0.023 cm² V⁻¹ s⁻¹ and the subthreshold swing is as high as 4.1 V per decade. The inferior device performance results from the weak gate coupling and the large Schottky barrier between the Co electrodes and the ZnO films. It can be found that the application of the solid electrolyte as an insulator layer shows a significant enhancement in the carrier mobility and the operating voltage is greatly reduced to 2 V. The mobility is found to be μ = 5.24 cm² V⁻¹ s⁻¹ and the current on/off ratio is larger than 10⁶. A threshold voltage (V_T) of 0.6 V and a subthreshold swing of 0.12 V per decade are also obtained. These results clearly indicate that the lower contact resistance in the metal/semiconductor interface is a necessary requirement for high performance devices.^16,31,32,39

Fig. 4 (a) The transfer curves of the device with a traditional dielectric measured at a source–drain voltage of 40 V. (b) Transfer characteristics of the device with solid electrolyte gating at different source–drain voltages.

According to the basic theory of FETs, the width of the Schottky barrier can be calculated by the following formula:

where ε_ZnO is the dielectric constant of the ZnO film (ε_ZnO = 8.75),⁴⁰ε_dielectric is the dielectric constant of the gate dielectric, d_ZnO is the thickness of the ZnO film, and d_dielectric is the thickness of the gate dielectric. It means that for a 200 nm thick SiO₂ gate dielectric (the ε_dielectric is 3.9), an electrical field of 2 MV cm⁻¹ was applied to the devices with V_g = 40 V. Therefore, the calculated λ = 82 nm is large enough for the direct charge tunneling and large contact resistance was observed. In contrast, the typical thickness of the EDL of the solid electrolyte (the ε_dielectric is 2.2) is about 1 nm and there is an ultra-high electronic field of 20 MV cm⁻¹ applied on the FETs with solid electrolyte gating at V_g = 2 V. The λ can be calculated to be only ∼7.7 nm. Fig. 5(a) is a sketch map of the band bending of the FETs at different electronic fields. Compared to the FET with traditional dielectrics, the reduction of the barrier width mainly results from a high density of charges accumulated in the solid electrolyte gated devices. Such strong coupling leads to the thinning of the barrier to several nanometers, which is essentially transparent for carriers and allows ohmic tunneling transport.^31,32,39 Furthermore, we also assess the viability of a lateral device structure for spintronic devices. For the solid electrolyte gated devices, the barrier width is reduced to several nanometers and the contact resistance is extremely small by applying a positive gate voltage. Thus, the spin-polarized carriers in ferromagnetic contacts can bypass the conductivity mismatch issues and tunnel through the thinned Schottky barrier into the channel. Therefore, a lateral FM/SC/FM structure can be considered as the lateral FM/I/SC/I/FM structure, where I is the interface contact and FM is the ferromagnet. According to the spin diffusion theory, we estimated the MR (=ΔR/R_p) by putting the contact resistance into the formula¹²where ΔR is the resistance difference between the antiparallel (R_AP) and parallel (R_P) configurations of the magnetizations of the two electrodes. l_sf is the spin diffusion length. β and γ are the bulk spin asymmetry coefficient in a Co electrode and the spin-dependent tunneling coefficient of the Co/ZnO/Co contact. γ_N and γ_Co are the product of l_sf and resistivity of the ZnO and Co, respectively. Considering the electrode length D ≫ d_ZnO,¹² the interface resistance (r_b* = R_cA) should be within the range for high MR:where R_c and A are the product of the contact resistance and the contact area, respectively. By taking the experimentally measured carrier concentration and resistivity into account, we estimated the optimal range contact resistance for spin injection. Fig. 5(b) displays the calculated MR as a function of gate voltage V_g and contact resistance for the channel length of L = 50 nm, and the expected spin lifetimes in ZnO are also indicated. Experimentally, the short channel (L smaller than 50 nm) can be achieved by high-resolution electron-beam lithography. The shaded area between V_g1 and V_g2 predicts the possibility of observation with a significant change of MR in the Co–ZnO–Co device with solid electrolyte gating. The on-state contact resistance R_cA of the solid electrolyte gated FETs falls at the optimal range for the device with different spin lifetimes. In this paper, our aim is to prove that the spin injection from a ferromagnetic contact into a semiconductor would be realized by engineering the interface resistance. We are aware that extensive MR measurements are still needed. In our devices, the electric-double-layer effect of the solid electrolyte is generated by the assistance of water. So, the MR cannot be measured in a vacuum at low temperature. However, the method we used here was widely adopted by other groups and it is one of the most reasonable ways to calculate MR.^16,41–43 Although we have not fabricated a practical spin device in this process, the prediction of MR will give us a beneficial guidance in the future.

Fig. 5 (a) The band bending of the FETs at different electronic fields. (b) Calculated MR of the lateral FET structure as a function of the contact resistance and gate voltage with a channel length of 50 nm.

Conclusion

In conclusion, we demonstrated an improved FET performance using a solid electrolyte as the insulating layer with Co electrodes directly in contact on ZnO film. Comparing with the FETs with a traditional insulating layer, an improved device performance was observed with the mobility increased from 0.023 cm² V⁻¹ s⁻¹ to 5.24 cm² V⁻¹ s⁻¹ and the contact resistance decreased to 66 Ω cm. Furthermore, the contact resistance can be tuned by the gate voltage and the conductivity mismatch could be alleviated by solid electrolyte gating. The calculated magnetoresistance using a spin diffusion model indicates that the on-state contact resistance of the solid electrolyte gated FETs falls in the optimal range for injection and detection of spin-polarized charge carriers. The control of contact resistance encourages future studies of spintronic devices with electrolyte gating.

Acknowledgements

This work was supported by the National Natural Science Foundation of China (61306085, 51173205, 11334014, 11374373), the Doctoral Fund of the Ministry of Education of China (No. 20120162110020) and the support of China Postdoctoral Science Foundation (2015T80881). Y. G. acknowledges the support of National Science Foundation Grant No. DMR-1303742.

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