Corsin
Battaglia
*a,
Andres
Cuevas
b and
Stefaan
De Wolf
c
aEmpa, Swiss Federal Laboratories for Materials Science and Technology, Laboratory Materials for Energy Conversion, 8600 Dübendorf, Switzerland. E-mail: corsin.battaglia@empa.ch
bThe Australian National University, Research School of Engineering, Canberra ACT 0200, Australia
cEcole Polytechnique Fédérale de Lausanne, Photovoltaics and Thin Films Electronics Laboratory, 2000 Neuchâtel, Switzerland
First published on 12th February 2016
With a global market share of about 90%, crystalline silicon is by far the most important photovoltaic technology today. This article reviews the dynamic field of crystalline silicon photovoltaics from a device-engineering perspective. First, it discusses key factors responsible for the success of the classic dopant-diffused silicon homojunction solar cell. Next it analyzes two archetypal high-efficiency device architectures – the interdigitated back-contact silicon cell and the silicon heterojunction cell – both of which have demonstrated power conversion efficiencies greater than 25%. Last, it gives an up-to-date summary of promising recent pathways for further efficiency improvements and cost reduction employing novel carrier-selective passivating contact schemes, as well as tandem multi-junction architectures, in particular those that combine silicon absorbers with organic–inorganic perovskite materials.
Broader contextPhotovoltaic solar energy offers humankind a useful instrument to build a globally prosperous, sustainable, and environmentally friendly society. Its recent success as an economically viable source of electricity is founded on a simple optoelectronic device, the crystalline silicon solar cell. The evolution of this device – relatively slow in the past – has accelerated in recent years, posing now new challenges and opening exciting opportunities. This review is both comprehensive and up to date, describing prior, current and emerging technologies for high-efficiency silicon solar cells. It will help the reader understand how crystalline silicon solar cells work, how they are made, and which factors limit their performance. It then describes several approaches to overcome such limitations, and how these approaches are being transferred from research laboratories to the industry. Specific attention is given to two device designs, the interdigitated back contact cell and the silicon heterojunction cell, pointing out their salient features, critical in enabling very high power conversion efficiencies. Despite its proven maturity, silicon solar cell technology continues receiving an influx of important new ideas that promise simpler fabrication and higher performance. A prime example is its combination with other semiconductor materials to build tandem devices for ultra-high efficiencies. |
Fig. 1 Evolution of the energy conversion efficiencies of silicon photovoltaics according to year of entry in tables of ref. 12. Note the steep efficiency improvement of cells with an area larger than 100 cm2. The step increase in efficiency in 2009 is due to the redefinition of the standard solar spectrum and affects all technologies. |
Device | Area [cm2] | V oc [mV] | J sc [mA cm−2] | FF [%] | Eff. [%] | Certification |
---|---|---|---|---|---|---|
Ideal, 110 μm | 761 | 43.3 | 89.3 | 29.4 | Modeled17 | |
Panasonic IBC HIT | 143.7 (da) | 740 | 41.8 | 82.7 | 25.6 | AIST (2/14)3 |
SunPower IBC | 153.5 (ta) | 737 | 41.3 | 82.7 | 25.2 | Fraunhofer ISE (10/15)12 |
Kaneka SHJ | 151.9 (ap) | 738 | 40.8 | 83.5 | 25.1 | Fraunhofer ISE (9/15)370 |
Fraunhofer ISE TOPCon | 4.0 (da) | 718 | 42.1 | 83.2 | 25.1 | Fraunhofer ISE (8/15)290,371 |
UNSW PERL (p-type) | 4.0 (da) | 706 | 42.7 | 82.8 | 25.0 | Sandia (3/99)1,12 |
Panasonic HIT | 101.8 (ta) | 750 | 39.5 | 83.2 | 24.7 | AIST (12/12)218 |
EPFL MoOx SHJ | 3.9 (ap) | 725 | 38.6 | 80.4 | 22.5 | Fraunhofer ISE (2015)310 |
imec PERT (n-type) | 238.9 (ta) | 695 | 40.2 | 80.5 | 22.5 | Fraunhofer ISE (2015)160,174 |
Trina solar mono-Si PERC (p-type) | 243.7 | 680 | 40.5 | 80.3 | 22.1 | Fraunhofer ISE (2015)12,315 |
Trina solar multi-Si PERC (p-type) | 242.7 (ap) | 667 | 39.8 | 80.0 | 21.3 | Fraunhofer ISE (11/15)12,372 |
Compared to other photovoltaic technologies, silicon solar cells have the advantage of using a photoactive absorber material that is stable, non-toxic, abundant and well understood. Silicon has an energy band gap of 1.12 eV, corresponding to a light absorption cut-off wavelength of about 1160 nm. This band gap is well matched to the solar spectrum, very close to the optimum value for solar-to-electric energy conversion using a single semiconductor optical absorber. Taking only radiative recombination into account (the so-called detailed balance),13 the theoretical conversion efficiency limit for a semi-infinitely thick silicon solar cell is 33.5% at 25 °C.14
Silicon has an indirect energy band gap, i.e. the valence band maximum is not at the same position in momentum space as the conduction band minimum. This has two major consequences. First, it makes radiative recombination fairly inefficient, which implies that, for defect-free material, the photogenerated electrons and holes can exhibit very long lifetimes. In fact, rather than its radiative counterpart, the dominant intrinsic recombination mechanism in silicon is Auger recombination, in which an electron recombines with a hole by transferring their energy difference to a third charge carrier, either a second free electron or hole. This energy is subsequently lost as heat. Consequently, based on an empirical parameterization of experimentally measured radiative and Auger recombination rates,15 the limiting intrinsic efficiency for silicon solar cells has been calculated to be 29.4% – significantly lower than the detailed balance limit (for an optimum thickness of 110 μm and considering Lambertian light trapping,16Fig. 2 and Table 1).17 Secondly, because of its indirect band gap, silicon also has a relatively low light absorption coefficient, particularly near its band gap (for a comparison of absorption coefficients of several photovoltaic materials, see, e.g., ref. 18). Despite this, with simple wafer surface texturing, combined with the use of well-designed antireflection coatings and rear surface mirrors, efficient light absorption, including the infrared part of the solar spectrum, is possible even with relatively thin wafers (∼100–150 μm).17 In practice, carrier recombination in silicon can be affected, or even dominated, by the presence of crystallographic defects or foreign impurities. In recent years, thanks to improved silicon ingot growth processes, defect engineering and contamination control during solar cell fabrication, the bulk electronic quality of crystalline silicon wafers has improved to such a point that further device advances now rely on innovative interface passivation and carrier-selective contact structures.
Fig. 2 Output current density (continuous black line) and output power density (dashed black line) vs. voltage under one-sun illumination for the ideal, Auger-limited, crystalline silicon solar cell with silicon absorber thickness of 110 μm, open-circuit voltage of 761 mV, short-circuit current density of 43.3 mA cm−2, fill factor of 89.3%, and power conversion efficiency of 29.4%.16 In red are the corresponding curves for the current world-record silicon solar cell from Panasonic, with an open-circuit voltage of 740 mV, a short-circuit current density of 41.8 mA cm−2, a fill factor of 82.7% and a power conversion efficiency of 25.6%.207 These approximate curves were generated using eqn (7) with ideality factors n = 0.675 for the ideal cell, and n = 1, plus a series resistance of 0.61 Ω cm2, for the world-record cell. |
The main purpose of interface passivation is to reduce recombination of photogenerated carriers at the silicon surface.19–21 This can be done by chemical passivation – usually by hydrogen – of harmful surface defects,22–25 which are predominantly broken silicon–silicon bonds, called dangling bonds, or by modifying the relative concentration of photogenerated electrons and holes near the surface.26,27 Effective surface passivation is usually achieved by dielectric materials such as silicon oxide,26,28–32 silicon nitride,33–36 silicon carbide37,38 and aluminum oxide.19,39–41 Alternatively, a (disordered) semiconductor such as intrinsic hydrogenated amorphous silicon42,43 can be employed. None of these layers allows carrier extraction per se, as they are either insulating or insufficiently conductive.
To enable efficient carrier extraction to the two external metal terminals, two carrier-selective contact structures are needed, which ideally exhibit efficient transport of only one type of carrier (e.g., electrons) while hindering the transport (that is, blocking) of the other type of carrier (e.g., holes). Since recombination requires the participation of both types of carriers, hindering the transport of one of them contributes to reducing recombination in the contact structure. Nevertheless, to suppress recombination more effectively, it is usually necessary to insert in the structure an interfacial passivating layer. Hence a highly selective contact is one that simultaneously presents a high conductivity for just one of the two carriers, while minimizing recombination. In designing high-efficiency solar cells, one may choose either to cover most of the wafer surface with a passivating dielectric material and extract photogenerated carriers selectively through local openings in this insulator,1 or to deposit carrier-selective materials on the full wafer surface using a suitable interface-passivation strategy. In the latter approach, the two simultaneous requirements of surface passivation and preferential conduction are frequently achieved by using a stack of two or more layers, for example intrinsic and doped hydrogenated amorphous silicon, as in silicon heterojunction solar cell technology.44–46
An important criterion for this decision relies on the optical properties of the required materials for contact formation. Indeed, layers blanket-deposited on the wafer surfaces (either for interface passivation or selective transport) should also maximize light coupling into the silicon absorber by minimizing reflection and parasitic absorption losses. Developing contact layers that satisfy these electronic and optical requirements simultaneously represents a considerable challenge. This paper gives a brief overview of recent research to solve it.
When solar radiation strikes the solar cell, photons with energy greater than the band gap of the semiconductor are absorbed, exciting electrons from the valence band into the conduction band, leaving behind an equally large number of holes in the valence band. Consequently, the total electron and hole concentrations (n and p) under illumination deviate from their thermo-chemical equilibrium values in the dark (n0 and p0, with n0p0 = ni2, where ni is 8.3 × 109 cm−3 at 25 °C for silicon).47 A net electric current eventually results when those negative (electrons) and positive (holes) charge carriers move in opposite directions in the device. In the quasi-neutral regions of the device, the excess carrier densities (Δn = n − n0, and Δp = p − p0) are approximately equal Δn ≈ Δp. In analogy to equilibrium, in which the carrier populations are described by a single Fermi energy EF, the carrier populations in non-equilibrium conditions can be described by means of the electron and hole quasi-Fermi energies EFn and EFp48
(1) |
(2) |
(3) |
Under steady-state illumination, photogenerated charge carriers either flow to an external circuit as electric current or they recombine inside the device. In open-circuit conditions, the concentration of carriers builds up, so that the photogeneration rate is perfectly counterbalanced by the recombination rate. As indicated by eqn (3), such high carrier concentration produces the maximum voltage that can be measured in a solar cell, the open-circuit voltage Voc. For electric current to flow, the solar cell needs to be connected to an external circuit by means of two low-resistance selective contacts – one for the electrons and another for the holes. The current is highest at short circuit (zero voltage), when the concentration of carriers inside the device and, therefore, their recombination rate are relatively low. Note, however, that neither the concentration of carriers nor the difference between the quasi-Fermi energies is zero, even if the terminal voltage is. In a good solar cell, the short-circuit current density Jsc is only slightly lower than the number of photons absorbed in the semiconductor per unit time and area, multiplied by the elementary charge, which can be called the photogenerated current density Jph. The ratio between Jsc and Jph is an indication of the “collection efficiency,” that is, of the ratio of electrons out to photons in. This quantum collection efficiency is usually measured as a function of the wavelength, or energy, of the incident photons. For silicon, with its band gap of 1.12 eV, the highest obtainable Jph value for a 110 μm-thick wafer is 43.3 mA cm−2 under standard test conditions (air mass 1.5 global spectrum, 1000 W m−2, 25 °C) (Table 1).
For power generation, the solar cell needs to deliver current and voltage simultaneously, and the total output current density can be written as Jout = Jph + Jeq − Jrec, where we have defined the photogenerated current density Jph as the net cumulative generation in excess of the equilibrium thermal generation, represented by Jeq. The recombination current density Jrec represents all generated carriers that are lost and not collected per unit time and area. Such recombination stems from the higher concentration of electrons and holes required to deliver voltage, compared to short circuit, as shown by eqn (3). Of all loss mechanisms, the most fundamental is radiative band-to-band recombination, which is the inverse process of absorption and is unavoidable. Actually, efficient external luminescence due to radiative recombination is a signature of high-efficiency solar cells,49,50 as it indicates that very few carriers are lost to recombination via defects. Radiative recombination is proportional to the concentrations of the two “reactant species,” that is, to the pn product of the concentrations of holes and electrons.48 The constant of proportionality is called the band-to-band recombination coefficient, which for silicon takes a value of B = 4.73 × 10−15 cm3 s−1 at room temperature.51 Although, as mentioned above, radiative recombination is not dominant in silicon, it is the most fundamental recombination process in any type of photovoltaic absorber and focusing on it helps to elucidate the basic operation principles of solar cells. Using eqn (1) and (2), we can express the total band-to-band recombination current density occurring in a silicon wafer of thickness W as
(4) |
Jeq = q · W · B · p0n0 = q · W · B · ni2. | (5) |
(6) |
(7) |
Although the above derivation was made for the band-to-band radiative mechanism, other contributing processes to J0 in silicon are Auger and defect-assisted recombination, which are also proportional to the pn product. Indeed, real devices are usually dominated by non-radiative recombination. The Auger recombination mechanism is peculiar, because it involves three carriers, even though its end result is to annihilate one free electron and one free hole. Auger recombination is in principle proportional to the pn product multiplied by the concentration of the majority carriers, p or n, but in practice it deviates slightly from an ideal p2n (or n2p) dependence due to Coulombic interaction between carriers.15,53 Defect-assisted, or Shockley–Read–Hall,54,55 recombination is a two-particle process that can have a complex dependence on the carrier concentrations themselves and on the properties of the defects. Including these additional recombination losses into the solar cell equation requires adapting the J0 prefactor and the ideality factor n, which can become either smaller or greater than one.56 Usually, J0 and n are determined experimentally,57 and their values may reflect a combination of several mechanisms. Low values of J0, implying low recombination, and low values of n are desired for high-efficiency solar cells (see Fig. 2 caption).
Maximum power generation occurs when there is an optimal trade-off between carriers exiting the device, which demands a low concentration of carriers to reduce recombination, and voltage production, which demands a high concentration of carriers. This optimum defines the so-called maximum power point, with associated Jmpp and Vmpp values. The fill factor FF is defined by the ratio (Jmpp·Vmpp)/(Jsc·Voc), and it indicates what fraction of the separate highest current Jsc and voltage Voc can be delivered simultaneously by the solar cell. The maximum value theoretically possible for the fill factor of a silicon solar cell is 89.3%, when considering only intrinsic recombination processes, namely Auger and radiative recombination (Fig. 2). In practice it can be negatively affected by other internal recombination losses and external shunts. The latter present a path for a leakage current to flow directly between the two terminals of the device. The fill factor is further lowered by resistive losses, due to the flow of current through materials with finite conductivity or cross-sectional area, or across interfaces between different materials (for example, the contact resistance between metals and semiconductors). These effects are usually represented in a simplified manner by lumped series and shunt resistance parameters, Rs and Rsh, respectively, which can be incorporated into an expanded form of eqn (7). Resistive losses are usually more severe than shunts, and they can be exacerbated by poor cell design.58 Accurate diagnosis of the Rs parameter, for which various methods exist,59 is essential in high-efficiency solar cell development.60
The delicate balance between the parameters described above determines the power conversion efficiency, η = Voc·Jsc·FF, which is typically measured with a solar radiation simulator under standard test conditions for terrestrial applications (air mass 1.5 global spectrum, 1000 W m−2, 25 °C).61
The most widespread industrial fabrication method for wafer-based silicon solar cells will be described below. The solar cell performance parameters that can be obtained in practice deviate from their “ideal” values. It is important to identify the most important limitations of the classic silicon solar cell structure, in order to understand the device designs and technology improvements that have already been, or are in the process of being, adopted by the photovoltaic industry. Fig. 4 and 5 present modelling results of the classic n+pp+ structure with the program PC1D,66 using parameters that are representative of many industrial silicon solar cells: a p-type wafer with a dopant density of 1 × 1016 cm−3, thickness of 150 μm, and minority-carrier lifetime of 100 μs; n+ front phosphorus diffusion with a surface concentration of 1 × 1020 cm−3, depth of 0.36 μm, sheet resistance of 100 Ω □−1, and front surface recombination velocity of 104 cm s−1; p+ aluminum-doped region with a surface concentration of 1 × 1019 cm−3, depth of 5 μm, sheet resistance of 40 Ω □−1, and rear surface recombination velocity of 107 cm s−1.
Fig. 4 Energy band diagrams of a classic n+pp+ silicon solar cell (a) in equilibrium and (b) at the maximum power point. Representative values were used to model the curves with the program PC1D66 (p-type wafer doped with 1 × 1016 cm−3 boron atoms, front n+ phosphorus diffusion with a surface concentration of 1 × 1020 cm−3 and depth of 0.36 μm, and back p+ aluminum-doped region with a surface concentration of 1 × 1019 cm−3 and a depth of 5 μm). (c) The electron and hole conductivities at the maximum power point, indicating that the n+ and p+ regions preferentially transport electrons or holes, respectively. |
Fig. 5 Analysis of recombination losses of the exemplary n+pp+ silicon solar cell described in Fig. 4. At the maximum power point, the main recombination loss occurs at the rear metal/semiconductor interface, while the p-type absorber region contributes 26% and the front n+ phosphorus diffusion (including its surface) contributes 24%. |
Fig. 4a shows the energy band diagram in equilibrium for such a silicon solar cell. The bending of the bands in the vicinity of both diffused regions indicates (i) that the concentrations of electrons and holes vary strongly with position (which can be described as a gradient of their chemical potentials), and (ii) that an electric field (evidenced by the gradient of the bands) is present. These two forces, the gradients of the chemical and electrical potentials, are identical in magnitude and opposite in direction, meaning that there is no net force acting on the carriers and no net movement, as indicated by the constant Fermi energy EF. The energy band diagram in Fig. 4b shows that, at the maximum power point, the Fermi energy splits into two quasi-Fermi energies, as a consequence of the excess concentration of carriers generated by the one-sun illumination. Although indistinguishable in the graph, a very small gradient of the quasi-Fermi energies drives electrons to the left and holes to the right. The reason for such directional flow of the two charge carriers can be seen in Fig. 4c, which shows that the electron conductivity is orders of magnitude higher than the hole conductivity on the left (the n+ region), and the hole conductivity much higher than the electron conductivity on the right (in the p+ region). The predicted conversion efficiency of this solar cell is 21.1% (Voc = 643 mV, Jsc = 39.3 mA cm−2, FF = 83.6%), neglecting any series or shunt resistance effects. A loss analysis at the point of maximum output power (Vmpp = 565 mV, Jmpp = 37.4 mA cm−2), is shown in Fig. 5. Although hypothetical, this example is representative of real devices, and it indicates that output power is limited by recombination at the rear metal contact and in the absorber region, with the front phosphorus diffusion, and its surface also causing significant losses.
Silicon solar cell manufacturing typically starts with chemical etching and surface texturing of the wafers.74 Usually, texturing is achieved by immersion of the wafers in a wet chemical bath, yielding identically textured surfaces at the front and back surfaces. The same step also removes several μm of damaged material resulting from the wire sawing. Potassium hydroxide (KOH) etching of (100)-oriented monocrystalline silicon wafers is anisotropic and results in randomly sized square pyramids with (111) faces,75 which reflect and refract the incident light at oblique angles, resulting in excellent antireflection and light-trapping properties.76 Texturing of multicrystalline silicon, which has grains of many different orientations, requires isotropic wet etching, usually based on acidic solutions.77–80 The reflectance of multicrystalline wafers after acidic texturing is higher than that of monocrystalline silicon after alkaline texturing. However, after deposition of an antireflection coating and encapsulation under glass in the module, the total photogeneration in a multicrystalline cell can reach 99% of that in a monocrystalline cell.81 For multicrystalline wafers, various types of submicron texture have been proposed to further improve reflectance.82,83 Very good results have also been reported using plasma texturing.31
After surface texturing (particularly after alkaline etching), the wafers need to be cleaned. Several strategies that usually include at least two steps are possible. First, a chemically oxidizing agent, e.g., an acidic peroxide solution, forms an oxide that “encapsulates” potentially harmful impurities present on the surface. Following rinsing in de-ionized water, the oxide is stripped off in a reducing chemical, usually hydrofluoric acid, which yields relatively inert (111) surfaces with hydrogen termination.84 The wafers are now ready for dopant diffusion, usually phosphorus, for the typical p-type silicon wafer, or boron, if an n-type wafer is used.
Diffusion is usually performed in high-temperature quartz furnaces by exposing the wafers to a gaseous environment containing the phosphorus atoms, typically nitrogen saturated with phosphorus oxychloride (POCl3). A small amount of oxygen is also introduced in the furnace so that a phosphorus–silica glass is grown on the wafer surfaces. It is from this glass that the actual diffusion of the dopant atoms into the silicon wafer takes place. Typical diffusion temperatures range from 760 to 850 °C for phosphorus, and slightly higher for boron. As the doping process is not selective, a diffused region is also formed on the rear and at the edges of the wafer and needs to be subsequently etched off. Typically, the sheet resistance of the resulting n+-type layer is in the 50–100 Ω □−1 range. Following diffusion, the phosphorus–silica glass is etched in hydrofluoric acid; at this point it is possible to also etch a very small amount of silicon to fine-tune the sheet resistance.
The primary purpose of forming a diffused region is charge separation. The n+-type layer at the front surface functions as an electron-selective contact, or electron transport region, by making the concentration of electrons much higher than that of holes, that is, by creating a large asymmetry between the conductivities for electrons and holes (see Fig. 4c). It would seem desirable that the concentration of phosphorus be as high as possible (the maximum electrically active concentration in silicon is about 3 × 1020 cm−3). However, such a high carrier concentration triggers detrimental electronic effects,85–87 including band gap narrowing and three-particle Auger recombination, which draws holes into the n+ region and thus reduces the selectivity of the contact, that is, its ability to “block” holes. Excess phosphorus can form precipitates, which may cause additional recombination. Auger, and possibly Shockley–Read–Hall, recombination not only limits the achievable voltage, but also reduces the blue response of the solar cell.86 A second function of the n+ layer is to connect the wafer absorber region to a metal electrode. To achieve a sufficiently low contact resistance between the metal and the semiconductor, a high concentration of phosphorus (typically in the 1 × 1020 cm−3 range) is required to promote quantum-mechanical tunneling across a thin potential barrier that arises as a consequence of the different work functions (electrochemical potentials) of the two materials.88 The prevalent approach in industry is to implement a phosphorus diffusion with a high surface concentration to achieve a low contact resistivity,89 while being very shallow to reduce absorption of ultraviolet and blue light and thus maintain a reasonable blue response; typically, the junction depth is between 0.2 and 0.3 μm below the surface. Such diffusion is susceptible to surface recombination losses, and a passivating insulator is usually deposited to suppress such losses.34 Since the metal contact is restricted to about 5% of the front surface, the diffused region must also provide lateral transport of the collected electrons towards the metal fingers that form the front electrode. The trade-off between the competing factors of carrier separation, bulk and surface recombination and lateral current transport makes the optimization of the front dopant diffusion quite complex, as discussed below in greater detail.
Phosphorus diffusion offers the additional advantage of impurity gettering. Briefly, gettering is the process where transition metals like iron, nickel, chromium, etc.90–92 diffuse from the bulk of the wafer towards the phosphorus diffusion.93,94 Once they are in the highly doped n+ surface region, these impurities are no longer harmful to device operation.95 This means that relatively impure, and thus cheaper, wafers can be used, making the complete cell process more cost effective. Phosphorus gettering has undoubtedly enabled the development of multicrystalline silicon solar cells.
Wafers are subsequently covered by an antireflection coating with a high transparency across the visible and infrared regions of the spectrum.96,97 The refractive index of the coating should be the geometric mean of the refractive indices n of glass (n ≈ 1.5) and silicon (n ≈ 4 in the visible), while its optical thickness dictates the wavelength at which minimum reflection occurs, which for terrestrial application is preferentially set around 600 nm.98,99 Hydrogenated amorphous silicon nitride (thickness ≈ 75 nm, n ≈ 2 in the visible), often just called silicon nitride, deposited by plasma-enhanced chemical vapor deposition at intermediate temperatures (about 400 °C) has been very successful for this purpose.100 Like the phosphorus diffusion, this layer has multiple functions. In addition to its antireflective properties, silicon nitride provides very efficient passivation of the phosphorus-doped surface.34 Combined with a moderately doped n+ diffusion (sheet resistance of about 100 Ω □−1), it can result in low recombination current densities of 100 fA cm−2 or less.19 Such excellent passivation is due mainly to hydrogen termination of silicon dangling bonds at the surface.35 In addition, silicon nitride layers contain a high positive fixed charge density (∼1012 elementary charges per cm2),101,102 which further increases the concentration of electrons and decreases that of holes at the surface, resulting in a reduced statistical probability of recombination, according to the Shockley–Read–Hall model. Hydrogenated silicon nitride has an added beneficial effect for multicrystalline silicon wafers, as the hydrogen contained in these films is released into the silicon wafer during the so-called contact firing step at the end of the cell process.77,103 The beneficial effect of hydrogenation on defective silicon was already established in 1980.104 Firing of the front metal contact through the silicon nitride layers has proven to passivate defects in multicrystalline silicon wafers very effectively, and it complements the prior POCl3 gettering step.105,106 In the modelling presented in Fig. 5 a minority-carrier lifetime of 100 μs was assumed, but much longer carrier lifetimes have been achieved, thanks to the combined effects of gettering, hydrogenation, and improved ingot growth technologies.
The front side is finalized by screen printing over the antireflection coating an array of silver finger gridlines (width 50–100 μm) usually connected by several busbars and, on top of the busbars, copper–tin stripes (width 1–2 mm). The screen printing paste contains a binder material (glass frit) that dissolves the metal powder, reacts with the silicon nitride and wets the silicon surface during high-temperature firing. During cooling, silver particles precipitate and adhere to the surface of the silicon wafer.107–110 It is critical to minimize shading, by reducing the width of the grid lines, in order to maximize the short-circuit current, but there is a trade-off between shading and resistive losses that needs to be optimized. Minimization of the metal/semiconductor contact fraction is critical to achieve a high voltage (see Fig. 5), but the contact fraction needs to be balanced against an increased contact resistance loss.
During the same firing-through step, the back contact is also formed. Usually a screen-printed aluminum paste is applied over the full back surface of the wafer.107,111–113 During firing, the aluminum forms a eutectic melt with silicon, consuming a similar amount (about 5–20 μm) of silicon. This fully melts and compensates (over-dopes with aluminum) the parasitic n-type region formed at the rear during phosphorus diffusion. During cooldown, a heavily aluminum-doped p-type epitaxial silicon layer forms near the rear surface of the wafer. In addition, this p-type region acts as a hole-selective contact to the p-type silicon absorber. Similar to what was observed above about the n+ region, it would be desirable to implement a very high concentration of aluminum dopant atoms (hence of holes), but the solubility of aluminum in silicon is limited to about 1 × 1019 cm−3. The selectivity of this contact region in terms of blocking electrons is limited by heavy-doping effects such as band gap narrowing114,115 and Auger recombination,116 whereas impurity and carrier–carrier scattering, which limit the minority-carrier mobility, are beneficial in this instance. The eutectic mix that remains on the wafer makes it impossible to apply dielectric coatings to passivate the wafer surface, unless it is etched off. This can lead to high recombination losses, as shown in Fig. 5. To keep minority electrons from reaching the rear metal/silicon interface, a thick p+ layer is used, so that the total conductance (conductivity divided by distance) for the electrons is low. Optimized aluminum-doped regions can reach a recombination current parameter J0 of about 500 fA cm−2,117 but a value of 1000 fA cm−2 is more typical. The latter can be expressed in terms of an effective surface recombination velocity of about 1000 cm s−1 (note that, for a given aluminum-doped region, the surface recombination velocity scales inversely with the dopant density of the wafer, in low injection). The aluminum also acts as a back reflector, albeit a poor one118,119 (that is made even worse by the alloying process), reflecting back into the silicon absorber a fraction of the infrared light that has not been fully absorbed during the previous passage through the silicon wafer.120 Silver-paste strips are usually printed on the rear to enable soldering to the copper interconnects, which “string” the front grid of one cell to the back contact of the neighboring cell in a module. Finally, the parasitic phosphorus diffusion present at the edges is removed by laser scribing around the perimeter of the wafer.
Next, each solar cell is individually measured and sorted according to efficiency and current. The latter is of extreme importance, as cells are connected in series to form strings, which requires that each individual cell contribute an identical current. The module is finished by encapsulating the solar cell strings between a front glass plate and a polyethylene terephthalate (PET) or tedlar/PET/polyamide (TPA) back sheet by means of a lamination process that includes melting of an ethylene vinyl acetate (EVA) sheet.
Industrial silicon solar cells fabricated with the process scheme described here, or variations of it, typically deliver efficiencies of up to 19.5% for monocrystalline and up to 17.8% for multicrystalline substrates.121 Advances in module technologies, including the use of antireflection coatings on the outer glass, result in cell-to-module power ratios close to 100%.5 Nevertheless, the frame, interconnection and other losses cause module efficiencies to be typically 1.5–2% lower than the cell efficiencies.
The great simplicity and robustness of multicrystalline silicon technology explains its current dominance in the photovoltaics market, with a share of about 56%.122 However, over the past years, the price of silicon has dropped significantly, while its electronic quality has improved.6 As a consequence, monocrystalline silicon has become increasingly attractive for solar cell fabrication, with a current market share of about 35%. To fully exploit the benefits of such higher quality material, more sophisticated device designs and fabrication processes are needed. To guarantee overall lower $/Watt values, compared to multicrystalline technology, such processes should remain cost effective and deliver high efficiency. Several factors explain the drive towards higher efficiency silicon solar cells. High-efficiency solar modules require less mounting hardware and space and result in a lower balance-of-system cost. Such modules also yield higher energy densities, which may be important for applications where space is at a premium. Higher efficiency solar cells also usually perform better at higher ambient temperatures and reduced illumination levels, compared to their lower efficiency counterparts. To further increase the energy yield, high-efficiency modules can be combined with solar tracking systems.123
While today's state-of-the-art R&D silicon solar cells can deliver efficiencies above 25%, the performance of industrial cells remains constrained by economic factors. Many of the features enabling high efficiency cause a significant rise in processing or equipment costs. However, identifying and understanding the limitations of the traditional process scheme enables the development of innovative concepts that might lead to higher efficiencies at lower cost. In the following we first discuss briefly how the standard dopant diffusion technology can be “upgraded” towards higher efficiencies. Next, we discuss two archetypal high-efficiency cell architectures, namely interdigitated-back-contact and silicon heterojunction solar cells. Finally, we discuss recent trends combining high voltage and current, as well as simple processing, by using alternative self-passivating and dopant-free contacting schemes.
Restricting the aluminum alloyed p+ region to a small fraction (about 1–5%) of the rear surface while passivating the rest with an insulating material has significant electronic and optical benefits. In this approach, which is commonly referred to with the acronyms PERC (Passivated Emitter and Rear Cell), PERL (Passivated Emitter, Rear Locally-doped) or PERT (Passivated Emitter, Rear Totally diffused),1,130 local contact openings (in industry typically as lines) are made in the insulator using, for example, laser ablation (Fig. 6). Subsequently, an aluminum paste is screen printed over the full rear surface and fired, so that local p+ regions are formed within the openings in the dielectric. This approach is similar to so-called laser-fired contacts, where local openings are made after the final rear metallization.32,131 In either case, the result is the formation of an almost ideal back surface mirror, since internal reflection inside the silicon device significantly benefits from the presence of a low refractive index material between the metal and the silicon wafer.132,133 Free-carrier absorption in the classic, uniform p+ aluminum-doped region is also avoided.
But the greatest benefit from the localized contact approach comes from the superior control of surface recombination achievable with insulating films. Arguably the best known among such films is created by high-temperature oxidation of silicon surfaces to form silicon oxide,28 which can yield very low interface state densities,133 combined with a level of charge-assisted passivation.26 Although resulting in low surface recombination velocities, high-temperature thermal oxidation can deteriorate the bulk carrier lifetime due to dissolution of impurity clusters in the multicrystalline material.134 Even if intelligent process sequencing to maximize phosphorus gettering can be used to circumvent the problem, a second high-temperature step can add cost and complexity to solar cell fabrication. Because of that, deposited films are generally preferred in industry to achieve passivation of the rear surface. Hydrogenated amorphous silicon nitride, commonly used at the n+ front, is unsuitable for rear surface passivation in actual solar cells: even though good surface passivation can be obtained on p-type surfaces,135 the presence of such a layer at the rear in solar cells causes undesired shunting at the local rear contacts.136
The search for a suitable dielectric to passivate p-type silicon surfaces has been increasingly intensive since the early 2000s.37,137–141 A breakthrough came with the advent of aluminum oxide, which is a negative fixed-charge dielectric,39,40 essentially avoiding the shunting path caused by silicon nitride in locally contacted solar cells. Such films show a very high negative fixed-charge density (around 1013 cm−2),27 strongly attracting holes to the surface and thus creating a p+ accumulation layer, which helps to suppress electron recombination at the rear surface. Aluminum oxide layers can be deposited with a variety of techniques, including atomic layer deposition,39,40 plasma-enhanced chemical vapor deposition,142,143 atmospheric pressure chemical vapor deposition,144 and sputtering.145 As most of the charges are located very close to the silicon surface, these layers can be kept very thin (a few nanometers), although they are usually capped with a thicker silicon nitride146 or silicon oxide147 layer to improve internal optical reflection in the device. In case no blanket metallization is applied, the developed cells can be used for bifacial applications.70,148 Importantly such stacks can be engineered to withstand contact firing,149–153 To fully exploit the benefit of dielectric-layer integration at the rear of solar cells, it may be desirable to polish the rear side of the silicon wafer.101,154–156 As aluminum oxide is an excellent passivation layer for p-type surfaces, very successful results have also been reported integrating this dielectric at the front, boron-diffused region of n-type solar cells.157
The idea of restricting the contacts to lines or points, while passivating most of the surface with an insulator was applied in 1989 to the rear undiffused side of p-type silicon solar cells in ref. 19 (line contacts, silicon nitride passivation) and in ref. 158 (point contacts, silicon oxide passivation) for small laboratory devices. By adapting and scaling up such concepts, the photovoltaic industry is currently developing similar cell designs.153 A record industrial partial rear contact (PERC/PERL) solar cell on p-type silicon wafers was recently announced by Trina Solar, China, reaching an independently certified efficiency of 22.13% (see Table 1).12,315
Despite these factors, p-type silicon remains the material of choice for the photovoltaic industry. An important reason for this is to be found in the solidification of silicon from its molten state. Boron has a segregation coefficient close to 1, which results in a small variation of its concentration along the silicon ingot and a relatively tight distribution of wafer resistivity. In contrast, phosphorus has a low segregation coefficient that results in a strong variation of wafer resistivity along the ingot (approximately a factor of 10). Although not insurmountable, it is an obstacle for industrial processes and device designs with tight wafer resistivity specifications.
Yet another reason for the predominance of p-type silicon is the relative simplicity and proven expertise of implementing the thermal diffusion of phosphorus to form the p–n junction on a p-type wafer, compared to the relative novelty and higher temperature of boron diffusion. The traditional n+pp+ firing-through process sequence described in Section 2.2. cannot easily be transferred to n-type wafers. The p+nn+ device structure corresponding to the latter requires both boron and phosphorus diffusions, since an n-type dopant element (donor) that may be alloyed to silicon does not exist. This issue was recently circumvented in a 22.5% device featuring an n+np+ structure, where the p+ region was located at the rear, and where contact firing was replaced by low-temperature copper-plated metallization.160,174
Despite this, the principal advantage of n-type silicon over p-type in terms of resilience to metal contaminants is largely wiped out by the gettering action of the phosphorus diffusion and the aluminum alloying. In this context, the possibility to make high-efficiency diffused-junction solar cells from p-type silicon wafers was recently further underlined by Trina Solar, China, announcing efficiencies of 22.13 and 21.25%, using p-type monocrystalline and multicrystalline wafers, respectively (Table 1). There remains the light-induced degradation caused by boron–oxygen complexes, but a cure for the defect seems to have been found,175 possibly linked to the introduction of hydrogen into the wafer.176 The use of alternative p-dopants, such as gallium, may be a strategy to circumvent this degradation issue,177 provided that homogeneous doping through a full ingot can be established. In either case, the use of high-lifetime wafers with classic device structures such as the so-called aluminum back surface field solar cell would only marginally improve device performance. To better exploit the merits of n-type wafers motivates the introduction of alternative device architectures, of which the two most archetypical are the interdigitated-back-contact solar cell and the heterojunction solar cell.
Finally, as described in Section 2.2, monocrystalline and multicrystalline wafers are obtained from a wire-cutting process, with a typical associated kerf loss of about 100 μm per cut wafer. This explains the quest for “kerf-less” crystalline silicon technologies, including silicon ribbon growth,178,179 film (re-)crystallization,180–182 and silicon epitaxial growth,183–189 possibly combined with lift-off, controlled spalling or other techniques to detach thin silicon absorbers from a thicker substrate190,191 or growth template.192,193 Several strategies have been developed to increase light coupling in ultra-thin silicon (<50 μm) and fabricate solar cells from such material.194–204 In particular Solexel's 239.7 cm2 cell using 35 μm-thick silicon delivered a remarkable power conversion efficiency of 21.2%.11
An important factor for this high performance is the fact that IBC cells achieve high short-circuit currents by completely eliminating metal grid shading at the front surface (Fig. 7). In the IBC design, both electron and hole collection occur at the rear side of the device. This permits a high degree of freedom in the optical and electronic design of the front side of the cell, evidenced by a short-circuit current density as high as 41.33 mA cm−2 for the record IBC cell. Front surface passivation, for example by silicon oxide in combination with silicon nitride as an antireflection layer, can be complemented by a lightly diffused n-type layer, which suppresses the concentration of holes near the pyramidally textured surface. Other possibilities for maximizing light coupling into the wafer include the use of black silicon as a broadband antireflection coating,211–214 and multiscale surface texture.215 Nevertheless, it is essential that such optical schemes be compatible with high-quality surface passivation.
In a possible fabrication sequence, boron diffusion is applied to part of the back surface to selectively transport holes. In the remaining part of the back surface, phosphorus is locally diffused to selectively collect electrons. Hence the cell structure consists of alternating, or interdigitated, stripes of n-type and p-type doped regions. Optimization of the widths of the stripes is essential for effective carrier collection and depends on the carrier diffusion length and on the recombination properties of the phosphorus- and boron-doped regions. Since electron mobility is approximately three times higher than hole mobility in moderately doped silicon, some IBC structures favor a one-dimensional flow to holes, by covering a larger fraction of the rear side (for example, around 75%) with a p+ region. This also reduces the buildup of hole concentration at the front surface, which would exacerbate recombination there. Electrons flow mostly laterally towards the n+ rear stripes, not only through the n-type wafer, but also through the front n+ diffusion, when present. Nevertheless, the IBC cell structure needs to be specifically optimized for a given set of recombination and transport properties.
A thin insulating layer is used to passivate the back surface of the wafer.216 Electrical contact is made by metal stripes through local openings etched into the passivation layer. The metal stripes are aligned to the doped regions but they are slightly narrower, to avoid overlap with neighboring stripes, which would cause a shunt. The openings must be large enough to extract current with minimal contact resistance losses and small enough to minimize recombination losses caused by the direct contact of the metal to the silicon. A high fill factor of 82.7% was achieved for the record IBC cell, despite its large area, with this local contact design. A significant advantage of placing both metal contacts at the rear is that they can be optimized without having to trade off resistance for shading. The metal stripes can, in fact, almost fully cover the rear surface, and thus simultaneously act as a back reflector. The thin dielectric layer between the silicon and the metal stripes helps to minimize parasitic plasmonic absorption of infrared light in the metal layer.132
An alternative to minimizing the contact area between the doped silicon and the metal stripes is to incorporate passivating contacts based on doped polysilicon layers,287 which can relax those requirements. With an open-circuit voltage of 737 mV, the record IBC cell demonstrates remarkable bulk lifetime, surface passivation and contact passivation. However, in terms of open-circuit voltage, silicon heterojunction technology can provide even better performance.
The silicon heterojunction concept is based on two critical innovations. First, it makes use of a thin hydrogenated amorphous silicon layer to achieve excellent surface passivation.42,43,45 To ensure such passivation, it is critical that deposition processes be tuned to obtain atomically sharp interfaces between the wafer and buffer layers, devoid of any unintentionally grown epitaxial silicon.219–222 Second, this thin passivating film is inserted underneath the electron-selective and hole-selective contact layers,44 yielding virtually recombination-free surfaces, even for the areas contacted by the metal electrodes (Fig. 8). This translates into a very high open-circuit voltage,223 with values as high as 750 mV, obtained by Panasonic for a two-side-contacted cell with an efficiency of 24.7%.218 Note that the theoretical, Auger-limited open-circuit voltage for a wafer with similar thickness (∼110 μm), is 761 mV,17,224 underlining the remarkable passivation achieved with this technology.
The fabrication process sequence starts with surface texturing and cleaning, followed by passivation of both sides of the silicon wafer with a thin layer of intrinsic hydrogenated amorphous silicon.46 These films are usually deposited by plasma-enhanced chemical vapor deposition and measure only about 5 nm in thickness.225–227 These films can be considered the “heart” of the silicon heterojunction solar cell, as they yield very effective passivation, while simultaneously being transparent for charge carrier transport. As a consequence, their electronic228–231 and microstructural232,233 properties as well as their deposition processes234–238 have been extensively studied. Rather than relying on dopant diffused regions of the same material (crystalline silicon) to separate the charge carriers, in silicon heterojunction technology such separation is achieved by a combination of doping and use of a wider band gap material, producing nearly ideal carrier-selective contacts. To form these, doped amorphous silicon layers with thicknesses of about 10 nm are deposited on top of the intrinsic layer. Boron is used as a dopant to obtain a p-type layer for transporting the holes, and phosphorus is used to obtain an n-type layer for conducting the electrons. Both dopants are incorporated into the films by adding relevant precursor gasses during film deposition, such as trimethylboron and phosphine. Direct deposition of the doped layers on the crystalline silicon surface degrades passivation, as dopant incorporation generates a significant amount of recombination-active defects in amorphous silicon, explaining the need for intrinsic buffer layers in this technology.239,240 The doped layers may alter the surface passivation when deposited on the intrinsic buffer layers because they can change the carrier concentrations inside the wafer (this is evidenced in Fig. 9 by a bending of the energy bands in equilibrium).241 Interestingly, the silicon heterojunction process sequence can be easily applied to either n-type or p-type wafers,242 with n-type wafers delivering slightly higher efficiencies due to the fact that such surfaces are usually easier to passivate than their p-type counterparts, as discussed above. With this technology it is also fairly straightforward to change the polarity of the device.46,162,243,244 Due to the asymmetric band offsets at the amorphous/crystalline silicon interface, holes usually face a larger barrier than electrons, potentially hindering efficient carrier collection (see Fig. 9).245,246
Fig. 9 Energy band diagram of a silicon heterojunction solar cell in equilibrium showing the valence band offset at the interface between the n-type crystalline silicon (n c-Si) absorber and the intrinsic hydrogenated amorphous silicon passivation layer (i a-Si:H). Representative values were used for the modelling of the curves with the program PC1D66 (n-type wafer doped with 1 × 1015 cm−3 electrons, amorphous silicon with a band gap of 1.8 eV, and electron and hole concentrations of 1 × 1019 cm−3 for n-type and p-type amorphous silicon respectively; for indium tin oxide (ITO), a band gap of 3.3 eV and an electron concentration of 1 × 1021 cm−3 were chosen). Layer thicknesses along the horizontal axis are not to scale, for readability. In particular, the depletion region extends about 1.5 μm into the crystalline silicon wafer. |
Full-area contacts are formed by sputtering an indium tin oxide transparent front electrode. As the lateral conductivity of the doped amorphous silicon films is relatively poor, lateral current transport to the metal fingers needs to be provided by the transparent conductive oxide film, requiring a relatively low sheet resistivity of about 50–100 Ω □−1, similar to that of a typical diffused region in classic crystalline silicon solar cells. Thanks to its low refractive index of about 2, this layer is also well suited as an antireflection coating (sometimes in conjunction with a second layer of magnesium difluoride to further minimize reflection losses).60 The transparent conductive oxide is also important to guarantee a sufficiently low contact resistivity, explaining its use at the rear side as well. There, it also helps to reduce parasitic plasmonic absorption of light at the silver back contact, in case this metal is deposited as a blanket layer.132 The cells are finalized by screen printing a silver finger and busbar grid on the front side; copper-plated metallization is an attractive alternative.247–249,370
Compared to the IBC concept, which produces a current density of 41.8 mA cm−2, the silicon heterojunction cell from Kaneka, featuring contacts on opposite sides, delivers a slightly lower short-circuit current density of 40.8 mA cm−2. These losses are caused not only by grid shading, but also by parasitic absorption in the window layers. Optical losses at the front and back surface of silicon heterojunction cells were analyzed in detail in ref. 227 and 250. At the front side, parasitic absorption in the doped and intrinsic amorphous silicon layers with a relatively narrow band gap of about 1.8 eV represents the main contribution to current losses in the blue and ultraviolet part of the spectrum. In the red and infrared part of the spectrum, current is lost mainly through free-carrier absorption in the front and back indium tin oxide electrodes as well as through parasitic plasmonic absorption in the silver back reflector.
Several approaches to improve the short-circuit current of silicon heterojunction cells have been explored, including the replacement of the doped amorphous silicon layers by wider band gap hydrogenated amorphous silicon oxide245,251,252 or silicon carbide layers,253,254 or by replacing the indium tin oxide with higher mobility transparent conductive oxides such as hydrogen-doped indium oxide,255–263 tungsten-doped indium oxide,264 cerium-doped hydrogenated indium oxide,265 and amorphous indium zinc oxide.266 While such transparent conductive oxides clearly lead to an increase in the current density, the use of hydrogenated amorphous silicon oxide or silicon carbide often results in a reduced fill factor, and neutralizes the gains in short-circuit current. In general, fill factor losses related to transparent conductive oxides are due to a suboptimally matched work function,267,268 or to increased sheet or contact resistances between the transparent conductive oxide and the doped amorphous silicon layers.269 Transparent conductive oxides typically exhibit n-type conductivity and consequently readily form an Ohmic contact to n-type hydrogenated amorphous silicon. As p-type transparent conductive oxides suffer from relatively low hole mobilities caused by the large effective hole mass of most oxides,270 contact to p-type amorphous silicon is also commonly established with n-type transparent conductive oxides.271 This recombination junction requires a relatively high carrier concentration in the oxide at least near the interface with p-type amorphous silicon to enable tunneling of carriers across the interface and avoid fill factor losses.259 The deposition process for transparent conductive oxides, such as sputtering, may also lead to undesired performance losses.272 These combined factors motivate the engineering of gently deposited, well-tuned transparent conductive oxides, possibly as multi-layer stacks.273
An alternative approach has made use of a perforated insulating magnesium difluoride layer between the amorphous silicon and transparent indium oxide back electrode, which improves the infrared response significantly as the reflection is increased due to higher refractive index contrast.274 Finally, conformal atomic layer deposition of transparent conducting oxides on black silicon has been demonstrated,275 possibly offering optical advantages. It remains to be seen whether similarly conformal amorphous silicon layers can be produced, yielding efficient devices.
The idea of using an ultra-thin layer of silicon oxide between metal and semiconductor was exploited in early metal insulator semiconductor (MIS) solar cells277,278 and subsequently applied to devices that had an n–p junction (MINP).279 The use of an ultra-thin film of aluminium oxide deposited by atomic layer deposition onto a phosphorus-diffused region has recently been found to increase the open-circuit voltage by 15 mV, at the expense of a tolerable increase in contact resistance.280,281 Another recent development is an enhanced MIS approach, in which the chemical passivation afforded by a thermal silicon oxide tunnel layer is enhanced by hydrogen originating from a hydrogenated amorphous silicon layer that is carefully alloyed with aluminum.282 This enhanced MIS contact has been applied to the back side of p+nn+ solar cells, which achieved a 21% efficiency.283
Even more effective is to place a ∼1.2 nm-thick silicon oxide layer underneath a ∼30 nm-thick doped polycrystalline (or mixed amorphous/crystalline) silicon film to form what in bipolar transistor technology has been called a polysilicon contact. The thin interlayer can be formed by low-temperature thermal oxidation, immersion in a chemical bath, or by ozone treatment. Selective tunnelling of one type of carrier through the oxide film is required for effective current transport, explaining the need for accurate control of the oxide thickness. The silicon layer is usually deposited by plasma-enhanced chemical vapor deposition, either directly as polycrystalline silicon or as hydrogenated amorphous silicon. Frequently a dopant (phosphorus or boron) is incorporated in situ;284 alternatively, it can be subsequently introduced by ion implantation,285 thermal diffusion from a gaseous source286 or from a doped oxide.287 In all cases, the dopant is activated at a temperature in the range of 800–900 °C, which partially crystallises the initial amorphous silicon layer. Lastly, a hydrogenation treatment, either from a plasma or from annealing in forming gas (i.e. a mixture of nitrogen and hydrogen), is used to further reduce interface recombination. The high temperatures used to form polysilicon contacts makes them, in principle, compatible with the firing-through of a screen-printed front metal grid,288 although it is still unclear if such a process may be applied to the thin polysilicon layer itself. The performance achieved by phosphorus-doped polysilicon contacts is similar to that achieved by the silicon heterojunction technology in terms of recombination current density, which can be as low as J0c ≈ 1–10 fA cm−2, together with contact resistivities approximately one order of magnitude lower than the silicon heterojunction technology, ρc ≈ 20 mΩ cm2.282–284 The application of a tunneling oxide plus an n+ silicon film coated with silver as a full-area rear contact has led to a 25.1% efficient solar cell, using a textured front side, but planar rear side.289 Nevertheless, contacts based on p+ polysilicon seem to be harder to optimize, possibly related to excessively large valence band offsets with the silicon wafer, and their selectivity parameters are not yet as good as those of n+ contacts.290 The 25.1% device mentioned above was made on an n-type silicon wafer that also incorporated a selective boron diffusion on the front surface (heavier under the metal fingers). Similar devices that combine a thermal boron diffusion with a rear n+ polysilicon/silicon oxide contact have been reported recently, albeit with lower efficiencies.8
A glimpse outside silicon photovoltaics proves that doping is not a necessary ingredient for solar cell construction.291 Cadmium telluride (CdTe) thin-film solar cells use a thin, undoped, naturally n-type cadmium sulfide layer with a low carrier concentration,292 deposited typically by chemical bath deposition, as an electron-selective contact. They also use a naturally p-type zinc telluride layer to facilitate hole extraction out of the cadmium telluride absorber layer to the molybdenum metal back contact. A similar strategy is used also for copper indium gallium selenide (CIGS) and copper zinc tin selenide (CZTS) solar cells. As early as 1977, cadmium sulfide was tested as an electron-selective contact to p-type silicon, but efficiencies remained below 10%.293
Dye-sensitized solar cells, in their earliest implementations, used titanium dioxide (TiO2) to extract electrons and the redox potential of a liquid iodide/triiodide electrolyte to extract the holes from a photoexcited dye absorber.294 Titanium dioxide is still a popular electron contact and is also commonly employed for lead halide perovskites295 and even III–V absorbers.296 A heterojunction solar cell employing a p-type silicon absorber with a titanium dioxide electron contact was reported in ref. 297, but suffered from a low open-circuit voltage of 520 mV and, consequently, low efficiency. The application of TiO2 to n-type silicon wafers, motivated by evidence of reasonably good surface passivation,298,299 has been more successful. Recently, a 19.8% efficient n-type silicon solar cell with a front boron diffusion and a rear full-area TiO2 passivating contact has been reported.300 Adding a tunneling silicon oxide layer to the contact structure further reduced recombination, and led to a 20.5% conversion efficiency.301
To extract holes, lead halide perovskite solar cells typically employ a p-type polymer such as 2,2′,7,7′-tetrakis(N,N-di-p-methoxyphenylamine)-9,9′-spirobi-fluorene (spiro-OMeTAD). P-type polymers including spiro-OMeTAD or poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) have also been employed as hole front contacts for n-type crystalline silicon, and have recently reached an efficiency of 13.8% (see supplementary information in ref. 302 for a compilation of polymer/silicon hybrid cell performance data preceding the cells reported in ref. 303). Nevertheless, their air and ultraviolet stability remains a major concern.304 As an alternative to polymer contact layers, the organic photovoltaic community introduced transition metal oxides as hole-selective contacts. In particular the adoption of substoichiometric molybdenum trioxide (MoOx, x < 3) led to significant improvements in device performance and stability.305,306
The use of substoichiometric molybdenum trioxide (MoOx) as a hole contact for n-type crystalline silicon was first introduced in ref. 302. With its very high work function of up to 6.6 eV, exceeding that of elemental metals, MoOx can act as an efficient hole contact without the use of doping. While the first MoOx–silicon heterojunction cell reached an efficiency of only 14.3%, it already outperformed the best polymer/silicon hybrid cells at that time. Subsequently, an efficiency of 16.4%307 followed by 16.7%308 was achieved for a solar cell made by depositing MoOx directly onto an n-type silicon wafer.
A significant boost in efficiency was achieved by combining the MoOx hole contact with an intrinsic hydrogenated amorphous silicon passivation layer.309 The cell structure is identical to the silicon heterojunction cell discussed in Section 4.2., but replaces the narrow band gap p-type amorphous silicon layer with the wide band gap MoOx (3.3 eV, see Fig. 10), resulting in a substantial current gain of 1.9 mA cm−2, thanks to an improved capture of the blue and ultraviolet region of the spectrum, and a respectable efficiency of 18.8%. Importantly, the open-circuit voltage of this cell was as high as for a co-processed silicon heterojunction reference cell with the standard amorphous silicon layer, demonstrating that MoOx deposition did not deteriorate the surface passivation. However, due to a low fill factor of only 67.2%, the cell efficiency did not exceed the 20% benchmark.
Fig. 10 Energy band diagram of a MoOx–silicon heterojunction solar cell in equilibrium. Comparison with Fig. 9 reveals that n-type MoOx has an effect similar to that of p-type amorphous silicon on band bending in the crystalline silicon absorber due to its high work function. Representative values were used for the modelling of the curves with the program PC1D66 (n-type crystalline silicon wafer doped with 1 × 1015 cm−3 electrons, amorphous silicon with a band gap of 1.8 eV and electron concentration of 1 × 1019 cm−3 for the n-type amorphous silicon; for MoOx and ITO, a band gap of 3.3 eV and an electron concentration of 1 × 1016 and 1 × 1021 cm−3 were assumed). Layer thicknesses along the horizontal axis are not to scale for readability. In particular, the depletion region extends about 1.5 μm into the crystalline silicon wafer. |
The fill factor issue was finally solved in ref. 310, where the annealing temperature after screen printing of the silver finger grid was reduced from 200 to 130 °C. Low-temperature annealing avoids the formation of an interfacial layer between MoOx and the indium oxide transparent electrode, which is believed to be responsible for the low fill factor previously observed. A remarkable fill factor of 80.4% and an independently certified efficiency of 22.5% were finally obtained by replacing the screen-printed finger grid with a copper-plated finger grid, which does not require annealing at 200 °C.310
The use of MoOx as an excellent Ohmic contact to p-type silicon even without a passivation layer was proposed in ref. 311. Contact resistivities as low as 0.2 mΩ cm2 and recombination current densities of 200 fA cm−2 were demonstrated. Consequently, an interesting application of MoOx is as a hole contact at the back of p-type silicon solar cells, where it can replace local p+ regions formed by aluminum alloying or boron diffusion. A proof of concept device with an efficiency of 20.4% has been demonstrated.312 A device employing a PEDOT:PSS full area hole contact at the back of a p-type (n-type) silicon solar cell reached an efficiency of 20.6% (18.3%).313,314 Implementing PEDOT:PSS at the flat back avoids the challenges associated with spin coating on a textured surface and resolves the issue with ultraviolet stability.
From Fig. 1, a similar scenario can be observed for modules. Indeed, while the best module efficiency achieved to date (22.9%, by UNSW) was certified as early as 1996 for a minimodule area of 778 cm2, SunPower has demonstrated an independently certified full-sized 15739 cm2 module with an efficiency of 22.8%.12 Although this review has not described module fabrication technologies, the trends shown in Fig. 1 indicate that it is just a question of time until progress in solar cell performance translates into higher module efficiencies. This applies both to best-of-a-kind modules and to those produced at large scale.316
Two ingredients are necessary at the cell level to achieve high efficiency: an excellent interface passivation scheme and efficient carrier-selective contacts. While classic crystalline silicon solar cells use doping to achieve the latter, several dopant-free concepts have emerged. Molybdenum oxide has been proved to function as a highly efficient hole contact for both n-type and p-type silicon.302,307–310 Such dopant-free contact concepts show great promise for silicon solar cells as a potential route to minimize Auger recombination in the carrier-selective regions. Fully dopant-free silicon solar cells are under development at several research laboratories.317,318 The dopant-free device with the highest reported efficiency, close to 20%,319 uses a molybdenum oxide film as a hole-collecting layer and a stack of lithium fluoride and aluminum as the electron-collecting contact. Underneath both contacts, intrinsic hydrogenated amorphous silicon films are inserted for interface passivation.
It is known, not only from the photovoltaic industry, but also from the semiconductor and battery industries, that it may easily take 10 or 20 years to bring new materials and concepts to the market. In principle, a new concept must offer advantages, not only in terms of the properties of its constituent materials, but also in view of their integration into the device, achievable device performance, manufacturability and yield, operational stability, reliability, and cost. The $/W ratio is still a commonly used metric to quantify the cost vs. output power trade-off of different photovoltaic technologies. In recent years, it has become clear that a more relevant metric is the levelized cost of electricity (LCOE), as photovoltaics are competing against other technologies to provide energy in an economic manner. The LCOE, given in units of $/kW h, takes into account not only the cost to build, but also to operate, a system over its lifetime, divided by the total energy output over that lifetime. It is important to realize that a higher efficiency at the cell level impacts the LCOE positively, with a large leverage, while reducing the cost per cell in a module affects the LCOE only marginally, as the sum of fixed costs associated with the glass, back sheet, junction box and balance of system cost, etc. dominate.320 Consequently, there is an opportunity for new concepts to be economically viable even at higher cost.
Fig. 11 Solar spectral irradiance (air mass 1.5 global spectrum) and contributions absorbed by the top (blue) and bottom cell (red) of a two-terminal perovskite/silicon tandem solar cell.361 The total absorbed radiance includes the black area. |
The current density in a tandem is, therefore, half that of a silicon solar cell. The voltage of the two-terminal tandem device is the sum of the voltages of the individual subcells. Given that the material placed on top of the silicon has a wider band gap, it can be expected to produce a higher voltage. Hence the voltage of the tandem cell can be expected to be more than two times higher than the voltage of the single silicon cell, thus resulting in a greater output power. To what extent the voltage, and hence the efficiency, increases depends on technological factors such as interface passivation and contact strategies.
From a pure performance perspective, the most attractive tandem uses a III–V semiconductor solar cell with the appropriate band gap, such as e.g. indium gallium nitride (InGaN) or indium gallium phosphide (InGaP), as the top cell in combination with a silicon bottom cell.329–333 In a four-terminal configuration, efficiencies as high as 29.8% were recently demonstrated for a mechanically stacked III–V/silicon tandem.12 Despite this high efficiency, monolithic two-terminal tandems represent arguably the most elegant tandem design but pose formidable challenges in terms of hetero-epitaxial material growth.334–338 III–V/silicon tandem solar cells fabricated via growth of III–V layer stacks on epitaxial substrates combined with lift-off and layer transfer techniques have been demonstrated, but remain difficult to scale to large volume production.339–343 However, a method for the growth of III–V layers on non-epitaxial substrates has recently been introduced that could change this situation.344,345
A recent analysis revealed that established thin-film technologies based on hydrogenated amorphous silicon or the family of copper indium gallium selenide (CIGS) and copper zinc tin selenide (CZTS) compounds cannot offer a wide band gap top cell with sufficient efficiency to improve or even maintain the efficiency of a >25.0% efficient bottom cell.346 If the silicon cell is dominated by Auger recombination, a halving of the number of photogenerated electrons and holes also implies that its open-circuit voltage gets reduced by 12 mV, compared to full one-sun illumination (18 mV or more if dominated by extrinsic recombination).
A suitable top cell for high-efficiency crystalline silicon bottom cells may be offered by organic–inorganic perovskites.347–349 This material class has only recently been considered for photovoltaic applications, and has achieved a fast progress in device efficiency ever since.350–355 The best single-junction devices use lead-halide-based perovskites as the optical absorber, and have reached efficiencies as high as 21%.356 The band gap of the perovskite absorbers for these single-junction record devices is around 1.57 eV, which is lower than the ideal band gap of 1.7–1.8 eV of a top cell for a silicon-based tandem. Blending lead-iodide-based perovskites with their lead bromide counterparts can open the band gap to the ideal value of 1.7–1.8 eV.357,358 Careful engineering of mixed-cation lead mixed-halide perovskites may resolve the photo-stability issues of wider band gap perovskite absorbers.359 Despite this, using the well-established 1.57 eV band gap lead-iodide-based perovskite can also already be a meaningful approach to significantly boost the efficiency of silicon solar cells; modelling predicts efficiencies of around 30%, largely independent of the precise device design.360 In principle, a four-terminal device offers higher flexibility in device fabrication, as current matching does not need to be respected. However, two-terminal perovskite/silicon tandem solar cells are the most attractive combination of these technologies. The use of a silicon heterojunction solar cell as the bottom cell is particularly attractive.361,362 This demands a perovskite top-cell fabrication process below 200 °C to avoid damage to the bottom cell. With this scheme, monolithic tandem efficiencies of 21% were recently obtained.359 Due to the relatively low refractive index of perovskites,363 the perovskite top cell could act as a “photovoltaic-active” antireflection coating for the bottom silicon solar cell.360 A third possible approach to combine such different technologies is based on spectral splitting technology, with a demonstrated efficiency of 28%.364
The main challenge for tandem architectures is parasitic light absorption,365 for two reasons. Firstly, because of the additional contact (and passivation) layers, additional parasitic absorption is difficult to avoid. Secondly, because the current is cut approximately to half, the overall power conversion efficiency is more strongly affected by optical losses. For example, a 1 mA cm−2 loss in current density due to parasitic absorption in a single-junction crystalline silicon solar cell with 40 mA cm−2 reduces the efficiency by 2.5%, while the same current density loss reduces the efficiency of a two-terminal tandem cell with 20 mA cm−2 by 5%. These arguments hold in particular for perovskite top cells in a tandem architecture; a suitable hole contact layer for perovskite absorbers that overcomes these challenges has yet to be found; the search is ongoing for layers with broadband transparency that are deposited with a process that does not detrimentally affect the underlying layers.366–369 On the other hand, the lower current density of a tandem solar cell should in principle allow for reducing Ohmic losses and indirectly allow for improving the current density, as more resistive contact and passivation layers can be integrated that may offer higher transparency. In addition, the higher voltage in the tandem configuration results in an increased tolerance with respect to slight voltage losses. Nevertheless, perovskite/silicon tandem solar cells that rival single-junction silicon cells have yet to be developed.
This review has focused on recent progress at the solar cell level in the fast-moving field of silicon photovoltaics. Many exciting developments occurring at the module and system levels could not be addressed here, even though they are equally important to ensure the economic competitiveness of solar electricity.
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