High performance foldable polymer thin film transistors with a side gate architecture†
Abstract
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* Corresponding authors
a
Department of Materials Science and Engineering, Yonsei University, 134 Shinchon-dong, Seoul, Korea
E-mail:
ujeong@yonsei.ac.kr
b Samsung Advanced Institute of Technology, Mt.14-1, Nongseo-Dong, Giheung-Gu, Yongin-Si, Gyeonggi-Do, Korea
c Department of Electrical and Electronic Engineering and Information Systems, University of Tokyo, Eng. Bldg. 10,7-3-1 Hongo, Bunkyo-ku, Tokyo, Japan
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S. W. Lee, B. S. Kim, J. J. Park, J. H. Hur, J. M. Kim, T. Sekitani, T. Someya and U. Jeong, J. Mater. Chem., 2011, 21, 18804 DOI: 10.1039/C1JM13079J
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