Issue 8, 2010

Enclosed pillar arrays integrated on a fluidic platform for on-chip separations and analysis

Abstract

Due to the difficulty of reliably producing sealed 3-D structures, few researchers have tackled the challenges of creating pillar beds suitable for miniaturized liquid phase separation systems. Herein, we describe an original processing sequence for the fabrication of enclosed pillar arrays integrated on a fluidic chip which, we believe, will further stimulate interest in this field. Our approach yields a mechanically robust enclosed pillar system that withstands mechanical impacts commonly incurred during processing, sealing and operation, resulting in a design particularly suitable for the research environment. A combination of a wafer-level fabrication sequence with chip-level elastomer bonding allows for chip reusability, an attractive and cost efficient advancement for research applications. The characteristic features in the implemented highly ordered pillar arrays are scalable to submicron dimensions. The proposed fluidic structures are suitable for handling picolitre sample volumes and offer prospects for substantial improvements in separation efficiency and permeability over traditional packed and monolithic columns. Our experimental observations indicate plate heights as low as 0.76 μm for a 10 mm long pillar bed. Theoretical calculations confirm that ordered pillar arrays with submicron pore sizes combine superior analysis speed, picolitre sample volumes, high permeability and reasonably large plate numbers on a small footprint. In addition, we describe a fluidic interface that provides streamlined coupling of the fabricated structures with off-chip fluidic components.

Graphical abstract: Enclosed pillar arrays integrated on a fluidic platform for on-chip separations and analysis

Supplementary files

Article information

Article type
Paper
Submitted
29 Sep 2009
Accepted
16 Dec 2009
First published
03 Feb 2010

Lab Chip, 2010,10, 1086-1094

Enclosed pillar arrays integrated on a fluidic platform for on-chip separations and analysis

N. V. Lavrik, L. C. Taylor and M. J. Sepaniak, Lab Chip, 2010, 10, 1086 DOI: 10.1039/B920275G

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